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List:       linux-edac
Subject:    Re: [PATCH 2/4] x86/mce/amd: Introduce deferred error interrupt handler
From:       Andy Lutomirski <luto () amacapital ! net>
Date:       2015-04-30 20:41:28
Message-ID: CALCETrUOTjE-kAftBvKL-oyM8ThQpsOppiJyq+aMFcckSHa42g () mail ! gmail ! com
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On Thu, Apr 30, 2015 at 7:49 AM, Aravind Gopalakrishnan
<Aravind.Gopalakrishnan@amd.com> wrote:
> Changes introduced in the patch-
>   - Assign vector number 0xf4 for Deferred errors
>   - Declare deferred_interrupt, allocate gate and bind it
>     to DEFERRED_APIC_VECTOR.
>   - Declare smp_deferred_interrupt to be used as the
>     entry point for the interrupt in mce_amd.c
>   - Define trace_deferred_interrupt for tracing
>   - Enable deferred error interrupt selectively upon detection
>     of 'succor' bitfield
>   - Setup amd_deferred_error_interrupt() to handle the interrupt
>     and assign it to def_int_vector if feature is present in HW.
>     Else, let default handler deal with it.
>   - Provide Deferred error interrupt stats on
>     /proc/interrupts by incrementing irq_deferred_count

You're calling these "deferred interrupts" all over (e.g.
irq_deferred_count, deferred_int_handler, etc).  That seems like it'll
be confusing.  They're deferred errors, not deferred interrupts.

--Andy
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