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List:       linux-edac
Subject:    sb_edac scrubrate help
From:       Niklas_Söderlund <niklas.soderlund () ericsson ! com>
Date:       2012-04-25 17:06:38
Message-ID: 4F982F1E.3090903 () ericsson ! com
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Hi,

I'm trying to add functionality to change the scrubrate in the sb_edac 
driver. I found the datasheet at Intel:

http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e5-1600-2600-vol-2-datasheet.pdf


And found the register (I think) that I need to work with, SCRUBCTL in 
section 4.4.67. It states I have to disable patrol scrubing before I 
change the value. So I do these steps (each in its own call to 
pci_write_config_dword):

1 Read SCRUBCTL register
2 Set SCRUBCTL[31] Scrub Enable to 0
3 Set SCRUBCTL[23:0] with a new scrubrate value
4 Set SCRUBCTL[31] Scrub Enable to 1 with

Then if I read back the register immediately (with 
pci_read_config_dword) I see the value I expect. But when I read it back 
after 10-20ms later it is changed to the value I first read in step 1.

I can't even just to step 1 and 2 and read back that I have disabled the 
patrol scrub engine, it gets reset to default value after a few ms. Is 
there anything that might poke around this register that I'm not aware 
of? Or am I doing something wrong?

Any help/suggestions on how to troubleshoot/test this are greatly 
appreciated.

Thanks

// Niklas
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