[prev in list] [next in list] [prev in thread] [next in thread] 

List:       linux-crypto-vger
Subject:    Re: [PATCH] iommu/vt-d: Fix scatterlist offset handling
From:       Casey Leedom <leedom () chelsio ! com>
Date:       2017-09-29 16:18:16
Message-ID: MWHPR12MB160034E91A834504FE85C07BC87E0 () MWHPR12MB1600 ! namprd12 ! prod ! outlook ! com
[Download RAW message or body]

> From: Harsh Jain <Harsh@chelsio.com>
> Sent: Friday, September 29, 2017 1:14:45 AM
> 
> Robin,
> 
> I tried running patch on our test setup.
> 
> With "intel_iommu=on" : I can see single occurrence of DMAR Write failure
> on perf traffic with 10 thread.
> 
> [  749.616480] perf: interrupt took too long (3203 > 3202), lowering \
> kernel.perf_event_max_sample_rate to 62000
> [  852.500671] DMAR: DRHD: handling fault status reg 2
> [  852.506039] DMAR: [DMA Write] Request device [02:00.4] fault addr ef919000 \
> [fault reason 05] PTE Write access is not set
> [root@heptagon linux_t4_build]# cat /proc/cmdline
> BOOT_IMAGE=/vmlinuz-4.9.51+ root=UUID=ccbb7f18-b3f0-43df-89de-07521e9c02fe ro \
> intel_iommu=on crashkernel=auto rhgb quiet rhgb quiet console=ttyS0,115200, \
> console=tty0 LANG=en_US.UTF-8

Harsh. Can you provide the debugging information for that one DMA FAILURE
trace?  It May be yet another corner case in __domain_mapping() or a
different path.

> With intel_iommu=sp_off : It works fine for more than 30 minutes without
> any issues.

I think that even without Robin's patch using intel_iommu=sp_off worked
without errors, right?

Casey


[prev in list] [next in list] [prev in thread] [next in thread] 

Configure | About | News | Add a list | Sponsored by KoreLogic