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List:       linux-atm
Subject:    Re: Efficiant Card
From:       "Thomas Seidel" <seidelt () dbf ! ddb ! de>
Date:       1999-08-24 16:20:11
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Thierry,

The following information are taken from adaptec's aic5900 chip (compatible to 
midway):

The aic5900 handles tx and rx very different. The transmit engine has 
eight channels, which can operate simultaneously. To send a non-AAL5 cell, the 
driver tells the chip to dma the cell to the segmentation buffer in the 
adapter memory, with a 4 byte header containing the tx channel, the expected 
cell rate (rate and resolution), the vci (the vpi is fixed to zero), the pti 
field, the clp bit, and some additional fields needed for AAL5-Cells only. 
After the dma, the chip added the cell to the send queue of the specified 
channel, ready for sending. The chip scans and sends all cells from the channel 
so no additional work must be done. Note that the aic5900 shapes the 
cells using cbr at the given cell rates. The channel 0 can be used as a best 
effort (ubr) channel.

The reassembling engine for received cells has a vci table with 1024 entries 
for each supported vci in the range (vpi.vci) 0.0 to 0.1023. Each entry has the 
size and location of the corresponding reassembling buffer, a mode field, and 
some additional fields. The mode field tells the driver to discard ("trash") or 
preserve the cells received on that vci. A received and not trashed cell 
interrupt the cpu, so that the driver has to dma the cell to the host memory. 
It's up to the driver to reserve enough space for the reassembling buffers.

I'm not really sure how the aic5900 will handle oam cells, I will check 
this and give you some additional information in the next days.

-- Thomas

>  Hi everybody,
> 
>  Is there someone which has the Efficient card specification file ?
> I need it to understand how the Midway chip play with non-AAL5/OAM cells
> and how to do get them correctly.
> 
>  Is it possible to send it via e-mail ?
> 
> 
> Thanks
> 
> 

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