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List: linux-arm-kernel
Subject: Re: [PATCH] pxafb
From: Palo Revak <palo () bielyvlk ! sk>
Date: 2008-01-28 9:09:45
Message-ID: 200801281009.46138.palo () bielyvlk ! sk
[Download RAW message or body]
in this patch "var->nonstd" isn't used
correct colors setting is trough ".lccr3" register in platform code
can this patch go to 2.6.25 ?
["linux-2.6.24-pxafb.patch" (text/x-diff)]
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index 10f912d..f778f2e 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -325,6 +325,26 @@ static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
var->green.offset = 5; var->green.length = 6;
var->blue.offset = 0; var->blue.length = 5;
var->transp.offset = var->transp.length = 0;
+ } else if (var->bits_per_pixel > 16) {
+ var->transp.offset = var->transp.length = 0;
+ switch (inf->lccr3 & (7 << 24)) {
+ case LCCR3_25BPP:
+ var->transp.offset = 24; var->transp.length = 1;
+ case LCCR3_24BPP:
+ var->red.offset = 16; var->red.length=8;
+ var->green.offset = 8; var->green.length=8;
+ var->blue.offset = 0; var->blue.length=8;
+ break;
+ case LCCR3_19BPP:
+ case LCCR3_19BPP_P:
+ var->transp.offset = 18; var->transp.length = 1;
+ case LCCR3_18BPP:
+ case LCCR3_18BPP_P:
+ var->red.offset = 12; var->red.length=6;
+ var->green.offset = 6; var->green.length=6;
+ var->blue.offset = 0; var->blue.length=6;
+ break;
+ }
} else {
var->red.offset = var->green.offset = var->blue.offset = var->transp.offset = 0;
var->red.length = 8;
@@ -360,7 +380,7 @@ static int pxafb_set_par(struct fb_info *info)
pr_debug("pxafb: set_par\n");
- if (var->bits_per_pixel == 16)
+ if (var->bits_per_pixel >= 16)
fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
else if (!fbi->cmap_static)
fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
@@ -375,7 +395,7 @@ static int pxafb_set_par(struct fb_info *info)
fbi->fb.fix.line_length = var->xres_virtual *
var->bits_per_pixel / 8;
- if (var->bits_per_pixel == 16)
+ if (var->bits_per_pixel >= 16)
fbi->palette_size = 0;
else
fbi->palette_size = var->bits_per_pixel == 1 ? 4 : 1 << var->bits_per_pixel;
@@ -395,7 +415,7 @@ static int pxafb_set_par(struct fb_info *info)
*/
pxafb_set_truecolor(fbi->fb.fix.visual == FB_VISUAL_TRUECOLOR);
- if (fbi->fb.var.bits_per_pixel == 16)
+ if (fbi->fb.var.bits_per_pixel >= 16)
fb_dealloc_cmap(&fbi->fb.cmap);
else
fb_alloc_cmap(&fbi->fb.cmap, 1<<fbi->fb.var.bits_per_pixel, 0);
@@ -606,6 +626,8 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info *
case 4:
case 8:
case 16:
+ case 24:
+ case 32:
break;
default:
printk(KERN_ERR "%s: invalid bit depth %d\n",
@@ -708,7 +730,7 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info *
sizeof(u32);
fbi->dmadesc_palette_cpu->ldcmd |= LDCMD_PAL;
- if (var->bits_per_pixel == 16) {
+ if (var->bits_per_pixel >= 16) {
/* palette shouldn't be loaded in true-color mode */
fbi->dmadesc_fbhigh_cpu->fdadr = fbi->dmadesc_fbhigh_dma;
fbi->fdadr0 = fbi->dmadesc_fbhigh_dma; /* no pal just fbhigh */
@@ -784,46 +806,6 @@ static inline void __pxafb_lcd_power(struct pxafb_info *fbi, int on)
pxafb_lcd_power(on, &fbi->fb.var);
}
-static void pxafb_setup_gpio(struct pxafb_info *fbi)
-{
- int gpio, ldd_bits;
- unsigned int lccr0 = fbi->lccr0;
-
- /*
- * setup is based on type of panel supported
- */
-
- /* 4 bit interface */
- if ((lccr0 & LCCR0_CMS) == LCCR0_Mono &&
- (lccr0 & LCCR0_SDS) == LCCR0_Sngl &&
- (lccr0 & LCCR0_DPD) == LCCR0_4PixMono)
- ldd_bits = 4;
-
- /* 8 bit interface */
- else if (((lccr0 & LCCR0_CMS) == LCCR0_Mono &&
- ((lccr0 & LCCR0_SDS) == LCCR0_Dual || (lccr0 & LCCR0_DPD) == LCCR0_8PixMono)) ||
- ((lccr0 & LCCR0_CMS) == LCCR0_Color &&
- (lccr0 & LCCR0_PAS) == LCCR0_Pas && (lccr0 & LCCR0_SDS) == LCCR0_Sngl))
- ldd_bits = 8;
-
- /* 16 bit interface */
- else if ((lccr0 & LCCR0_CMS) == LCCR0_Color &&
- ((lccr0 & LCCR0_SDS) == LCCR0_Dual || (lccr0 & LCCR0_PAS) == LCCR0_Act))
- ldd_bits = 16;
-
- else {
- printk(KERN_ERR "pxafb_setup_gpio: unable to determine bits per pixel\n");
- return;
- }
-
- for (gpio = 58; ldd_bits; gpio++, ldd_bits--)
- pxa_gpio_mode(gpio | GPIO_ALT_FN_2_OUT);
- pxa_gpio_mode(GPIO74_LCD_FCLK_MD);
- pxa_gpio_mode(GPIO75_LCD_LCLK_MD);
- pxa_gpio_mode(GPIO76_LCD_PCLK_MD);
- pxa_gpio_mode(GPIO77_LCD_ACBIAS_MD);
-}
-
static void pxafb_enable_controller(struct pxafb_info *fbi)
{
pr_debug("pxafb: Enabling LCD controller\n");
@@ -837,7 +819,7 @@ static void pxafb_enable_controller(struct pxafb_info *fbi)
/* enable LCD controller clock */
clk_enable(fbi->clk);
- /* Sequence from 11.7.10 */
+ LCCR4 = fbi->reg_lccr4;
LCCR3 = fbi->reg_lccr3;
LCCR2 = fbi->reg_lccr2;
LCCR1 = fbi->reg_lccr1;
@@ -960,7 +942,6 @@ static void set_ctrlr_state(struct pxafb_info *fbi, u_int state)
if (old_state == C_ENABLE) {
__pxafb_lcd_power(fbi, 0);
pxafb_disable_controller(fbi);
- pxafb_setup_gpio(fbi);
pxafb_enable_controller(fbi);
__pxafb_lcd_power(fbi, 1);
}
@@ -983,7 +964,6 @@ static void set_ctrlr_state(struct pxafb_info *fbi, u_int state)
*/
if (old_state != C_ENABLE) {
fbi->state = C_ENABLE;
- pxafb_setup_gpio(fbi);
pxafb_enable_controller(fbi);
__pxafb_lcd_power(fbi, 1);
__pxafb_backlight_power(fbi, 1);
@@ -1268,6 +1248,8 @@ static int __init pxafb_parse_options(struct device *dev, char *options)
case 4:
case 8:
case 16:
+ case 24:
+ case 32:
inf->modes[0].bpp = bpp;
dev_info(dev, "overriding bit depth: %d\n", bpp);
break;
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 1bd398d..7b82c61 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1325,6 +1325,8 @@
#define GPIO83_NSTXD 83 /* NSSP transmit */
#define GPIO84_NSRXD 84 /* NSSP receive */
#define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */
+#define GPIO86_LDD_16 86 /* LCD data pin 86 (PXA270) */
+#define GPIO87_LDD_17 87 /* LCD data pin 87 (PXA270) */
#define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */
#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
#define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */
@@ -1835,11 +1837,17 @@
#define TMEDRGBR __REG(0x44000040) /* TMED RGB Seed Register */
#define TMEDCR __REG(0x44000044) /* TMED Control Register */
-#define LCCR3_1BPP (0 << 24)
-#define LCCR3_2BPP (1 << 24)
-#define LCCR3_4BPP (2 << 24)
-#define LCCR3_8BPP (3 << 24)
-#define LCCR3_16BPP (4 << 24)
+#define LCCR3_1BPP (0 << 24)
+#define LCCR3_2BPP (1 << 24)
+#define LCCR3_4BPP (2 << 24)
+#define LCCR3_8BPP (3 << 24)
+#define LCCR3_16BPP (4 << 24)
+#define LCCR3_18BPP (5 << 24)
+#define LCCR3_18BPP_P (6 << 24) /* packed */
+#define LCCR3_19BPP (7 << 24)
+#define LCCR3_19BPP_P (8 << 24) /* packed */
+#define LCCR3_24BPP (9 << 24)
+#define LCCR3_25BPP (10 << 24)
#define LCCR3_PDFOR_0 (0 << 30)
#define LCCR3_PDFOR_1 (1 << 30)
diff --git a/include/asm-arm/arch-pxa/pxafb.h b/include/asm-arm/arch-pxa/pxafb.h
index ea2336a..a2cf5ca 100644
--- a/include/asm-arm/arch-pxa/pxafb.h
+++ b/include/asm-arm/arch-pxa/pxafb.h
@@ -65,6 +65,9 @@ struct pxafb_mach_info {
* LCCR3_PixRsEdg or LCCR3_PixFlEdg Pixel clock edge type
* LCCR3_Acb(X) AB Bias pin frequency
* LCCR3_DPC (optional) Double Pixel Clock mode (untested)
+ * LCCR3_18BPP or LCCR3_18BPP_P or
+ * LCCR3_19BPP or LCCR3_19BPP_P or
+ * LCCR3_24BPP or LCCR3_25BPP number of collors Bits Per Pixel
*
* The following should not be defined in LCCR3
* LCCR3_HSP, LCCR3_VSP, LCCR0_Pcd(x), LCCR3_Bpp
-------------------------------------------------------------------
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