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List:       linux-arm-kernel
Subject:    Re: linux-2.6.7 thumb lbrsb Segmentation faults
From:       "George G. Davis" <gdavis () mvista ! com>
Date:       2004-07-29 20:45:56
Message-ID: 20040729204556.GB31954 () mvista ! com
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On Thu, Jul 29, 2004 at 01:40:59PM +0100, scott douglass wrote:
> On Tue, 2004-07-27 at 21:30, George G. Davis wrote:
> > Specifically, the Thumb ldrsb instruction breaks the mold in which the "L-bit"
> > denotes the direction of the load/store.
> 
> I checked all the data abort generating Thumb instructions
> (LDR,LDRB,LDRH,LDRSH,LDRSB,LDMIA,POP,STR,STRB,STRH,PUSH) and LDRSB seems
> to be the only one that needs the special attention.  Did I forget any?

Since I'm working on adding thumb user mode alignment support, I had to look
at this in more detail:

15:12  11 (L)  10:9...                                    Format
0100   1       Rd[10:8]     imm8[7:0]            LDR(3)   3 (ARM ARM 6.5)
0101   0       00  Rm[8:6]  Rn[5:3]     Rd[2:0]  STR(2)   2 (ARM ARM 6.5)
0101   1       00  Rm[8:6]  Rn[5:3]     Rd[2:0]  LDR(2)   2 (ARM ARM 6.5)
0101   0       01  Rm[8:6]  Rn[5:3]     Rd[2:0]  STRH(2)  2 (ARM ARM 6.5)
0101   1       01  Rm[8:6]  Rn[5:3]     Rd[2:0]  LDRH(2)  2 (ARM ARM 6.5)
0101   0       10  Rm[8:6]  Rn[5:3]     Rd[2:0]  STRB(2)  2 (ARM ARM 6.5)
0101   1       10  Rm[8:6]  Rn[5:3]     Rd[2:0]  LDRB(2)  2 (ARM ARM 6.5)
0101   0       11  Rm[8:6]  Rn[5:3]     Rd[2:0]  LDRSB    2 (ARM ARM 6.5)
0101   1       11  Rm[8:6]  Rn[5:3]     Rd[2:0]  LDRSH    2 (ARM ARM 6.5)
0110   0       imm5[10:6]   Rn[5:3]     Rd[2:0]  STR(1)   1 (ARM ARM 6.5)
0110   1       imm5[10:6]   Rn[5:3]     Rd[2:0]  LDR(1)   1 (ARM ARM 6.5)
0111   0       imm5[10:6]   Rn[5:3]     Rd[2:0]  STRB(1)  1 (ARM ARM 6.5)
0111   1       imm5[10:6]   Rn[5:3]     Rd[2:0]  LDRB(1)  1 (ARM ARM 6.5)
1000   0       imm5[10:6]   Rn[5:3]     Rd[2:0]  STRH(1)  1 (ARM ARM 6.5)
1000   1       imm5[10:6]   Rn[5:3]     Rd[2:0]  LDRH(1)  1 (ARM ARM 6.5)
1001   0       Rd[10:8]     imm8[7:0]            STR(3)   4 (ARM ARM 6.5)
1001   1       Rd[10:8]     imm8[7:0]            LDR(4)   4 (ARM ARM 6.5)
1011   0       10  R[8]     rlist[7:0]           PUSH     2 (ARM ARM 6.6)
1011   1       10  R[8]     rlist[7:0]           POP      2 (ARM ARM 6.6)
1100   0       Rn[10:8]     rlist[7:0]           STMIA    1 (ARM ARM 6.6)
1100   1       Rn[10:8]     rlist[7:0]           LDMIA    1 (ARM ARM 6.6)

Nop, it looks like ldrsb is the only oddball. Of cource, ldrsh only works
because it is the L-bit complement of ldrsb and just happens to use the
correct sense of the L-bit. : P


> > The consequence is that the various
> > kernel abort handlers do not correctly decode the read/write direction for
> > data aborts which occur when the Thumb form of the ldrsb instruction is used
> > and may incorrectly signal a segmentation fault when handling data aborts
> > in which the thumb form of the ldrsb instruction is used.
> > 
> > [...]
> > 
> > Applying this patch resolves the erroneous Segmentation fault:
> > 
> > [...]
> > 
> > 
> > I have not thouroughly tested this fix in linux-2.6 and it can probably be
> > better optimised but this resolves the ldrsb Segmentation faults on ARMv5TEJ
> > based targets for me.
> > 
> > Comments are appreciated. TIA!
> 
> Thanks.  I wish I'd caught up on my email before I tracked down the same
> problem instead of after.
> 
> Your patch looks reasonable to me.  abort-lv4t.S seems to already handle
> this correctly

Whew, I hadn't looked at that lately. Quite complex but necessary I guess
for ARM720T late abort model?

> but the same problem exists in abort-ev4t.S and
> abort-ev5t.S, too.

Yep. FWIW, I submitted this fix for abort-ev5tj.S only to the patch system
here:

http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=1985/1


> And, by the way, do_alignment doesn't seem to try to understand Thumb.

I submitted an RFC for that elsewhere, see:

http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-July/023664.html

I'm reworking that now although what I posted in the above RFC already works
quite well. I'm merely trying to clean up the gdb/sim/arm implementation and
optimise it for only ld/st thumb translations whic lead to my table above.

Thanks!

--
Regards,
George
> 
> 
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