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List:       linux-arm-kernel
Subject:    Re: please give me some comments
From:       Russ Dill <Russ.Dill () asu ! edu>
Date:       2003-11-27 16:19:53
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On Thu, 2003-11-27 at 07:59, tim chen wrote:
> Cache is disabled in bootload stage, the memory test running just take 7/8 \
> seconds(every memory element is filled with its physical address value, and read 3 \
> times).

thats a pretty weak test. Data cache should be enabled so that the
processor accesses the SDRAM in burst mode. Also, you should use a
number of bit patterns that are likely to cause crosstalk/corruption.
like moving one's, moving zero's, all one's, all zeros, every other one,
etc

some more ideas are at:

http://www.memtest86.com/#philo

I think for your situation, walking ones, walking zero's, all ones, and
all zeros are most important since they are likely to bring out
crosstalk.You'll probably also want to let the patterns sit there in
sdram for a bit so you can be sure that you are getting a proper
refresh. Your memory test should probably take several dozen minutes to
a few hours.

-- 
Russ Dill <Russ.Dill@asu.edu>


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