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List:       linux-arm-kernel
Subject:    Re: How an interrupt is delivered to the kernel isr?
From:       Matthias Welwarsky <mwelwarsky () web ! de>
Date:       2002-12-30 22:18:40
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On Monday 30 December 2002 23:06, Brendan Dowling wrote:
>
> For the vector_IRQ, the code actually switches out of MODE_IRQ and into
> MODE_SVC to do the rest of the handling.  It saves LR and SPSR at the
> location __temp_irq, then it modifies LR and SPSR and then does a
> "movs pc, lr" (the 's' means that it also copies the SPSR to CPSR).
>
> (By the way, I haven't yet figured out why this routine subtracts 4 from
> LR before saving it.  Does anyone know?)

Because the PC is already 1 instruction ahead when then CPU takes the
exception and PC is saved to LR. So to return properly, you need to subtract 4 
bytes first.

You frequently find code like this:

	mov	lr, pc
	ldr	pc, [r0]

for computed subroutine calls. In the subroutine, you do

	mov pc, lr

to return, and this works perfectly because LR then points to the
address after the jump :-)

regards,
	matze

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