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List:       kde-commits
Subject:    [kdelibs/frameworks] tier1/solid/src/solid: solid: add support for SSSE3 and SSE4.2 in cpufeatures a
From:       Michael Pyne <mpyne () kde ! org>
Date:       2013-10-21 15:23:04
Message-ID: E1VYHJw-0003aX-7N () scm ! kde ! org
[Download RAW message or body]

Git commit 88bf26e1bc2bb3ac8a3744ba5806eb5f8edcbfb9 by Michael Pyne, on behalf of \
Patrick Spendrin. Committed on 22/05/2013 at 19:31.
Pushed by mpyne into branch 'frameworks'.

solid: add support for SSSE3 and SSE4.2 in cpufeatures and for msvc

Committing on behalf of Patrick Spendrin to close out the long-approved
review request #108845. This applies to KF5.

The patch required using git-apply's automatic 3-way merge fallback but
it applies cleanly from there. I can't *quite* test yet but my system is
getting that much closer to a clean build of KF5. Until then I'll have
to rely on the 2 different "Ship It!"s.

REVIEW:108845

M  +25   -5    tier1/solid/src/solid/backends/shared/cpufeatures.cpp
M  +3    -0    tier1/solid/src/solid/processor.h

http://commits.kde.org/kdelibs/88bf26e1bc2bb3ac8a3744ba5806eb5f8edcbfb9

diff --git a/tier1/solid/src/solid/backends/shared/cpufeatures.cpp \
b/tier1/solid/src/solid/backends/shared/cpufeatures.cpp index 05acbf7..d9233a2 100644
--- a/tier1/solid/src/solid/backends/shared/cpufeatures.cpp
+++ b/tier1/solid/src/solid/backends/shared/cpufeatures.cpp
@@ -1,5 +1,6 @@
 /*
     Copyright 2010 Kevin Ottens <ervin@kde.org>
+    Copyright 2013 Patrick Spendrin <ps_ml@gmx.de>
 
     This library is free software; you can redistribute it and/or
     modify it under the terms of the GNU Lesser General Public
@@ -20,9 +21,13 @@
 
 #include "cpufeatures.h"
 
+#ifndef _MSC_VER
 //for cpuFeatures
 #include <csignal>
 #include <csetjmp>
+#else
+#include <intrin.h>
+#endif
 #include <config-processor.h>
 
 #if defined(__GNUC__) || defined(__INTEL_COMPILER)
@@ -36,6 +41,7 @@ namespace Backends
 namespace Shared
 {
 
+#ifndef _MSC_VER
 typedef void (*kde_sighandler_t) (int);
 
 #if defined( __i386__ ) || defined( __x86_64__ )
@@ -69,6 +75,7 @@ static void sighandler( int )
   #define ASM_MOV_REG(reg1, reg2)   "movq   %%r" reg1 ", %%r" reg2 " \n\t"
   #define ASM_MOV_VAR(var, reg)     "movq   " var ",     %%r" reg "  \n\t"
 #endif
+#endif
 
 #ifdef __PPC__
 static sigjmp_buf jmpbuf;
@@ -124,8 +131,8 @@ Solid::Processor::InstructionSets cpuFeatures()
             ASM_POP("bx")                       // Restore EBX
             : "=d"(result), "=c"(result2) : : ASM_REG("ax") );
 
-        features = result & 0x06800000; //copy the mmx and sse bits to features
-        features |= result2 & 0x00080001; //copy the sse3 and sse4 bits to features
+        features = result & 0x06800000; //copy the mmx and sse & sse2 bits to \
features +        features |= result2 & 0x00180101; //copy the ssse3, sse3 and \
sse4.1, sse4.2 bits to features  
         __asm__ __volatile__ (
              ASM_PUSH("bx")
@@ -180,6 +187,15 @@ Solid::Processor::InstructionSets cpuFeatures()
         features = 0x2;
     }
 #endif // __i386__ || __x86_64__
+#elif defined(_MSC_VER)
+    int array[4], ft = 1;
+    __cpuid(array, ft);
+
+    features = array[3] & 0x06800000; //copy the mmx and sse & sse2 bits to features
+    features |= array[2] & 0x00180101; //copy the ssse3, sse3 and sse4.1, sse4.2 \
bits to features +
+    if (array[3] & 0x80000000)
+        features |= 0x80000000;
 #endif //HAVE_GNU_INLINE_ASM
     Solid::Processor::InstructionSets featureflags;
 
@@ -191,10 +207,14 @@ Solid::Processor::InstructionSets cpuFeatures()
         featureflags |= Solid::Processor::IntelSse;
     if (features & 0x04000000)
         featureflags |= Solid::Processor::IntelSse2;
-    if (features & 0x00000001) // FIXME: Only SSE3. There is no flag for SSSE3.
+    if (features & 0x00000001)
         featureflags |= Solid::Processor::IntelSse3;
-    if (features & 0x00080000) // FIXME: Only SSE4.1. There is no flag for SSE4.2.
-        featureflags |= Solid::Processor::IntelSse4;
+    if (features & 0x00000100)
+        featureflags |= Solid::Processor::IntelSsse3;
+    if (features & 0x00080000)
+        featureflags |= Solid::Processor::IntelSse41;
+    if (features & 0x00100000)
+        featureflags |= Solid::Processor::IntelSse42;
 
     if (features & 0x2)
         featureflags |= Solid::Processor::AltiVec;
diff --git a/tier1/solid/src/solid/processor.h b/tier1/solid/src/solid/processor.h
index ce4f0e1..ae14ed7 100644
--- a/tier1/solid/src/solid/processor.h
+++ b/tier1/solid/src/solid/processor.h
@@ -67,7 +67,10 @@ namespace Solid
             IntelSse = 0x2,
             IntelSse2 = 0x4,
             IntelSse3 = 0x8,
+            IntelSsse3 = 0x80,
             IntelSse4 = 0x10,
+            IntelSse41 = 0x10,
+            IntelSse42 = 0x100,
             Amd3DNow = 0x20,
             AltiVec = 0x40
         };


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