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List: kde-commits
Subject: valgrind
From: Tom Hughes <thh () cyberscience ! com>
Date: 2004-03-31 22:47:53
Message-ID: 20040331224753.D217199E3 () office ! kde ! org
[Download RAW message or body]
CVS commit by thughes:
Added more floating point instruction tests.
M +56 -0 addrcheck/tests/insn_fpu.stdout.exp 1.4
M +56 -0 cachegrind/tests/insn_fpu.stdout.exp 1.4
M +56 -0 helgrind/tests/insn_fpu.stdout.exp 1.4
M +56 -0 memcheck/tests/insn_fpu.stdout.exp 1.4
M +67 -15 none/tests/gen_insn_test.pl 1.7
M +56 -0 none/tests/insn_fpu.def 1.4
M +56 -0 none/tests/insn_fpu.stdout.exp 1.4
--- valgrind/addrcheck/tests/insn_fpu.stdout.exp #1.3:1.4
@@ -211,4 +211,44 @@
fildq_3 ... ok
fildq_4 ... ok
+fists_1 ... ok
+fists_2 ... ok
+fists_3 ... ok
+fists_4 ... ok
+fists_5 ... ok
+fists_6 ... ok
+fists_7 ... ok
+fists_8 ... ok
+fistl_1 ... ok
+fistl_2 ... ok
+fistl_3 ... ok
+fistl_4 ... ok
+fistl_5 ... ok
+fistl_6 ... ok
+fistl_7 ... ok
+fistl_8 ... ok
+fistps_1 ... ok
+fistps_2 ... ok
+fistps_3 ... ok
+fistps_4 ... ok
+fistps_5 ... ok
+fistps_6 ... ok
+fistps_7 ... ok
+fistps_8 ... ok
+fistpl_1 ... ok
+fistpl_2 ... ok
+fistpl_3 ... ok
+fistpl_4 ... ok
+fistpl_5 ... ok
+fistpl_6 ... ok
+fistpl_7 ... ok
+fistpl_8 ... ok
+fistpq_1 ... ok
+fistpq_2 ... ok
+fistpq_3 ... ok
+fistpq_4 ... ok
+fistpq_5 ... ok
+fistpq_6 ... ok
+fistpq_7 ... ok
+fistpq_8 ... ok
flds_1 ... ok
flds_2 ... ok
@@ -281,4 +321,20 @@
fimull_7 ... ok
fimull_8 ... ok
+frndint_1 ... ok
+frndint_2 ... ok
+frndint_3 ... ok
+frndint_4 ... ok
+frndint_5 ... ok
+frndint_6 ... ok
+frndint_7 ... ok
+frndint_8 ... ok
+frndint_9 ... ok
+frndint_10 ... ok
+frndint_11 ... ok
+frndint_12 ... ok
+frndint_13 ... ok
+frndint_14 ... ok
+frndint_15 ... ok
+frndint_16 ... ok
fsubs_1 ... ok
fsubs_2 ... ok
--- valgrind/cachegrind/tests/insn_fpu.stdout.exp #1.3:1.4
@@ -211,4 +211,44 @@
fildq_3 ... ok
fildq_4 ... ok
+fists_1 ... ok
+fists_2 ... ok
+fists_3 ... ok
+fists_4 ... ok
+fists_5 ... ok
+fists_6 ... ok
+fists_7 ... ok
+fists_8 ... ok
+fistl_1 ... ok
+fistl_2 ... ok
+fistl_3 ... ok
+fistl_4 ... ok
+fistl_5 ... ok
+fistl_6 ... ok
+fistl_7 ... ok
+fistl_8 ... ok
+fistps_1 ... ok
+fistps_2 ... ok
+fistps_3 ... ok
+fistps_4 ... ok
+fistps_5 ... ok
+fistps_6 ... ok
+fistps_7 ... ok
+fistps_8 ... ok
+fistpl_1 ... ok
+fistpl_2 ... ok
+fistpl_3 ... ok
+fistpl_4 ... ok
+fistpl_5 ... ok
+fistpl_6 ... ok
+fistpl_7 ... ok
+fistpl_8 ... ok
+fistpq_1 ... ok
+fistpq_2 ... ok
+fistpq_3 ... ok
+fistpq_4 ... ok
+fistpq_5 ... ok
+fistpq_6 ... ok
+fistpq_7 ... ok
+fistpq_8 ... ok
flds_1 ... ok
flds_2 ... ok
@@ -281,4 +321,20 @@
fimull_7 ... ok
fimull_8 ... ok
+frndint_1 ... ok
+frndint_2 ... ok
+frndint_3 ... ok
+frndint_4 ... ok
+frndint_5 ... ok
+frndint_6 ... ok
+frndint_7 ... ok
+frndint_8 ... ok
+frndint_9 ... ok
+frndint_10 ... ok
+frndint_11 ... ok
+frndint_12 ... ok
+frndint_13 ... ok
+frndint_14 ... ok
+frndint_15 ... ok
+frndint_16 ... ok
fsubs_1 ... ok
fsubs_2 ... ok
--- valgrind/helgrind/tests/insn_fpu.stdout.exp #1.3:1.4
@@ -211,4 +211,44 @@
fildq_3 ... ok
fildq_4 ... ok
+fists_1 ... ok
+fists_2 ... ok
+fists_3 ... ok
+fists_4 ... ok
+fists_5 ... ok
+fists_6 ... ok
+fists_7 ... ok
+fists_8 ... ok
+fistl_1 ... ok
+fistl_2 ... ok
+fistl_3 ... ok
+fistl_4 ... ok
+fistl_5 ... ok
+fistl_6 ... ok
+fistl_7 ... ok
+fistl_8 ... ok
+fistps_1 ... ok
+fistps_2 ... ok
+fistps_3 ... ok
+fistps_4 ... ok
+fistps_5 ... ok
+fistps_6 ... ok
+fistps_7 ... ok
+fistps_8 ... ok
+fistpl_1 ... ok
+fistpl_2 ... ok
+fistpl_3 ... ok
+fistpl_4 ... ok
+fistpl_5 ... ok
+fistpl_6 ... ok
+fistpl_7 ... ok
+fistpl_8 ... ok
+fistpq_1 ... ok
+fistpq_2 ... ok
+fistpq_3 ... ok
+fistpq_4 ... ok
+fistpq_5 ... ok
+fistpq_6 ... ok
+fistpq_7 ... ok
+fistpq_8 ... ok
flds_1 ... ok
flds_2 ... ok
@@ -281,4 +321,20 @@
fimull_7 ... ok
fimull_8 ... ok
+frndint_1 ... ok
+frndint_2 ... ok
+frndint_3 ... ok
+frndint_4 ... ok
+frndint_5 ... ok
+frndint_6 ... ok
+frndint_7 ... ok
+frndint_8 ... ok
+frndint_9 ... ok
+frndint_10 ... ok
+frndint_11 ... ok
+frndint_12 ... ok
+frndint_13 ... ok
+frndint_14 ... ok
+frndint_15 ... ok
+frndint_16 ... ok
fsubs_1 ... ok
fsubs_2 ... ok
--- valgrind/memcheck/tests/insn_fpu.stdout.exp #1.3:1.4
@@ -211,4 +211,44 @@
fildq_3 ... ok
fildq_4 ... ok
+fists_1 ... ok
+fists_2 ... ok
+fists_3 ... ok
+fists_4 ... ok
+fists_5 ... ok
+fists_6 ... ok
+fists_7 ... ok
+fists_8 ... ok
+fistl_1 ... ok
+fistl_2 ... ok
+fistl_3 ... ok
+fistl_4 ... ok
+fistl_5 ... ok
+fistl_6 ... ok
+fistl_7 ... ok
+fistl_8 ... ok
+fistps_1 ... ok
+fistps_2 ... ok
+fistps_3 ... ok
+fistps_4 ... ok
+fistps_5 ... ok
+fistps_6 ... ok
+fistps_7 ... ok
+fistps_8 ... ok
+fistpl_1 ... ok
+fistpl_2 ... ok
+fistpl_3 ... ok
+fistpl_4 ... ok
+fistpl_5 ... ok
+fistpl_6 ... ok
+fistpl_7 ... ok
+fistpl_8 ... ok
+fistpq_1 ... ok
+fistpq_2 ... ok
+fistpq_3 ... ok
+fistpq_4 ... ok
+fistpq_5 ... ok
+fistpq_6 ... ok
+fistpq_7 ... ok
+fistpq_8 ... ok
flds_1 ... ok
flds_2 ... ok
@@ -281,4 +321,20 @@
fimull_7 ... ok
fimull_8 ... ok
+frndint_1 ... ok
+frndint_2 ... ok
+frndint_3 ... ok
+frndint_4 ... ok
+frndint_5 ... ok
+frndint_6 ... ok
+frndint_7 ... ok
+frndint_8 ... ok
+frndint_9 ... ok
+frndint_10 ... ok
+frndint_11 ... ok
+frndint_12 ... ok
+frndint_13 ... ok
+frndint_14 ... ok
+frndint_15 ... ok
+frndint_16 ... ok
fsubs_1 ... ok
fsubs_2 ... ok
--- valgrind/none/tests/gen_insn_test.pl #1.6:1.7
@@ -17,4 +17,5 @@
eflags => "reg32_t",
st => "reg64_t",
+ fpucw => "reg16_t",
fpusw => "reg16_t"
);
@@ -195,4 +196,6 @@
my $eflagsmask;
my $eflagsset;
+ my $fpucwmask;
+ my $fpucwset;
my $fpuswmask;
my $fpuswset;
@@ -282,6 +285,17 @@
$values[1] = oct($values[1]) if $values[1] =~ /^0/;
- $eflagsmask = sprintf "0x%x", ~$values[0];
- $eflagsset = sprintf "0x%x", $values[1];
+ $eflagsmask = sprintf "0x%08x", $values[0] ^ 0xffffffff;
+ $eflagsset = sprintf "0x%08x", $values[1];
+ }
+ elsif ($preset =~ /^(fpucw)\[([^\]]+)\]$/)
+ {
+ my $type = $1;
+ my @values = split(/,/, $2);
+
+ $values[0] = oct($values[0]) if $values[0] =~ /^0/;
+ $values[1] = oct($values[1]) if $values[1] =~ /^0/;
+
+ $fpucwmask = sprintf "0x%04x", $values[0] ^ 0xffff;
+ $fpucwset = sprintf "0x%04x", $values[1];
}
elsif ($preset =~ /^(fpusw)\[([^\]]+)\]$/)
@@ -293,6 +307,6 @@
$values[1] = oct($values[1]) if $values[1] =~ /^0/;
- $fpuswmask = sprintf "0x%x", ~$values[0];
- $fpuswset = sprintf "0x%x", $values[1];
+ $fpuswmask = sprintf "0x%04x", $values[0] ^ 0xffff;
+ $fpuswset = sprintf "0x%04x", $values[1];
}
else
@@ -513,5 +527,5 @@
type => "eflags",
subtype => "ud",
- values => [ map { sprintf "0x%x", $_ } @values ]
+ values => [ map { sprintf "0x%08x", $_ } @values ]
};
@@ -522,6 +536,30 @@
if (!defined($eflagsmask) && !defined($eflagsset))
{
- $eflagsmask = sprintf "0x%x", ~$values[0];
- $eflagsset = sprintf "0x%x", $values[0] & ~$values[1];
+ $eflagsmask = sprintf "0x%08x", $values[0] ^ 0xffffffff;
+ $eflagsset = sprintf "0x%08x", $values[0] & ~$values[1];
+ }
+ }
+ elsif ($result =~ /^fpucw\[([^\]]+)\]$/)
+ {
+ my @values = split(/,/, $1);
+
+ $values[0] = oct($values[0]) if $values[0] =~ /^0/;
+ $values[1] = oct($values[1]) if $values[1] =~ /^0/;
+
+ my $result = {
+ name => $name,
+ type => "fpucw",
+ subtype => "ud",
+ values => [ map { sprintf "0x%04x", $_ } @values ]
+ };
+
+ push @results, $result;
+
+ print qq| $ArgTypes{fpucw} $name;\n|;
+
+ if (!defined($fpucwmask) && !defined($fpucwset))
+ {
+ $fpucwmask = sprintf "0x%04x", $values[0] ^ 0xffff;
+ $fpucwset = sprintf "0x%04x", $values[0] & ~$values[1];
}
}
@@ -537,5 +575,5 @@
type => "fpusw",
subtype => "ud",
- values => [ map { sprintf "0x%x", $_ } @values ]
+ values => [ map { sprintf "0x%04x", $_ } @values ]
};
@@ -546,6 +584,6 @@
if (!defined($fpuswmask) && !defined($fpuswset))
{
- $fpuswmask = sprintf "0x%x", ~$values[0];
- $fpuswset = sprintf "0x%x", $values[0] & ~$values[1];
+ $fpuswmask = sprintf "0x%04x", $values[0] ^ 0xffff;
+ $fpuswset = sprintf "0x%04x", $values[0] & ~$values[1];
}
}
@@ -562,5 +600,5 @@
foreach my $result (@results)
{
- if ($result->{type} =~ /^(m(8|16|32|64|128)|st|eflags|fpusw)$/)
+ if ($result->{type} =~ /^(m(8|16|32|64|128)|st|eflags|fpu[cs]w)$/)
{
$result->{argnum} = $argnum++;
@@ -651,4 +689,14 @@
}
+ if (defined($fpucwmask) || defined($fpucwset))
+ {
+ print qq| \"subl \$2, %%esp\\n\"\n|;
+ print qq| \"fstcw (%%esp)\\n\"\n|;
+ print qq| \"andw \$$fpucwmask, (%%esp)\\n\"\n| if \
defined($fpucwmask); + print qq| \"orw \$$fpucwset, (%%esp)\\n\"\n| if \
defined($fpucwset); + print qq| \"fldcw (%%esp)\\n\"\n|;
+ print qq| \"addl \$2, %%esp\\n\"\n|;
+ }
+
print qq| \"$insn|;
@@ -726,4 +774,8 @@
print qq| \"popl %$result->{argnum}\\n\"\n|;
}
+ elsif ($result->{type} eq "fpucw")
+ {
+ print qq| \"fstcw %$result->{argnum}\\n\"\n|;
+ }
elsif ($result->{type} eq "fpusw")
{
@@ -759,5 +811,5 @@
foreach my $result (@results)
{
- if ($result->{type} =~ /^(m(8|16|32|64|128)|st|eflags|fpusw)$/)
+ if ($result->{type} =~ /^(m(8|16|32|64|128)|st|eflags|fpu[cs]w)$/)
{
print qq|$prefix\"=m\" \($result->{name}\)|;
@@ -821,5 +873,5 @@
print qq|${prefix}\($result->{name}.ud[0] & $values[0]UL\) == \
$values[1]UL|; }
- elsif ($type eq "fpusw")
+ elsif ($type =~ /^fpu[cs]w$/)
{
print qq|${prefix}\($result->{name}.uw[0] & $values[0]\) == $values[1]|;
@@ -868,7 +920,7 @@
print qq| printf(" eflags & 0x%lx = 0x%lx (expected 0x%lx)\\n", \
$values[0]UL, $result->{name}.ud\[0\] & $values[0]UL, $values[1]UL);\n|; }
- elsif ($type eq "fpusw")
+ elsif ($type =~ /^fpu[cs]w$/)
{
- print qq| printf(" fpusw & 0x%x = 0x%x (expected 0x%x)\\n", \
$values[0], $result->{name}.uw\[0\] & $values[0], $values[1]);\n|; + print \
qq| printf(" $type & 0x%x = 0x%x (expected 0x%x)\\n", $values[0], \
$result->{name}.uw\[0\] & $values[0], $values[1]);\n|; }
else
--- valgrind/none/tests/insn_fpu.def #1.3:1.4
@@ -211,4 +211,44 @@
fildq m64.sq[123456787654321] => st0.pd[123456787654321.0]
fildq m64.sq[-123456787654321] => st0.pd[-123456787654321.0]
+fists fpucw[0xc00,0x000] st0.ps[1234.5678] : m16.sw[0] => 0.sw[1235] \
st0.ps[1234.5678] +fists fpucw[0xc00,0x000] st0.ps[-1234.5678] : m16.sw[0] => \
0.sw[-1235] st0.ps[-1234.5678] +fists fpucw[0xc00,0x400] st0.ps[1234.5678] : \
m16.sw[0] => 0.sw[1234] st0.ps[1234.5678] +fists fpucw[0xc00,0x400] \
st0.ps[-1234.5678] : m16.sw[0] => 0.sw[-1235] st0.ps[-1234.5678] +fists \
fpucw[0xc00,0x800] st0.ps[1234.5678] : m16.sw[0] => 0.sw[1235] st0.ps[1234.5678] \
+fists fpucw[0xc00,0x800] st0.ps[-1234.5678] : m16.sw[0] => 0.sw[-1234] \
st0.ps[-1234.5678] +fists fpucw[0xc00,0xc00] st0.ps[1234.5678] : m16.sw[0] => \
0.sw[1234] st0.ps[1234.5678] +fists fpucw[0xc00,0xc00] st0.ps[-1234.5678] : m16.sw[0] \
=> 0.sw[-1234] st0.ps[-1234.5678] +fistl fpucw[0xc00,0x000] st0.pd[1234567.7654321] : \
m32.sd[0] => 0.sd[1234568] st0.pd[1234567.7654321] +fistl fpucw[0xc00,0x000] \
st0.pd[-1234567.7654321] : m32.sd[0] => 0.sd[-1234568] st0.pd[-1234567.7654321] \
+fistl fpucw[0xc00,0x400] st0.pd[1234567.7654321] : m32.sd[0] => 0.sd[1234567] \
st0.pd[1234567.7654321] +fistl fpucw[0xc00,0x400] st0.pd[-1234567.7654321] : \
m32.sd[0] => 0.sd[-1234568] st0.pd[-1234567.7654321] +fistl fpucw[0xc00,0x800] \
st0.pd[1234567.7654321] : m32.sd[0] => 0.sd[1234568] st0.pd[1234567.7654321] +fistl \
fpucw[0xc00,0x800] st0.pd[-1234567.7654321] : m32.sd[0] => 0.sd[-1234567] \
st0.pd[-1234567.7654321] +fistl fpucw[0xc00,0xc00] st0.pd[1234567.7654321] : \
m32.sd[0] => 0.sd[1234567] st0.pd[1234567.7654321] +fistl fpucw[0xc00,0xc00] \
st0.pd[-1234567.7654321] : m32.sd[0] => 0.sd[-1234567] st0.pd[-1234567.7654321] \
+fistps fpucw[0xc00,0x000] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => \
0.sw[1235] st0.ps[1111.1111] +fistps fpucw[0xc00,0x000] st0.ps[-1234.5678] \
st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1235] st0.ps[1111.1111] +fistps \
fpucw[0xc00,0x400] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] \
st0.ps[1111.1111] +fistps fpucw[0xc00,0x400] st0.ps[-1234.5678] st1.ps[1111.1111] : \
m16.sw[0] => 0.sw[-1235] st0.ps[1111.1111] +fistps fpucw[0xc00,0x800] \
st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1235] st0.ps[1111.1111] \
+fistps fpucw[0xc00,0x800] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => \
0.sw[-1234] st0.ps[1111.1111] +fistps fpucw[0xc00,0xc00] st0.ps[1234.5678] \
st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] st0.ps[1111.1111] +fistps \
fpucw[0xc00,0xc00] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1234] \
st0.ps[1111.1111] +fistpl fpucw[0xc00,0x000] st0.pd[1234567.7654321] \
st1.ps[1111.1111] : m32.sd[0] => 0.sd[1234568] st0.ps[1111.1111] +fistpl \
fpucw[0xc00,0x000] st0.pd[-1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => \
0.sd[-1234568] st0.ps[1111.1111] +fistpl fpucw[0xc00,0x400] st0.pd[1234567.7654321] \
st1.ps[1111.1111] : m32.sd[0] => 0.sd[1234567] st0.ps[1111.1111] +fistpl \
fpucw[0xc00,0x400] st0.pd[-1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => \
0.sd[-1234568] st0.ps[1111.1111] +fistpl fpucw[0xc00,0x800] st0.pd[1234567.7654321] \
st1.ps[1111.1111] : m32.sd[0] => 0.sd[1234568] st0.ps[1111.1111] +fistpl \
fpucw[0xc00,0x800] st0.pd[-1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => \
0.sd[-1234567] st0.ps[1111.1111] +fistpl fpucw[0xc00,0xc00] st0.pd[1234567.7654321] \
st1.ps[1111.1111] : m32.sd[0] => 0.sd[1234567] st0.ps[1111.1111] +fistpl \
fpucw[0xc00,0xc00] st0.pd[-1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => \
0.sd[-1234567] st0.ps[1111.1111] +fistpq fpucw[0xc00,0x000] st0.pd[123456787654321.6] \
st1.ps[1111.1111] : m64.sq[0] => 0.sq[123456787654322] st0.ps[1111.1111] +fistpq \
fpucw[0xc00,0x000] st0.pd[-123456787654321.6] st1.ps[1111.1111] : m64.sq[0] => \
0.sq[-123456787654322] st0.ps[1111.1111] +fistpq fpucw[0xc00,0x400] \
st0.pd[123456787654321.6] st1.ps[1111.1111] : m64.sq[0] => 0.sq[123456787654321] \
st0.ps[1111.1111] +fistpq fpucw[0xc00,0x400] st0.pd[-123456787654321.6] \
st1.ps[1111.1111] : m64.sq[0] => 0.sq[-123456787654322] st0.ps[1111.1111] +fistpq \
fpucw[0xc00,0x800] st0.pd[123456787654321.6] st1.ps[1111.1111] : m64.sq[0] => \
0.sq[123456787654322] st0.ps[1111.1111] +fistpq fpucw[0xc00,0x800] \
st0.pd[-123456787654321.6] st1.ps[1111.1111] : m64.sq[0] => 0.sq[-123456787654321] \
st0.ps[1111.1111] +fistpq fpucw[0xc00,0xc00] st0.pd[123456787654321.6] \
st1.ps[1111.1111] : m64.sq[0] => 0.sq[123456787654321] st0.ps[1111.1111] +fistpq \
fpucw[0xc00,0xc00] st0.pd[-123456787654321.6] st1.ps[1111.1111] : m64.sq[0] => \
0.sq[-123456787654321] st0.ps[1111.1111] flds m32.ps[1234.5678] => st0.ps[1234.5678]
flds m32.ps[-1234.5678] => st0.ps[-1234.5678]
@@ -281,4 +321,20 @@
fimull st0.pd[1234567.7654321] : m32.sd[-654321] => st0.pd[-807803614845.297]
fimull st0.pd[-1234567.7654321] : m32.sd[-654321] => st0.pd[807803614845.297]
+frndint fpucw[0xc00,0x000] st0.ps[1234.5678] : => st0.ps[1235.0]
+frndint fpucw[0xc00,0x000] st0.ps[-1234.5678] : => st0.ps[-1235.0]
+frndint fpucw[0xc00,0x400] st0.ps[1234.5678] : => st0.ps[1234.0]
+frndint fpucw[0xc00,0x400] st0.ps[-1234.5678] : => st0.ps[-1235.0]
+frndint fpucw[0xc00,0x800] st0.ps[1234.5678] : => st0.ps[1235.0]
+frndint fpucw[0xc00,0x800] st0.ps[-1234.5678] : => st0.ps[-1234.0]
+frndint fpucw[0xc00,0xc00] st0.ps[1234.5678] : => st0.ps[1234.0]
+frndint fpucw[0xc00,0xc00] st0.ps[-1234.5678] : => st0.ps[-1234.0]
+frndint fpucw[0xc00,0x000] st0.pd[1234567.7654321] : => st0.pd[1234568.0]
+frndint fpucw[0xc00,0x000] st0.pd[-1234567.7654321] : => st0.pd[-1234568.0]
+frndint fpucw[0xc00,0x400] st0.pd[1234567.7654321] : => st0.pd[1234567.0]
+frndint fpucw[0xc00,0x400] st0.pd[-1234567.7654321] : => st0.pd[-1234568.0]
+frndint fpucw[0xc00,0x800] st0.pd[1234567.7654321] : => st0.pd[1234568.0]
+frndint fpucw[0xc00,0x800] st0.pd[-1234567.7654321] : => st0.pd[-1234567.0]
+frndint fpucw[0xc00,0xc00] st0.pd[1234567.7654321] : => st0.pd[1234567.0]
+frndint fpucw[0xc00,0xc00] st0.pd[-1234567.7654321] : => st0.pd[-1234567.0]
fsubs st0.ps[1234.5678] : m32.ps[8765.4321] => st0.ps[-7530.8643]
fsubs st0.ps[-1234.5678] : m32.ps[8765.4321] => st0.ps[-9999.9990]
--- valgrind/none/tests/insn_fpu.stdout.exp #1.3:1.4
@@ -211,4 +211,44 @@
fildq_3 ... ok
fildq_4 ... ok
+fists_1 ... ok
+fists_2 ... ok
+fists_3 ... ok
+fists_4 ... ok
+fists_5 ... ok
+fists_6 ... ok
+fists_7 ... ok
+fists_8 ... ok
+fistl_1 ... ok
+fistl_2 ... ok
+fistl_3 ... ok
+fistl_4 ... ok
+fistl_5 ... ok
+fistl_6 ... ok
+fistl_7 ... ok
+fistl_8 ... ok
+fistps_1 ... ok
+fistps_2 ... ok
+fistps_3 ... ok
+fistps_4 ... ok
+fistps_5 ... ok
+fistps_6 ... ok
+fistps_7 ... ok
+fistps_8 ... ok
+fistpl_1 ... ok
+fistpl_2 ... ok
+fistpl_3 ... ok
+fistpl_4 ... ok
+fistpl_5 ... ok
+fistpl_6 ... ok
+fistpl_7 ... ok
+fistpl_8 ... ok
+fistpq_1 ... ok
+fistpq_2 ... ok
+fistpq_3 ... ok
+fistpq_4 ... ok
+fistpq_5 ... ok
+fistpq_6 ... ok
+fistpq_7 ... ok
+fistpq_8 ... ok
flds_1 ... ok
flds_2 ... ok
@@ -281,4 +321,20 @@
fimull_7 ... ok
fimull_8 ... ok
+frndint_1 ... ok
+frndint_2 ... ok
+frndint_3 ... ok
+frndint_4 ... ok
+frndint_5 ... ok
+frndint_6 ... ok
+frndint_7 ... ok
+frndint_8 ... ok
+frndint_9 ... ok
+frndint_10 ... ok
+frndint_11 ... ok
+frndint_12 ... ok
+frndint_13 ... ok
+frndint_14 ... ok
+frndint_15 ... ok
+frndint_16 ... ok
fsubs_1 ... ok
fsubs_2 ... ok
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