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List: gnuradio-discuss
Subject: [Discuss-gnuradio] mimo 2x1 based on benchmark_ofdm_mimo.py
From: Jorge Hernandez <jorge.gnuradio () googlemail ! com>
Date: 2012-02-29 15:22:46
Message-ID: CANtFzQ-BpX18ibbF83nNM_vmpAk8WPQvjiHJJSQbM0nCRBCuzg () mail ! gmail ! com
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Hi all,
I continue working on trying a 2x1 mimo system based on the
benchmark_ofdm_mimo from Tom Rondeau's repository. I have done several
trials and I am losing my mind trying to see why it doesn't work. I am
using two USRP2 in the transmitter side and another one in the recevier
side with XCVR2450 daughterboards, GNU C++ version 4.4.1 [gcc-4_4-branch
revision 150839]; Boost_103900; UHD_003.004.000-122b947. In the receiver
side all I see is a lot of messages with just an x, and every 10 x (more or
less) I get a message: got preamble. I've been looking into the code and
this messages are generated in the alamouti frame acquisition block. I
guess the problem is in this very same block, when the synchronization has
to be accomplished. I think this can be caused by a poor snr, but I don't
know how to improve this in order to get this mimo configuration to work. I
would like to share also the way I've configured the uhd_usrp2 sinks to see
if maybe there is any error there. At this point, I would really appreciate
any help! Thanks in advance:
This is how I configured the usrp2:
# UHD USRP2 sinks
self.uhd_usrp_slave = uhd.usrp_sink(
device_addr="addr=192.168.20.3",
io_type=uhd.io_type.COMPLEX_FLOAT32,
num_channels=1,
)
_config = uhd.clock_config()
_config.ref_source = uhd.clock_config.REF_MIMO
_config.pps_source = uhd.clock_config.PPS_MIMO
self.uhd_usrp_slave.set_clock_config(_config, 0)
self.uhd_usrp_slave.set_samp_rate(self.samp_rate)
self.uhd_usrp_slave.set_center_freq(self.center_frequency, 0)
self.uhd_usrp_slave.set_gain(self.tx_gain, 0)
self.uhd_usrp_master = uhd.usrp_sink(
device_addr="addr=192.168.10.4",
io_type=uhd.io_type.COMPLEX_FLOAT32,
num_channels=1,
)
self.uhd_usrp_master.set_clock_config(uhd.clock_config.internal(),0)
self.uhd_usrp_master.set_samp_rate(self.samp_rate)
self.uhd_usrp_master.set_center_freq(self.center_frequency, 0)
self.uhd_usrp_master.set_gain(self.tx_gain, 0)
[Attachment #3 (text/html)]
Hi all,<br><br>I continue working on trying a 2x1 mimo system based on the \
benchmark_ofdm_mimo from Tom Rondeau's repository. I have done several trials and \
I am losing my mind trying to see why it doesn't work. I am using two USRP2 in \
the transmitter side and another one in the recevier side with XCVR2450 <span \
class="il">daughterboards, </span>GNU C++ version 4.4.1 [gcc-4_4-branch revision \
150839]; Boost_103900; UHD_003.004.000-122b947. In the receiver side all I see is a \
lot of messages with just an x, and every 10 x (more or less) I get a message: got \
preamble. I've been looking into the code and this messages are generated in the \
alamouti frame acquisition block. I guess the problem is in this very same block, \
when the synchronization has to be accomplished. I think this can be caused by a poor \
snr, but I don't know how to improve this in order to get this mimo configuration \
to work. I would like to share also the way I've configured the uhd_usrp2 sinks \
to see if maybe there is any error there. At this point, I would really appreciate \
any help! Thanks in advance:<br> <br>This is how I configured the usrp2:<br><br> \
# UHD USRP2 sinks<br> self.uhd_usrp_slave = uhd.usrp_sink(<br> \
device_addr="addr=192.168.20.3",<br> \
io_type=uhd.io_type.COMPLEX_FLOAT32,<br> num_channels=1,<br> )<br> \
_config = uhd.clock_config()<br> _config.ref_source = \
uhd.clock_config.REF_MIMO<br> _config.pps_source = \
uhd.clock_config.PPS_MIMO<br> self.uhd_usrp_slave.set_clock_config(_config, \
0)<br> self.uhd_usrp_slave.set_samp_rate(self.samp_rate)<br> \
self.uhd_usrp_slave.set_center_freq(self.center_frequency, 0)<br> \
self.uhd_usrp_slave.set_gain(self.tx_gain, 0)<br><br> self.uhd_usrp_master = \
uhd.usrp_sink(<br> device_addr="addr=192.168.10.4",<br> \
io_type=uhd.io_type.COMPLEX_FLOAT32,<br> num_channels=1,<br> )<br> \
self.uhd_usrp_master.set_clock_config(uhd.clock_config.internal(),0)<br> \
self.uhd_usrp_master.set_samp_rate(self.samp_rate)<br> \
self.uhd_usrp_master.set_center_freq(self.center_frequency, 0)<br> \
self.uhd_usrp_master.set_gain(self.tx_gain, 0)<br>
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