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List:       gcc-bugs
Subject:    [Bug target/61983] New: 64 bit floating point instructions created for 32 bit FPU on MIPS r5900
From:       "JuergenUrban at gmx dot de" <gcc-bugzilla () gcc ! gnu ! org>
Date:       2014-07-31 20:54:02
Message-ID: bug-61983-4 () http ! gcc ! gnu ! org/bugzilla/
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61983

            Bug ID: 61983
           Summary: 64 bit floating point instructions created for 32 bit
                    FPU on MIPS r5900
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: JuergenUrban at gmx dot de

Created attachment 33221
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=33221&action=edit
Test code

When compiling the attached test code, the following errors occur:

mips64r5900el-linux-gnu-gcc -mhard-float -msingle-float -march=r5900 -mabi=n32
-c -o test.o float64test.c
/tmp/ccFuqKvD.s: Assembler messages:
/tmp/ccFuqKvD.s:28: Error: opcode not supported on this processor: r5900
(mips3) `dmtc1 $4,$f0'
/tmp/ccFuqKvD.s:29: Error: opcode not supported on this processor: r5900
(mips3) `dmtc1 $2,$f2'
/tmp/ccFuqKvD.s:66: Error: opcode not supported on this processor: r5900
(mips3) `dmfc1 $2,$f0'
/tmp/ccFuqKvD.s:67: Error: opcode not supported on this processor: r5900
(mips3) `dmfc1 $4,$f2'
/tmp/ccFuqKvD.s:72: Error: opcode not supported on this processor: r5900
(mips3) `dmtc1 $4,$f0'
/tmp/ccFuqKvD.s:73: Error: opcode not supported on this processor: r5900
(mips3) `dmtc1 $2,$f2'

The MIPS r5900 supports 64 bit instructions, but doesn't have a 64 bit FPU. It
just has a 32 bit FPU. The compiler should not create dmtc1 or dmfc1.

The instructions as created in function mips_output_move() file
gcc-4.9.0/gcc/config/mips/mips.c line 4583/4538:
return dbl_p ? "dmtc1\t%z1,%0" : "mtc1\t%z1,%0";
return dbl_p ? "dmfc1\t%0,%1" : "mfc1\t%0,%1";
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