[prev in list] [next in list] [prev in thread] [next in thread]
List: gcc
Subject: Re: Asm volatile causing performance regressions on ARM
From: Eric Botcazou <ebotcazou () adacore ! com>
Date: 2014-02-28 12:35:16
Message-ID: 1427919.0sXGq7JqJd () polaris
[Download RAW message or body]
> But here too the point is that we don't assume the same thing at the
> tree level or during register allocation. It seems a bit silly for
> the scheduler to assume that all hard registers are clobbered when the
> register allocator itself doesn't assume that. And most rtl passes
> assume that changes to pseudo registers are explicitly modelled via SETs
> or CLOBBERs.
OK, let's declare volatile asms dead as full optimization barriers then, which
means that they will need to be taken out of volatile_insn_p eventually and
the comments in the RTL middle-end adjusted.
In the short term, i.e. for 4.8.x/4.9.x, we cannot simply revert the patch
because it has been written to catch UNSPEC_VOLATILE. So we could devise
another, temporary predicate in rtlanal.c that would be volatile_insn_p minus
volatile asms and invoke it from the places in cse.c, cselib.c and dse.c which
have been changed by the patch.
--
Eric Botcazou
[prev in list] [next in list] [prev in thread] [next in thread]
Configure |
About |
News |
Add a list |
Sponsored by KoreLogic