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List:       gcc
Subject:    Re: cache misses in gcc 3.3
From:       Andi Kleen <ak () suse ! de>
Date:       2003-02-13 23:13:53
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Mike Stump <mstump@apple.com> writes:

> Not necessarily.  At Apple, we use a magic instruction, akin to the 
> read timestamp instruction on the x86.  On the x86, it is 9 ticks of 
> the processor clock on an AMD processor, and that is farily low, given 
> how slow compiles actually are.  One can inline and if the difference 
> is < limit, just reuse the last gettimeofday time, and if >, it can 
> call a real function to do it the slow way.

The TSCs are often turned off on large multiprocessor x86 SMP systems,
because they can go out of sync or the CPUs are deliberately clocked
at slightly different frequencies to make EMP shielding easier. So you
cannot rely on RDTSC working or giving meaningful answers.

-Andi
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