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List:       gcc
Subject:    Re: Copying SI regs as HI subregs
From:       Alan Lehotsky <apl () alum ! mit ! edu>
Date:       2002-02-28 14:03:09
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There are a couple of ports that use 8 (or 16 bit) machines to implement a machine
with 32 bit int.  Take a look at the AVR port for example.   The ip2k port does a lot
of interesting things (in my not-so-humble opinion), but it doesn't seem to have been
submitted to the FSF yet - you might try checking directly  with Ubicom (www.ubicom.com)


At 10:24 AM +0000 2/28/02, D. Towner wrote:

>Hi all,
>
>I am porting gcc to a machine which uses 2 HImode regs to represent an
>SImode reg. Currently, a movsi instruction emits two register moves to
>copy the value:
>
>MOVE lowpartSrc, lowpartDest
>MOVE highpartSRC, highpartDest
>
>Is it more efficient to use RTL to generate the two subreg moves
>explicitly?

	It can be in some circumstances - but it will seriously impact things like
	constant-folding and combine if you split these operations up too early.

	In the ports that I've done, it's generally been a good idea to use SI mode RTL and
	write DEFINE_SPLIT patterns that break up the simple moves into two HI mode
	moves.  (or 4 QI moves) You need to be careful about splitting up memory operations and things that
	"overlap" [e.g., suppose register allocation leads to something like:

			(set (reg:SI r2) (reg:SI r1))

	which would expand to copy r1:r2 into r2:r3.  If the split moves are in the
	wrong order, you will overwrite r2 with the old value in r1 before you copy
	the old value from r2 into r3

	The bulk of the SI operations probably aren't worth splitting.  There just isn't much
	"clever" that you can do to the pieces of a split-up ADD or MUL.  [Of course, if you have
	delay slots, it may be possible to put one of the HI operations into a delay slot when the
	SI operation has two instructions that won't fit - so your-mileage-may-vary....]

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