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List: fwts-devel
Subject: ACK: [PATCH] cpu/msr: skip MSR MCG_CTL (0x17b) for AMD CPUS
From: ivanhu <ivan.hu () canonical ! com>
Date: 2020-10-19 3:40:30
Message-ID: 4f01f227-918b-7bfa-9d1a-564c3fbf228f () canonical ! com
[Download RAW message or body]
On 10/9/20 12:35 PM, Alex Hung wrote:
> AMD CPU only report the extension MCA banks on CPU0.
>
> BugLink: https://bugs.launchpad.net/fwts/+bug/1897220
>
> Signed-off-by: Alex Hung <alex.hung@canonical.com>
> ---
> src/cpu/msr/msr.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
> index 3a8722c2..c4edc5b8 100644
> --- a/src/cpu/msr/msr.c
> +++ b/src/cpu/msr/msr.c
> @@ -270,7 +270,9 @@ static const msr_info AMD_MSRs[] = {
> { "MCG_CAP", 0x00000179, 0x0000000001ff0fffULL, NULL },
> */
> { "MCG_STATUS", 0x0000017a, 0xffffffffffffffffULL, NULL },
> + /* MCG_CTL differs in Ryzen 4000 series and probably later series
> { "MCG_CTL", 0x0000017b, 0xffffffffffffffffULL, NULL },
> + */
> { "MTRR_PHYSBASE0", 0x00000200, 0xffffffffffffffffULL, NULL },
> { "MTRR_PHYSMASK0", 0x00000201, 0xffffffffffffffffULL, NULL },
> { "MTRR_PHYSBASE1", 0x00000202, 0xffffffffffffffffULL, NULL },
>
Acked-by: Ivan Hu <ivan.hu@canonical.com>
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