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List: fwts-devel
Subject: [PATCH 2/2] fwts-test: fix up tests related to iasl and syntaxcheck changes
From: Colin King <colin.king () canonical ! com>
Date: 2014-05-29 13:59:22
Message-ID: 1401371962-32375-3-git-send-email-colin.king () canonical ! com
[Download RAW message or body]
From: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
.../arg-show-tests-0001/arg-show-tests-0001.log | 2 +-
.../arg-show-tests-full-0001.log | 7 +-
fwts-test/disassemble-0001/DSDT.dsl.original | 6636 --------------------
fwts-test/disassemble-0001/DSDT0.dsl.original | 6636 ++++++++++++++++++++
fwts-test/disassemble-0001/SSDT0.dsl.original | 156 -
fwts-test/disassemble-0001/SSDT1.dsl.original | 157 +-
fwts-test/disassemble-0001/SSDT2.dsl.original | 286 +-
fwts-test/disassemble-0001/SSDT3.dsl.original | 248 +-
fwts-test/disassemble-0001/SSDT4.dsl.original | 219 +-
fwts-test/disassemble-0001/SSDT5.dsl.original | 216 +
.../disassemble-0001/disassemble-aml-0001.log | 12 +-
fwts-test/disassemble-0001/test-0001.sh | 12 +-
fwts-test/syntaxcheck-0001/syntaxcheck-0001.log | 84 +-
13 files changed, 7335 insertions(+), 7336 deletions(-)
delete mode 100644 fwts-test/disassemble-0001/DSDT.dsl.original
create mode 100644 fwts-test/disassemble-0001/DSDT0.dsl.original
delete mode 100644 fwts-test/disassemble-0001/SSDT0.dsl.original
create mode 100644 fwts-test/disassemble-0001/SSDT5.dsl.original
diff --git a/fwts-test/arg-show-tests-0001/arg-show-tests-0001.log \
b/fwts-test/arg-show-tests-0001/arg-show-tests-0001.log index 9833208..0b3c17b 100644
--- a/fwts-test/arg-show-tests-0001/arg-show-tests-0001.log
+++ b/fwts-test/arg-show-tests-0001/arg-show-tests-0001.log
@@ -36,7 +36,7 @@ Batch tests:
pciirq PCI IRQ Routing Table test.
pnp BIOS Support Installation structure test.
securebootcert UEFI secure boot test.
- syntaxcheck Re-assemble DSDT and find syntax errors and warnings.
+ syntaxcheck Re-assemble DSDT and SSDTs to find syntax errors and warnings.
version Gather kernel system information.
virt CPU Virtualisation Configuration test.
wakealarm ACPI Wakealarm tests.
diff --git a/fwts-test/arg-show-tests-full-0001/arg-show-tests-full-0001.log \
b/fwts-test/arg-show-tests-full-0001/arg-show-tests-full-0001.log index \
074a0f1..1ff7c06 100644
--- a/fwts-test/arg-show-tests-full-0001/arg-show-tests-full-0001.log
+++ b/fwts-test/arg-show-tests-full-0001/arg-show-tests-full-0001.log
@@ -255,9 +255,8 @@ Batch tests:
PnP BIOS Support Installation structure test.
securebootcert (1 test):
UEFI secure boot test.
- syntaxcheck (2 tests):
- Disassemble and reassemble DSDT
- Disassemble and reassemble SSDT
+ syntaxcheck (1 test):
+ Disassemble and reassemble DSDT and SSDTs.
version (4 tests):
Gather kernel signature.
Gather kernel system information.
@@ -367,4 +366,4 @@ UEFI tests:
Test UEFI RT service set variable interface stress test.
Test UEFI RT service query variable info interface stress test.
-Total of 286 tests
+Total of 285 tests
diff --git a/fwts-test/disassemble-0001/DSDT.dsl.original \
b/fwts-test/disassemble-0001/DSDT.dsl.original deleted file mode 100644
index f8b38e6..0000000
--- a/fwts-test/disassemble-0001/DSDT.dsl.original
+++ /dev/null
@@ -1,6636 +0,0 @@
-/*
- * Intel ACPI Component Architecture
- * AML Disassembler version 20140325-64 [Mar 25 2014]
- * Copyright (c) 2000 - 2014 Intel Corporation
- *
- * Disassembly of /tmp/fwts_iasl_27987_DSDT.dat, Tue Mar 25 20:18:15 2014
- *
- * Original Table Header:
- * Signature "DSDT"
- * Length 0x00005FF4 (24564)
- * Revision 0x02
- * Checksum 0x11
- * OEM ID "TOSCPL"
- * OEM Table ID "CRESTLNE"
- * OEM Revision 0x06040000 (100925440)
- * Compiler ID "INTL"
- * Compiler Version 0x20060608 (537265672)
- */
-DefinitionBlock ("/tmp/fwts_iasl_27987_DSDT.aml", "DSDT", 2, "TOSCPL", "CRESTLNE", \
0x06040000)
-{
-
- External (_PR_.CPU0._PPC, UnknownObj)
- External (CFGD, UnknownObj)
- External (PDC0, UnknownObj)
- External (PDC1, UnknownObj)
-
- Name (Z000, One)
- Name (Z001, 0x02)
- Name (Z002, 0x04)
- Name (Z003, 0x08)
- Name (Z004, Zero)
- Name (Z005, 0x0F)
- Name (Z006, 0x0D)
- Name (Z007, 0x0B)
- Name (Z008, 0x09)
- Name (ECDY, 0x07)
- Mutex (MUTX, 0x00)
- OperationRegion (PRT0, SystemIO, 0x80, 0x04)
- Field (PRT0, DWordAcc, Lock, Preserve)
- {
- P80H, 32
- }
-
- Method (P8XH, 2, Serialized)
- {
- If (LEqual (Arg0, Zero))
- {
- Store (Or (And (P80D, 0xFFFFFF00), Arg1), P80D) /* \P80D */
- }
-
- If (LEqual (Arg0, One))
- {
- Store (Or (And (P80D, 0xFFFF00FF), ShiftLeft (Arg1, 0x08)
- ), P80D) /* \P80D */
- }
-
- If (LEqual (Arg0, 0x02))
- {
- Store (Or (And (P80D, 0xFF00FFFF), ShiftLeft (Arg1, 0x10)
- ), P80D) /* \P80D */
- }
-
- If (LEqual (Arg0, 0x03))
- {
- Store (Or (And (P80D, 0x00FFFFFF), ShiftLeft (Arg1, 0x18)
- ), P80D) /* \P80D */
- }
-
- Store (P80D, P80H) /* \P80H */
- }
-
- Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model
- {
- Store (Arg0, GPIC) /* \GPIC */
- }
-
- Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep
- {
- Store (Zero, P80D) /* \P80D */
- P8XH (Zero, Arg0)
- If (LEqual (Arg0, 0x03))
- {
- Store (One, \_SB.PCI0.LPCB.EC0.S3LD)
- }
-
- If (LEqual (Arg0, 0x04))
- {
- Store (One, \_SB.PCI0.LPCB.EC0.S3LD)
- \_SB.PCI0.LPCB.PHSS (0x0E)
- }
- }
-
- Method (_WAK, 1, NotSerialized) // _WAK: Wake
- {
- P8XH (One, 0xAB)
- If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))
- {
- If (And (CFGD, 0x01000000))
- {
- If (LAnd (And (CFGD, 0xF0), LEqual (OSYS, 0x07D1)))
- {
- TRAP (0x3D)
- }
- }
- }
-
- If (LEqual (RP1D, Zero))
- {
- Notify (\_SB.PCI0.RP01, Zero) // Bus Check
- }
-
- If (LEqual (RP2D, Zero))
- {
- Notify (\_SB.PCI0.RP02, Zero) // Bus Check
- }
-
- If (LEqual (RP3D, Zero))
- {
- Notify (\_SB.PCI0.RP03, Zero) // Bus Check
- }
-
- If (LEqual (RP4D, Zero))
- {
- Notify (\_SB.PCI0.RP04, Zero) // Bus Check
- }
-
- If (LEqual (RP5D, Zero))
- {
- Notify (\_SB.PCI0.RP05, Zero) // Bus Check
- }
-
- If (LEqual (RP6D, Zero))
- {
- Notify (\_SB.PCI0.RP06, Zero) // Bus Check
- }
-
- If (LEqual (Arg0, 0x03))
- {
- P8XH (Zero, 0x30)
- TRAP (0x46)
- }
-
- If (LEqual (Arg0, 0x04))
- {
- P8XH (Zero, 0x40)
- \_SB.PCI0.LPCB.PHSS (0x0F)
- Store (WAKF, Local0)
- Store (Zero, WAKF) /* \WAKF */
- And (Local0, 0x05, Local0)
- If (LEqual (Local0, One))
- {
- P8XH (Zero, 0x41)
- Notify (\_SB.PWRB, 0x02) // Device Wake
- }
-
- If (DTSE)
- {
- TRAP (0x47)
- If (LAnd (\_SB.PCI0.LPCB.ECOK (), LEqual (ECDY, Zero)))
- {
- If (LGreaterEqual (DTS1, DTS2))
- {
- Store (DTS1, \_SB.PCI0.LPCB.EC0.SKTA)
- }
- Else
- {
- Store (DTS2, \_SB.PCI0.LPCB.EC0.SKTA)
- }
- }
- Else
- {
- \_SB.PCI0.LPCB.PHSS (0x10)
- }
- }
- }
-
- \_PR.RPPC ()
- Return (Package (0x02)
- {
- Zero,
- Zero
- })
- }
-
- Method (GETB, 3, Serialized)
- {
- Multiply (Arg0, 0x08, Local0)
- Multiply (Arg1, 0x08, Local1)
- CreateField (Arg2, Local0, Local1, TBF3)
- Return (TBF3) /* \GETB.TBF3 */
- }
-
- Method (PNOT, 0, Serialized)
- {
- If (MPEN)
- {
- If (And (PDC0, 0x08))
- {
- Notify (\_PR.CPU0, 0x80) // Performance Capability Change
- If (And (PDC0, 0x10))
- {
- Sleep (0x64)
- Notify (\_PR.CPU0, 0x81) // C-State Change
- }
- }
-
- If (And (PDC1, 0x08))
- {
- Notify (\_PR.CPU1, 0x80) // Performance Capability Change
- If (And (PDC1, 0x10))
- {
- Sleep (0x64)
- Notify (\_PR.CPU1, 0x81) // C-State Change
- }
- }
- }
- Else
- {
- Notify (\_PR.CPU0, 0x80) // Performance Capability Change
- Sleep (0x64)
- Notify (\_PR.CPU0, 0x81) // C-State Change
- }
- }
-
- Method (TRAP, 1, Serialized)
- {
- Store (Arg0, SMIF) /* \SMIF */
- Store (Zero, TRP0) /* \TRP0 */
- Return (SMIF) /* \SMIF */
- }
-
- Scope (_SB)
- {
- Method (_INI, 0, NotSerialized) // _INI: Initialize
- {
- Store (0x9999, MARK) /* \MARK */
- If (DTSE)
- {
- TRAP (0x47)
- ^PCI0.LPCB.PHSS (0x10)
- }
-
- Store (0x07D0, OSYS) /* \OSYS */
- If (CondRefOf (_OSI, Local0))
- {
- If (_OSI ("Linux"))
- {
- Store (One, LINX) /* \LINX */
- Store (Zero, ECDY) /* \ECDY */
- }
-
- If (_OSI ("Windows 2001"))
- {
- Store (0x07D1, OSYS) /* \OSYS */
- }
-
- If (_OSI ("Windows 2001 SP1"))
- {
- Store (0x07D1, OSYS) /* \OSYS */
- }
-
- If (_OSI ("Windows 2001 SP2"))
- {
- Store (0x07D2, OSYS) /* \OSYS */
- }
-
- If (_OSI ("Windows 2006"))
- {
- Store (0x07D6, OSYS) /* \OSYS */
- }
- }
-
- If (LAnd (MPEN, LEqual (OSYS, 0x07D1)))
- {
- TRAP (0x3D)
- }
-
- TRAP (0x2B)
- }
- }
-
- OperationRegion (GNVS, SystemMemory, 0xBF6E2DBC, 0x0100)
- Field (GNVS, AnyAcc, Lock, Preserve)
- {
- OSYS, 16,
- SMIF, 8,
- PRM0, 8,
- PRM1, 8,
- SCIF, 8,
- PRM2, 8,
- PRM3, 8,
- LCKF, 8,
- PRM4, 8,
- PRM5, 8,
- P80D, 32,
- LIDS, 8,
- PWRS, 8,
- DBGS, 8,
- LINX, 8,
- Offset (0x14),
- ACT1, 8,
- ACTT, 8,
- PSVT, 8,
- TC1V, 8,
- TC2V, 8,
- TSPV, 8,
- CRTT, 8,
- DTSE, 8,
- DTS1, 8,
- DTS2, 8,
- Offset (0x28),
- APIC, 8,
- MPEN, 8,
- PCP0, 8,
- PCP1, 8,
- PPCM, 8,
- Offset (0x32),
- CMAP, 8,
- CMBP, 8,
- LPTP, 8,
- FDCP, 8,
- Offset (0x3C),
- IGDS, 8,
- TLST, 8,
- CADL, 8,
- PADL, 8,
- CSTE, 16,
- NSTE, 16,
- SSTE, 16,
- NDID, 8,
- DID1, 32,
- DID2, 32,
- DID3, 32,
- DID4, 32,
- DID5, 32,
- Offset (0x67),
- BLCS, 8,
- BRTL, 8,
- ALSE, 8,
- ALAF, 8,
- LLOW, 8,
- LHIH, 8,
- Offset (0x6E),
- EMAE, 8,
- EMAP, 16,
- EMAL, 16,
- Offset (0x74),
- MEFE, 8,
- Offset (0x78),
- TPMP, 8,
- TPME, 8,
- Offset (0x82),
- GTF0, 56,
- GTF2, 56,
- IDEM, 8,
- GTF1, 56,
- Offset (0xAA),
- ASLB, 32,
- IBTT, 8,
- IPAT, 8,
- ITVF, 8,
- ITVM, 8,
- IPSC, 8,
- IBLC, 8,
- IBIA, 8,
- ISSC, 8,
- I409, 8,
- I509, 8,
- I609, 8,
- I709, 8,
- IDMM, 8,
- IDMS, 8,
- IF1E, 8,
- HVCO, 8,
- NXD1, 32,
- NXD2, 32,
- MARK, 16,
- BRAD, 8,
- BTEN, 8,
- VVEN, 8,
- BGTL, 8,
- TMEE, 1,
- Offset (0xCD),
- SCU0, 1,
- SCU1, 1,
- SCU2, 1,
- SCU3, 1,
- Offset (0xCE),
- XKSP, 1,
- XKIN, 1,
- XKID, 1,
- XKOK, 1,
- Offset (0xCF),
- BGU1, 8,
- BST1, 8,
- BFC1, 16,
- WKLN, 8,
- WAKF, 8,
- DSMD, 8,
- BAYS, 8,
- HAPE, 1,
- Offset (0xD8),
- DTSM, 1,
- Offset (0xD9),
- ODT1, 8,
- ODT2, 8,
- DTSW, 8
- }
-
- Name (DSEN, One)
- Name (ECON, Zero)
- Name (GPIC, Zero)
- Name (CTYP, Zero)
- Name (L01C, Zero)
- Name (VFN0, Zero)
- Name (VFN1, Zero)
- Scope (_GPE)
- {
- Method (_L01, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- Add (L01C, One, L01C) /* \L01C */
- P8XH (Zero, One)
- P8XH (One, L01C)
- If (LAnd (LEqual (RP1D, Zero), \_SB.PCI0.RP01.HPSX))
- {
- Sleep (0x64)
- If (\_SB.PCI0.RP01.PDCX)
- {
- Store (One, \_SB.PCI0.RP01.PDCX)
- Store (One, \_SB.PCI0.RP01.HPSX)
- Notify (\_SB.PCI0.RP01, Zero) // Bus Check
- }
- Else
- {
- Store (One, \_SB.PCI0.RP01.HPSX)
- }
- }
-
- If (LAnd (LEqual (RP2D, Zero), \_SB.PCI0.RP02.HPSX))
- {
- Sleep (0x64)
- If (\_SB.PCI0.RP02.PDCX)
- {
- Store (One, \_SB.PCI0.RP02.PDCX)
- Store (One, \_SB.PCI0.RP02.HPSX)
- Notify (\_SB.PCI0.RP02, Zero) // Bus Check
- }
- Else
- {
- Store (One, \_SB.PCI0.RP02.HPSX)
- }
- }
-
- If (LAnd (LEqual (RP3D, Zero), \_SB.PCI0.RP03.HPSX))
- {
- Sleep (0x64)
- If (\_SB.PCI0.RP03.PDCX)
- {
- Store (One, \_SB.PCI0.RP03.PDCX)
- Store (One, \_SB.PCI0.RP03.HPSX)
- Notify (\_SB.PCI0.RP03, Zero) // Bus Check
- }
- Else
- {
- Store (One, \_SB.PCI0.RP03.HPSX)
- }
- }
-
- If (LAnd (LEqual (RP4D, Zero), \_SB.PCI0.RP04.HPSX))
- {
- Sleep (0x64)
- If (\_SB.PCI0.RP04.PDCX)
- {
- Store (One, \_SB.PCI0.RP04.PDCX)
- Store (One, \_SB.PCI0.RP04.HPSX)
- Notify (\_SB.PCI0.RP04, Zero) // Bus Check
- }
- Else
- {
- Store (One, \_SB.PCI0.RP04.HPSX)
- }
- }
-
- If (LAnd (LEqual (RP5D, Zero), \_SB.PCI0.RP05.HPSX))
- {
- Sleep (0x64)
- If (\_SB.PCI0.RP05.PDCX)
- {
- Store (One, \_SB.PCI0.RP05.PDCX)
- Store (One, \_SB.PCI0.RP05.HPSX)
- Notify (\_SB.PCI0.RP05, Zero) // Bus Check
- }
- Else
- {
- Store (One, \_SB.PCI0.RP05.HPSX)
- }
- }
-
- If (LAnd (LEqual (RP6D, Zero), \_SB.PCI0.RP06.HPSX))
- {
- Sleep (0x64)
- If (\_SB.PCI0.RP06.PDCX)
- {
- Store (One, \_SB.PCI0.RP06.PDCX)
- Store (One, \_SB.PCI0.RP06.HPSX)
- Notify (\_SB.PCI0.RP06, Zero) // Bus Check
- }
- Else
- {
- Store (One, \_SB.PCI0.RP06.HPSX)
- }
- }
- }
-
- Method (_L02, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- Store (Zero, GPEC) /* \GPEC */
- If (\_SB.PCI0.LPCB.ECOK ())
- {
- If (LEqual (DTSW, One))
- {
- If (LGreaterEqual (DTS1, DTS2))
- {
- Store (DTS1, \_SB.PCI0.LPCB.EC0.SKTA)
- }
- Else
- {
- Store (DTS2, \_SB.PCI0.LPCB.EC0.SKTA)
- }
- }
- Else
- {
- If (LGreaterEqual (ODT1, ODT2))
- {
- Store (ODT1, \_SB.PCI0.LPCB.EC0.SKTA)
- }
- Else
- {
- Store (ODT2, \_SB.PCI0.LPCB.EC0.SKTA)
- }
- }
- }
- Else
- {
- \_SB.PCI0.LPCB.PHSS (0x10)
- }
- }
-
- Method (_L03, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- Notify (\_SB.PCI0.USB1, 0x02) // Device Wake
- }
-
- Method (_L04, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- Notify (\_SB.PCI0.USB2, 0x02) // Device Wake
- }
-
- Method (_L05, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- Notify (\_SB.PCI0.USB5, 0x02) // Device Wake
- }
-
- Method (_L06, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- If (\_SB.PCI0.GFX0.GSSE)
- {
- \_SB.PCI0.GFX0.GSCI ()
- }
- Else
- {
- Store (One, SCIS) /* \SCIS */
- }
- }
-
- Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- If (\_SB.PCI0.RP01.PSPX)
- {
- Store (One, \_SB.PCI0.RP01.PSPX)
- Store (One, \_SB.PCI0.RP01.PMSX)
- Notify (\_SB.PCI0.RP01, 0x02) // Device Wake
- }
-
- If (\_SB.PCI0.RP02.PSPX)
- {
- Store (One, \_SB.PCI0.RP02.PSPX)
- Store (One, \_SB.PCI0.RP02.PMSX)
- Notify (\_SB.PCI0.RP02, 0x02) // Device Wake
- }
-
- If (\_SB.PCI0.RP03.PSPX)
- {
- Store (One, \_SB.PCI0.RP03.PSPX)
- Store (One, \_SB.PCI0.RP03.PMSX)
- Notify (\_SB.PCI0.RP03, 0x02) // Device Wake
- }
-
- If (\_SB.PCI0.RP04.PSPX)
- {
- Store (One, \_SB.PCI0.RP04.PSPX)
- Store (One, \_SB.PCI0.RP04.PMSX)
- Notify (\_SB.PCI0.RP04, 0x02) // Device Wake
- }
-
- If (\_SB.PCI0.RP05.PSPX)
- {
- Store (One, \_SB.PCI0.RP05.PSPX)
- Store (One, \_SB.PCI0.RP05.PMSX)
- Notify (\_SB.PCI0.RP05, 0x02) // Device Wake
- }
-
- If (\_SB.PCI0.RP06.PSPX)
- {
- Store (One, \_SB.PCI0.RP06.PSPX)
- Store (One, \_SB.PCI0.RP06.PMSX)
- Notify (\_SB.PCI0.RP06, 0x02) // Device Wake
- }
- }
-
- Method (_L0B, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- Notify (\_SB.PCI0.PCIB, 0x02) // Device Wake
- }
-
- Method (_L0C, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- Notify (\_SB.PCI0.USB3, 0x02) // Device Wake
- }
-
- Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- If (\_SB.PCI0.EHC1.PMES)
- {
- Store (One, \_SB.PCI0.EHC1.PMES)
- Notify (\_SB.PCI0.EHC1, 0x02) // Device Wake
- }
-
- If (\_SB.PCI0.EHC2.PMES)
- {
- Store (One, \_SB.PCI0.EHC2.PMES)
- Notify (\_SB.PCI0.EHC2, 0x02) // Device Wake
- }
-
- If (\_SB.PCI0.HDEF.PMES)
- {
- Store (One, \_SB.PCI0.HDEF.PMES)
- Notify (\_SB.PCI0.HDEF, 0x02) // Device Wake
- }
- }
-
- Method (_L0E, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- Notify (\_SB.PCI0.USB4, 0x02) // Device Wake
- }
-
- Method (_L1B, 0, NotSerialized) // _Lxx: Level-Triggered GPE
- {
- Not (LPOL, LPOL) /* \LPOL */
- Notify (\_SB.LID0, 0x80) // Status Change
- }
- }
-
- Scope (_PR)
- {
- Processor (CPU0, 0x00, 0x00001010, 0x06) {}
- Processor (CPU1, 0x01, 0x00001010, 0x06) {}
- Method (RPPC, 0, NotSerialized)
- {
- If (LEqual (OSYS, 0x07D2))
- {
- If (And (CFGD, One))
- {
- If (LGreater (^CPU0._PPC, Zero))
- {
- Subtract (^CPU0._PPC, One, ^CPU0._PPC) /* External reference \
*/
- PNOT ()
- Add (^CPU0._PPC, One, ^CPU0._PPC) /* External reference */
- PNOT ()
- }
- Else
- {
- Add (^CPU0._PPC, One, ^CPU0._PPC) /* External reference */
- PNOT ()
- Subtract (^CPU0._PPC, One, ^CPU0._PPC) /* External reference \
*/
- PNOT ()
- }
- }
- }
- }
- }
-
- Name (FWSO, "FWSO")
- Name (_PSC, Zero) // _PSC: Power State Current
- Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
- {
- Store (_PSC, Local0)
- Store (Zero, _PSC) /* \_PSC */
- }
-
- Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
- {
- Store (0x03, _PSC) /* \_PSC */
- }
-
- Scope (_SB)
- {
- Device (AMW0)
- {
- Name (_HID, "pnp0c14") // _HID: Hardware ID
- Name (_UID, Zero) // _UID: Unique ID
- Name (_WDG, Buffer (0x3C)
- {
- /* 0000 */ 0xA7, 0x1D, 0x85, 0x2E, 0x53, 0xD0, 0x5F, 0x49,
- /* 0008 */ 0x9D, 0xFA, 0x1A, 0x4A, 0xD6, 0x2E, 0x6A, 0x86,
- /* 0010 */ 0x41, 0x43, 0x01, 0x00, 0x3B, 0x6D, 0x43, 0x71,
- /* 0018 */ 0xDD, 0xFB, 0x72, 0x4C, 0xBC, 0xB8, 0x43, 0x5B,
- /* 0020 */ 0xFE, 0x0D, 0x64, 0xF9, 0x42, 0x43, 0x01, 0x00,
- /* 0028 */ 0x21, 0x12, 0x90, 0x05, 0x66, 0xD5, 0xD1, 0x11,
- /* 0030 */ 0xB2, 0xF0, 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10,
- /* 0038 */ 0x42, 0x41, 0x01, 0x00
- })
- Name (STAC, Buffer (0x04)
- {
- 0x01, 0x14, 0x03, 0x00
- })
- Method (WQAC, 1, NotSerialized)
- {
- Store ("MXMTCConfigData", Debug)
- Return (STAC) /* \_SB_.AMW0.STAC */
- }
-
- Name (STBC, Buffer (0x04)
- {
- 0x01, 0x00, 0x00, 0x00
- })
- Method (WQBC, 1, NotSerialized)
- {
- Store ("Get MXMTCControlData: STBC = ", Debug)
- Store (STBC, Debug)
- Return (STBC) /* \_SB_.AMW0.STBC */
- }
-
- Method (WSBC, 2, NotSerialized)
- {
- Store (Arg1, STBC) /* \_SB_.AMW0.STBC */
- Store ("Set MXMTCControlData: STBC = ", Debug)
- Store (STBC, Debug)
- If (LEqual (^^PCI0.LPCB.ECOK (), One))
- {
- Store (DerefOf (Index (STBC, One)), ^^PCI0.LPCB.EC0.SKTC) /* \
\_SB_.PCI0.LPCB.EC0_.SKTC */
- }
- }
-
- Name (WQBA, Buffer (0x02AE)
- {
- /* 0000 */ 0x46, 0x4F, 0x4D, 0x42, 0x01, 0x00, 0x00, 0x00,
- /* 0008 */ 0x9E, 0x02, 0x00, 0x00, 0xC0, 0x0B, 0x00, 0x00,
- /* 0010 */ 0x44, 0x53, 0x00, 0x01, 0x1A, 0x7D, 0xDA, 0x54,
- /* 0018 */ 0x28, 0xD9, 0x85, 0x00, 0x01, 0x06, 0x18, 0x42,
- /* 0020 */ 0x10, 0x07, 0x10, 0x0A, 0x4B, 0x61, 0x02, 0xC9,
- /* 0028 */ 0x21, 0x52, 0x3C, 0x18, 0x94, 0x05, 0x10, 0x43,
- /* 0030 */ 0x88, 0x57, 0x04, 0x44, 0x04, 0x84, 0xBC, 0x0A,
- /* 0038 */ 0xB0, 0x29, 0xC0, 0x24, 0x88, 0xFA, 0xF7, 0x87,
- /* 0040 */ 0x28, 0x09, 0x0E, 0x25, 0x04, 0x42, 0x12, 0x05,
- /* 0048 */ 0x98, 0x17, 0xA0, 0x5B, 0x80, 0x61, 0x01, 0xB6,
- /* 0050 */ 0x05, 0x98, 0x16, 0xE0, 0x18, 0x92, 0x4A, 0x03,
- /* 0058 */ 0xA7, 0x04, 0x96, 0x02, 0x21, 0xA1, 0x02, 0x94,
- /* 0060 */ 0x0B, 0xF0, 0x2D, 0x40, 0x3B, 0xA2, 0x24, 0x0B,
- /* 0068 */ 0xB0, 0x0C, 0x23, 0x02, 0x8F, 0x82, 0xA1, 0x71,
- /* 0070 */ 0x68, 0xEC, 0x30, 0x2C, 0x13, 0x4C, 0x83, 0x38,
- /* 0078 */ 0x8C, 0xB2, 0x91, 0x45, 0x60, 0xDC, 0x4E, 0x05,
- /* 0080 */ 0xC8, 0x15, 0x20, 0x4C, 0x80, 0x78, 0x54, 0x61,
- /* 0088 */ 0x34, 0x07, 0x45, 0xE0, 0x42, 0x63, 0x64, 0x40,
- /* 0090 */ 0xC8, 0xA3, 0x00, 0xAB, 0xA3, 0xD0, 0xA4, 0x12,
- /* 0098 */ 0xD8, 0xBD, 0x00, 0x65, 0x02, 0x2C, 0x0A, 0x10,
- /* 00A0 */ 0x27, 0xC0, 0x9A, 0x00, 0x63, 0x48, 0x32, 0x28,
- /* 00A8 */ 0x40, 0x9B, 0x00, 0x5B, 0x20, 0x42, 0x0F, 0xD4,
- /* 00B0 */ 0x19, 0x8A, 0x46, 0x70, 0x02, 0x51, 0x6A, 0x46,
- /* 00B8 */ 0x11, 0x48, 0xAC, 0x1A, 0x01, 0x85, 0x12, 0x34,
- /* 00C0 */ 0x46, 0xB0, 0x10, 0x81, 0xC2, 0x86, 0x37, 0x46,
- /* 00C8 */ 0x98, 0x03, 0x88, 0xD1, 0xFE, 0x20, 0x48, 0x20,
- /* 00D0 */ 0x05, 0xE3, 0x66, 0x91, 0x46, 0x83, 0x1A, 0x6B,
- /* 00D8 */ 0x82, 0x63, 0xF7, 0x68, 0x4E, 0xB8, 0x73, 0x01,
- /* 00E0 */ 0xD2, 0xE7, 0x26, 0x90, 0xA3, 0x3B, 0xB8, 0x3A,
- /* 00E8 */ 0x07, 0x4D, 0x86, 0xC7, 0xB0, 0x1E, 0x06, 0xD8,
- /* 00F0 */ 0x29, 0x00, 0xEF, 0x1A, 0x50, 0xD3, 0x3F, 0x78,
- /* 00F8 */ 0x26, 0x08, 0x0E, 0x35, 0x44, 0x8F, 0x3A, 0xDC,
- /* 0100 */ 0x09, 0x1C, 0xFB, 0x91, 0x30, 0x88, 0xB3, 0x3B,
- /* 0108 */ 0x6E, 0xAC, 0xC3, 0xC9, 0x68, 0xD0, 0xA5, 0x0A,
- /* 0110 */ 0x30, 0x7B, 0x00, 0xD0, 0xD0, 0x12, 0x9C, 0xF6,
- /* 0118 */ 0x99, 0x84, 0x7E, 0x0F, 0x38, 0x9F, 0x9E, 0x21,
- /* 0120 */ 0x89, 0xFC, 0x41, 0xA0, 0x46, 0xE6, 0xFF, 0x3F,
- /* 0128 */ 0xB4, 0xC7, 0x78, 0x5A, 0x31, 0x43, 0x3E, 0x0B,
- /* 0130 */ 0x1C, 0x16, 0x13, 0x0B, 0xA1, 0x4D, 0x6A, 0x3C,
- /* 0138 */ 0x40, 0x40, 0xE1, 0xD1, 0x40, 0x08, 0x6F, 0x06,
- /* 0140 */ 0x9E, 0xAF, 0x09, 0x46, 0x86, 0x90, 0x93, 0xF1,
- /* 0148 */ 0xA0, 0x06, 0xE0, 0x41, 0xD7, 0x3A, 0x32, 0x8D,
- /* 0150 */ 0x27, 0xA6, 0x21, 0xCF, 0xE8, 0x00, 0x22, 0xBF,
- /* 0158 */ 0x32, 0x78, 0x0C, 0x41, 0x02, 0xF9, 0xC4, 0x60,
- /* 0160 */ 0xB8, 0xC7, 0x81, 0x13, 0x78, 0x02, 0xF0, 0x59,
- /* 0168 */ 0x40, 0x10, 0x92, 0x00, 0x21, 0x51, 0xE3, 0xA7,
- /* 0170 */ 0x47, 0x08, 0x7E, 0x7A, 0x78, 0x93, 0x30, 0x28,
- /* 0178 */ 0x1F, 0xD2, 0x99, 0xF9, 0x90, 0xE1, 0x11, 0xC2,
- /* 0180 */ 0x07, 0xC4, 0x7B, 0x9F, 0x3B, 0x19, 0xC1, 0x29,
- /* 0188 */ 0x7B, 0xA4, 0xE0, 0xB0, 0x7E, 0x0E, 0x20, 0xC0,
- /* 0190 */ 0xAF, 0x0F, 0x8F, 0x0D, 0x09, 0x7C, 0xAE, 0x08,
- /* 0198 */ 0x8C, 0x1D, 0xAA, 0xFD, 0x0A, 0x40, 0x08, 0x1E,
- /* 01A0 */ 0xED, 0x51, 0xE0, 0x54, 0x23, 0x1C, 0x2D, 0x78,
- /* 01A8 */ 0x08, 0x8A, 0x1C, 0x03, 0x4A, 0xCC, 0x18, 0x50,
- /* 01B0 */ 0x03, 0x38, 0x85, 0xD0, 0xE7, 0x73, 0x04, 0x47,
- /* 01B8 */ 0x14, 0x25, 0xF6, 0x21, 0x19, 0xDA, 0x08, 0xE1,
- /* 01C0 */ 0x1F, 0x39, 0x4E, 0xC1, 0xF7, 0x8B, 0x23, 0x3D,
- /* 01C8 */ 0xAD, 0x23, 0x78, 0x91, 0xF0, 0x08, 0x30, 0xE1,
- /* 01D0 */ 0xCE, 0x28, 0xA8, 0x38, 0x30, 0xF4, 0xFF, 0x7F,
- /* 01D8 */ 0x4C, 0x01, 0xDC, 0x7A, 0x3B, 0xA6, 0x80, 0x3E,
- /* 01E0 */ 0xC0, 0x31, 0x05, 0x50, 0xFC, 0xFF, 0x3F, 0xA6,
- /* 01E8 */ 0x00, 0x87, 0xA8, 0xC7, 0x14, 0xF4, 0x40, 0x0C,
- /* 01F0 */ 0x7C, 0x2E, 0xA1, 0x0D, 0xFF, 0x96, 0xC1, 0x8E,
- /* 01F8 */ 0x03, 0x87, 0x74, 0x6A, 0x8F, 0x28, 0x80, 0x29,
- /* 0200 */ 0x79, 0x47, 0x14, 0x50, 0x8C, 0x14, 0xD6, 0xF1,
- /* 0208 */ 0x04, 0x18, 0x05, 0x3C, 0x9B, 0xA0, 0x22, 0x1D,
- /* 0210 */ 0x4F, 0x80, 0xCE, 0xFF, 0xFF, 0x78, 0x02, 0x58,
- /* 0218 */ 0xB8, 0x9A, 0xBC, 0x92, 0x84, 0x7D, 0x1E, 0x78,
- /* 0220 */ 0x1D, 0x89, 0x14, 0xE3, 0x41, 0xE2, 0xB5, 0xE4,
- /* 0228 */ 0xC1, 0x24, 0x46, 0x98, 0x08, 0x8F, 0x27, 0x1E,
- /* 0230 */ 0x47, 0xC0, 0xB7, 0x82, 0x28, 0x91, 0x8E, 0x3E,
- /* 0238 */ 0xC4, 0x83, 0x49, 0x28, 0x63, 0x3E, 0xA3, 0x84,
- /* 0240 */ 0x89, 0xF9, 0x04, 0x70, 0x22, 0xEF, 0x27, 0x46,
- /* 0248 */ 0x0A, 0x73, 0x2A, 0x8F, 0x27, 0x2C, 0xC4, 0xF1,
- /* 0250 */ 0x04, 0xA0, 0x85, 0xE2, 0xE3, 0x09, 0x3A, 0x2C,
- /* 0258 */ 0x84, 0xFE, 0xFF, 0xC7, 0x13, 0xDC, 0xE1, 0xC1,
- /* 0260 */ 0xA7, 0x0C, 0xFC, 0x85, 0x0C, 0xC6, 0xF9, 0x04,
- /* 0268 */ 0x30, 0x24, 0xF0, 0x7C, 0x02, 0xCA, 0xDB, 0x18,
- /* 0270 */ 0xE6, 0x80, 0x02, 0x8C, 0x14, 0xDA, 0xF4, 0xA9,
- /* 0278 */ 0xD1, 0xA8, 0x55, 0x83, 0x32, 0x35, 0xCA, 0x34,
- /* 0280 */ 0xA8, 0xD5, 0xA7, 0x52, 0x63, 0xC6, 0x4C, 0x9C,
- /* 0288 */ 0x52, 0xBC, 0x6C, 0x8D, 0xDF, 0xF2, 0x9E, 0x09,
- /* 0290 */ 0x02, 0xB1, 0x20, 0x0A, 0x81, 0x38, 0xCC, 0xF3,
- /* 0298 */ 0x42, 0x20, 0x96, 0xA2, 0x01, 0x84, 0x85, 0x06,
- /* 02A0 */ 0xA1, 0x42, 0xA9, 0x05, 0xE2, 0x98, 0x20, 0x34,
- /* 02A8 */ 0x92, 0x0A, 0x10, 0xF6, 0xFF, 0x07
- })
- }
-
- Device (LID0)
- {
- Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID
- Method (_LID, 0, NotSerialized) // _LID: Lid Status
- {
- Return (LPOL) /* \LPOL */
- }
- }
-
- Device (PWRB)
- {
- Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: \
Hardware ID
- }
-
- Device (PCI0)
- {
- Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
- {
- Return (0x02)
- }
-
- Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
- {
- Return (0x02)
- }
-
- Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware \
ID
- Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
- Device (MCHC)
- {
- Name (_ADR, Zero) // _ADR: Address
- OperationRegion (HBUS, PCI_Config, 0x40, 0xC0)
- Field (HBUS, DWordAcc, NoLock, Preserve)
- {
- EPEN, 1,
- , 11,
- EPBR, 20,
- Offset (0x08),
- MHEN, 1,
- , 13,
- MHBR, 18,
- Offset (0x20),
- PXEN, 1,
- PXSZ, 2,
- , 23,
- PXBR, 6,
- Offset (0x28),
- DIEN, 1,
- , 11,
- DIBR, 20,
- Offset (0x30),
- IPEN, 1,
- , 11,
- IPBR, 20,
- Offset (0x50),
- , 4,
- PM0H, 2,
- Offset (0x51),
- PM1L, 2,
- , 2,
- PM1H, 2,
- Offset (0x52),
- PM2L, 2,
- , 2,
- PM2H, 2,
- Offset (0x53),
- PM3L, 2,
- , 2,
- PM3H, 2,
- Offset (0x54),
- PM4L, 2,
- , 2,
- PM4H, 2,
- Offset (0x55),
- PM5L, 2,
- , 2,
- PM5H, 2,
- Offset (0x56),
- PM6L, 2,
- , 2,
- PM6H, 2,
- Offset (0x57),
- , 7,
- HENA, 1,
- Offset (0x62),
- TUUD, 16,
- Offset (0x70),
- , 4,
- TLUD, 12
- }
- }
-
- Name (BUF0, ResourceTemplate ()
- {
- WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
- 0x0000, // Granularity
- 0x0000, // Range Minimum
- 0x00FF, // Range Maximum
- 0x0000, // Translation Offset
- 0x0100, // Length
- ,, )
- DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, \
EntireRange,
- 0x00000000, // Granularity
- 0x00000000, // Range Minimum
- 0x00000CF7, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00000CF8, // Length
- ,, , TypeStatic)
- IO (Decode16,
- 0x0CF8, // Range Minimum
- 0x0CF8, // Range Maximum
- 0x01, // Alignment
- 0x08, // Length
- )
- DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, \
EntireRange,
- 0x00000000, // Granularity
- 0x00000D00, // Range Minimum
- 0x0000FFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x0000F300, // Length
- ,, , TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000A0000, // Range Minimum
- 0x000BFFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00020000, // Length
- ,, , AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000C0000, // Range Minimum
- 0x000C3FFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y00, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000C4000, // Range Minimum
- 0x000C7FFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y01, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000C8000, // Range Minimum
- 0x000CBFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y02, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000CC000, // Range Minimum
- 0x000CFFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y03, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000D0000, // Range Minimum
- 0x000D3FFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y04, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000D4000, // Range Minimum
- 0x000D7FFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y05, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000D8000, // Range Minimum
- 0x000DBFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y06, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000DC000, // Range Minimum
- 0x000DFFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y07, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000E0000, // Range Minimum
- 0x000E3FFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y08, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000E4000, // Range Minimum
- 0x000E7FFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y09, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000E8000, // Range Minimum
- 0x000EBFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y0A, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000EC000, // Range Minimum
- 0x000EFFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00004000, // Length
- ,, _Y0B, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x000F0000, // Range Minimum
- 0x000FFFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00010000, // Length
- ,, _Y0C, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x00000000, // Range Minimum
- 0xDFFFFFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00000000, // Length
- ,, _Y0D, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0xF0000000, // Range Minimum
- 0xFEBFFFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x0EC00000, // Length
- ,, _Y0E, AddressRangeMemory, TypeStatic)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0xFED40000, // Range Minimum
- 0xFED44FFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x00000000, // Length
- ,, , AddressRangeMemory, TypeStatic)
- })
- Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
- {
- If (^MCHC.PM1L)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y00._LEN, C0LN) // _LEN: \
Length
- Store (Zero, C0LN) /* \_SB_.PCI0._CRS.C0LN */
- }
-
- If (LEqual (^MCHC.PM1L, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y00._RW, C0RW) // _RW_: \
Read-Write Status
- Store (Zero, C0RW) /* \_SB_.PCI0._CRS.C0RW */
- }
-
- If (^MCHC.PM1H)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C4LN) // _LEN: \
Length
- Store (Zero, C4LN) /* \_SB_.PCI0._CRS.C4LN */
- }
-
- If (LEqual (^MCHC.PM1H, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C4RW) // _RW_: \
Read-Write Status
- Store (Zero, C4RW) /* \_SB_.PCI0._CRS.C4RW */
- }
-
- If (^MCHC.PM2L)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C8LN) // _LEN: \
Length
- Store (Zero, C8LN) /* \_SB_.PCI0._CRS.C8LN */
- }
-
- If (LEqual (^MCHC.PM2L, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C8RW) // _RW_: \
Read-Write Status
- Store (Zero, C8RW) /* \_SB_.PCI0._CRS.C8RW */
- }
-
- If (^MCHC.PM2H)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, CCLN) // _LEN: \
Length
- Store (Zero, CCLN) /* \_SB_.PCI0._CRS.CCLN */
- }
-
- If (LEqual (^MCHC.PM2H, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y03._RW, CCRW) // _RW_: \
Read-Write Status
- Store (Zero, CCRW) /* \_SB_.PCI0._CRS.CCRW */
- }
-
- If (^MCHC.PM3L)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, D0LN) // _LEN: \
Length
- Store (Zero, D0LN) /* \_SB_.PCI0._CRS.D0LN */
- }
-
- If (LEqual (^MCHC.PM3L, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y04._RW, D0RW) // _RW_: \
Read-Write Status
- Store (Zero, D0RW) /* \_SB_.PCI0._CRS.D0RW */
- }
-
- If (^MCHC.PM3H)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D4LN) // _LEN: \
Length
- Store (Zero, D4LN) /* \_SB_.PCI0._CRS.D4LN */
- }
-
- If (LEqual (^MCHC.PM3H, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D4RW) // _RW_: \
Read-Write Status
- Store (Zero, D4RW) /* \_SB_.PCI0._CRS.D4RW */
- }
-
- If (^MCHC.PM4L)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D8LN) // _LEN: \
Length
- Store (Zero, D8LN) /* \_SB_.PCI0._CRS.D8LN */
- }
-
- If (LEqual (^MCHC.PM4L, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D8RW) // _RW_: \
Read-Write Status
- Store (Zero, D8RW) /* \_SB_.PCI0._CRS.D8RW */
- }
-
- If (^MCHC.PM4H)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, DCLN) // _LEN: \
Length
- Store (Zero, DCLN) /* \_SB_.PCI0._CRS.DCLN */
- }
-
- If (LEqual (^MCHC.PM4H, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y07._RW, DCRW) // _RW_: \
Read-Write Status
- Store (Zero, DCRW) /* \_SB_.PCI0._CRS.DCRW */
- }
-
- If (^MCHC.PM5L)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, E0LN) // _LEN: \
Length
- Store (Zero, E0LN) /* \_SB_.PCI0._CRS.E0LN */
- }
-
- If (LEqual (^MCHC.PM5L, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y08._RW, E0RW) // _RW_: \
Read-Write Status
- Store (Zero, E0RW) /* \_SB_.PCI0._CRS.E0RW */
- }
-
- If (^MCHC.PM5H)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E4LN) // _LEN: \
Length
- Store (Zero, E4LN) /* \_SB_.PCI0._CRS.E4LN */
- }
-
- If (LEqual (^MCHC.PM5H, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E4RW) // _RW_: \
Read-Write Status
- Store (Zero, E4RW) /* \_SB_.PCI0._CRS.E4RW */
- }
-
- If (^MCHC.PM6L)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E8LN) // _LEN: \
Length
- Store (Zero, E8LN) /* \_SB_.PCI0._CRS.E8LN */
- }
-
- If (LEqual (^MCHC.PM6L, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E8RW) // _RW_: \
Read-Write Status
- Store (Zero, E8RW) /* \_SB_.PCI0._CRS.E8RW */
- }
-
- If (^MCHC.PM6H)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, ECLN) // _LEN: \
Length
- Store (Zero, ECLN) /* \_SB_.PCI0._CRS.ECLN */
- }
-
- If (LEqual (^MCHC.PM6H, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, ECRW) // _RW_: \
Read-Write Status
- Store (Zero, ECRW) /* \_SB_.PCI0._CRS.ECRW */
- }
-
- If (^MCHC.PM0H)
- {
- CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, F0LN) // _LEN: \
Length
- Store (Zero, F0LN) /* \_SB_.PCI0._CRS.F0LN */
- }
-
- If (LEqual (^MCHC.PM0H, One))
- {
- CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, F0RW) // _RW_: \
Read-Write Status
- Store (Zero, F0RW) /* \_SB_.PCI0._CRS.F0RW */
- }
-
- CreateDWordField (BUF0, \_SB.PCI0._Y0D._MIN, M1MN) // _MIN: Minimum \
Base Address
- CreateDWordField (BUF0, \_SB.PCI0._Y0D._MAX, M1MX) // _MAX: Maximum \
Base Address
- CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, M1LN) // _LEN: Length
- CreateDWordField (BUF0, \_SB.PCI0._Y0E._MIN, M2MN) // _MIN: Minimum \
Base Address
- CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M2MX) // _MAX: Maximum \
Base Address
- CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M2LN) // _LEN: Length
- ShiftLeft (^MCHC.PXBR, 0x1A, M1MX) /* \_SB_.PCI0._CRS.M1MX */
- ShiftRight (0x10000000, ^MCHC.PXSZ, Local0)
- Add (M1MX, Local0, M2MN) /* \_SB_.PCI0._CRS.M2MN */
- Add (Subtract (M2MX, M2MN), One, M2LN) /* \_SB_.PCI0._CRS.M2LN */
- Subtract (M1MX, One, M1MX) /* \_SB_.PCI0._CRS.M1MX */
- ShiftLeft (^MCHC.TLUD, 0x14, M1MN) /* \_SB_.PCI0._CRS.M1MN */
- Add (Subtract (M1MX, M1MN), One, M1LN) /* \_SB_.PCI0._CRS.M1LN */
- Return (BUF0) /* \_SB_.PCI0.BUF0 */
- }
-
- Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
- {
- If (GPIC)
- {
- Return (Package (0x13)
- {
- Package (0x04)
- {
- 0x0001FFFF,
- Zero,
- Zero,
- 0x10
- },
-
- Package (0x04)
- {
- 0x0002FFFF,
- Zero,
- Zero,
- 0x10
- },
-
- Package (0x04)
- {
- 0x0007FFFF,
- Zero,
- Zero,
- 0x10
- },
-
- Package (0x04)
- {
- 0x0019FFFF,
- Zero,
- Zero,
- 0x14
- },
-
- Package (0x04)
- {
- 0x001AFFFF,
- Zero,
- Zero,
- 0x10
- },
-
- Package (0x04)
- {
- 0x001AFFFF,
- One,
- Zero,
- 0x15
- },
-
- Package (0x04)
- {
- 0x001AFFFF,
- 0x02,
- Zero,
- 0x12
- },
-
- Package (0x04)
- {
- 0x001BFFFF,
- Zero,
- Zero,
- 0x16
- },
-
- Package (0x04)
- {
- 0x001CFFFF,
- Zero,
- Zero,
- 0x11
- },
-
- Package (0x04)
- {
- 0x001CFFFF,
- One,
- Zero,
- 0x10
- },
-
- Package (0x04)
- {
- 0x001CFFFF,
- 0x02,
- Zero,
- 0x12
- },
-
- Package (0x04)
- {
- 0x001CFFFF,
- 0x03,
- Zero,
- 0x13
- },
-
- Package (0x04)
- {
- 0x001DFFFF,
- Zero,
- Zero,
- 0x17
- },
-
- Package (0x04)
- {
- 0x001DFFFF,
- One,
- Zero,
- 0x13
- },
-
- Package (0x04)
- {
- 0x001DFFFF,
- 0x02,
- Zero,
- 0x12
- },
-
- Package (0x04)
- {
- 0x001FFFFF,
- Zero,
- Zero,
- 0x13
- },
-
- Package (0x04)
- {
- 0x001FFFFF,
- One,
- Zero,
- 0x13
- },
-
- Package (0x04)
- {
- 0x001FFFFF,
- 0x02,
- Zero,
- 0x13
- },
-
- Package (0x04)
- {
- 0x001FFFFF,
- 0x03,
- Zero,
- 0x10
- }
- })
- }
- Else
- {
- Return (Package (0x13)
- {
- Package (0x04)
- {
- 0x0001FFFF,
- Zero,
- ^LPCB.LNKA,
- Zero
- },
-
- Package (0x04)
- {
- 0x0002FFFF,
- Zero,
- ^LPCB.LNKA,
- Zero
- },
-
- Package (0x04)
- {
- 0x0007FFFF,
- Zero,
- ^LPCB.LNKA,
- Zero
- },
-
- Package (0x04)
- {
- 0x0019FFFF,
- Zero,
- ^LPCB.LNKE,
- Zero
- },
-
- Package (0x04)
- {
- 0x001AFFFF,
- Zero,
- ^LPCB.LNKA,
- Zero
- },
-
- Package (0x04)
- {
- 0x001AFFFF,
- One,
- ^LPCB.LNKF,
- Zero
- },
-
- Package (0x04)
- {
- 0x001AFFFF,
- 0x02,
- ^LPCB.LNKC,
- Zero
- },
-
- Package (0x04)
- {
- 0x001BFFFF,
- Zero,
- ^LPCB.LNKG,
- Zero
- },
-
- Package (0x04)
- {
- 0x001CFFFF,
- Zero,
- ^LPCB.LNKB,
- Zero
- },
-
- Package (0x04)
- {
- 0x001CFFFF,
- One,
- ^LPCB.LNKA,
- Zero
- },
-
- Package (0x04)
- {
- 0x001CFFFF,
- 0x02,
- ^LPCB.LNKC,
- Zero
- },
-
- Package (0x04)
- {
- 0x001CFFFF,
- 0x03,
- ^LPCB.LNKD,
- Zero
- },
-
- Package (0x04)
- {
- 0x001DFFFF,
- Zero,
- ^LPCB.LNKH,
- Zero
- },
-
- Package (0x04)
- {
- 0x001DFFFF,
- One,
- ^LPCB.LNKD,
- Zero
- },
-
- Package (0x04)
- {
- 0x001DFFFF,
- 0x02,
- ^LPCB.LNKC,
- Zero
- },
-
- Package (0x04)
- {
- 0x001FFFFF,
- Zero,
- ^LPCB.LNKD,
- Zero
- },
-
- Package (0x04)
- {
- 0x001FFFFF,
- One,
- ^LPCB.LNKD,
- Zero
- },
-
- Package (0x04)
- {
- 0x001FFFFF,
- 0x02,
- ^LPCB.LNKD,
- Zero
- },
-
- Package (0x04)
- {
- 0x001FFFFF,
- 0x03,
- ^LPCB.LNKA,
- Zero
- }
- })
- }
- }
-
- Device (PDRC)
- {
- Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // \
_HID: Hardware ID
- Name (_UID, One) // _UID: Unique ID
- Name (BUF0, ResourceTemplate ()
- {
- Memory32Fixed (ReadWrite,
- 0x00000000, // Address Base
- 0x00004000, // Address Length
- _Y0F)
- Memory32Fixed (ReadWrite,
- 0x00000000, // Address Base
- 0x00004000, // Address Length
- _Y10)
- Memory32Fixed (ReadWrite,
- 0x00000000, // Address Base
- 0x00001000, // Address Length
- _Y11)
- Memory32Fixed (ReadWrite,
- 0x00000000, // Address Base
- 0x00001000, // Address Length
- _Y12)
- Memory32Fixed (ReadWrite,
- 0x00000000, // Address Base
- 0x00000000, // Address Length
- _Y13)
- Memory32Fixed (ReadWrite,
- 0xFED20000, // Address Base
- 0x00020000, // Address Length
- )
- Memory32Fixed (ReadWrite,
- 0xFED40000, // Address Base
- 0x00005000, // Address Length
- )
- Memory32Fixed (ReadWrite,
- 0xFED45000, // Address Base
- 0x0004B000, // Address Length
- )
- })
- Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
- {
- CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y0F._BAS, RBR0) // \
_BAS: Base Address
- ShiftLeft (^^LPCB.RCBA, 0x0E, RBR0) /* \_SB_.PCI0.PDRC._CRS.RBR0 \
*/
- CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y10._BAS, MBR0) // \
_BAS: Base Address
- ShiftLeft (^^MCHC.MHBR, 0x0E, MBR0) /* \_SB_.PCI0.PDRC._CRS.MBR0 \
*/
- CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y11._BAS, DBR0) // \
_BAS: Base Address
- ShiftLeft (^^MCHC.DIBR, 0x0C, DBR0) /* \_SB_.PCI0.PDRC._CRS.DBR0 \
*/
- CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y12._BAS, EBR0) // \
_BAS: Base Address
- ShiftLeft (^^MCHC.EPBR, 0x0C, EBR0) /* \_SB_.PCI0.PDRC._CRS.EBR0 \
*/
- CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y13._BAS, XBR0) // \
_BAS: Base Address
- ShiftLeft (^^MCHC.PXBR, 0x1A, XBR0) /* \_SB_.PCI0.PDRC._CRS.XBR0 \
*/
- CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y13._LEN, XSZ0) // \
_LEN: Length
- ShiftRight (0x10000000, ^^MCHC.PXSZ, XSZ0) /* \
\_SB_.PCI0.PDRC._CRS.XSZ0 */
- Return (BUF0) /* \_SB_.PCI0.PDRC.BUF0 */
- }
- }
-
- Device (PEGP)
- {
- Name (_ADR, 0x00010000) // _ADR: Address
- Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
- {
- If (GPIC)
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- Zero,
- 0x10
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- Zero,
- 0x11
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- Zero,
- 0x12
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- Zero,
- 0x13
- }
- })
- }
- Else
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- ^^LPCB.LNKA,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- ^^LPCB.LNKB,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- ^^LPCB.LNKC,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- ^^LPCB.LNKD,
- Zero
- }
- })
- }
- }
-
- Device (VGA)
- {
- Name (_ADR, Zero) // _ADR: Address
- Name (SWIT, One)
- Name (CRTA, One)
- Name (LCDA, One)
- Name (TVAA, One)
- Name (VLDF, One)
- OperationRegion (VIDS, PCI_Config, Zero, 0xC8)
- Field (VIDS, DWordAcc, NoLock, Preserve)
- {
- VDID, 32
- }
-
- Method (_STA, 0, NotSerialized) // _STA: Status
- {
- Return (0x0F)
- }
-
- Name (_PSC, Zero) // _PSC: Power State Current
- Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
- {
- Store (Zero, _PSC) /* \_SB_.PCI0.PEGP.VGA_._PSC */
- }
-
- Method (_PS1, 0, NotSerialized) // _PS1: Power State 1
- {
- Store (One, _PSC) /* \_SB_.PCI0.PEGP.VGA_._PSC */
- }
-
- Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
- {
- Store (0x03, _PSC) /* \_SB_.PCI0.PEGP.VGA_._PSC */
- }
-
- Method (_DOS, 1, NotSerialized) // _DOS: Disable Output \
Switching
- {
- Store (And (Arg0, 0x03), SWIT) /* \_SB_.PCI0.PEGP.VGA_.SWIT \
*/
- }
-
- Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices
- {
- Return (Package (0x03)
- {
- 0x00010100,
- 0x00010110,
- 0x0200
- })
- }
-
- Device (CRT)
- {
- Method (_ADR, 0, NotSerialized) // _ADR: Address
- {
- Return (0x0100)
- }
-
- Method (_DCS, 0, NotSerialized) // _DCS: Display Current \
Status
- {
- ^^^^LPCB.PHSS (0x0C)
- Store (CADL, Local0)
- Store (CSTE, Local1)
- And (Local0, 0x02, Local0)
- And (Local1, 0x02, Local1)
- If (Local0)
- {
- Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
- }
- Else
- {
- Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
- }
-
- If (CRTA)
- {
- If (LEqual (Local1, 0x02))
- {
- Return (0x1F)
- }
- Else
- {
- Return (0x1D)
- }
- }
- Else
- {
- If (LEqual (Local1, 0x02))
- {
- Return (0x0F)
- }
- Else
- {
- Return (0x0D)
- }
- }
- }
-
- Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics \
State
- {
- If (CRTA)
- {
- Return (One)
- }
- Else
- {
- Return (Zero)
- }
- }
-
- Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
- {
- }
- }
-
- Device (LCD)
- {
- Method (_ADR, 0, NotSerialized) // _ADR: Address
- {
- Return (0x0110)
- }
-
- Method (_DCS, 0, NotSerialized) // _DCS: Display Current \
Status
- {
- ^^^^LPCB.PHSS (0x0C)
- Store (CADL, Local0)
- Store (CSTE, Local1)
- And (Local0, One, Local0)
- And (Local1, One, Local1)
- If (Local0)
- {
- Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
- }
- Else
- {
- Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
- }
-
- If (LCDA)
- {
- If (LEqual (Local1, One))
- {
- Return (0x1F)
- }
- Else
- {
- Return (0x1D)
- }
- }
- Else
- {
- If (LEqual (Local1, One))
- {
- Return (0x0F)
- }
- Else
- {
- Return (0x0D)
- }
- }
- }
-
- Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics \
State
- {
- If (LCDA)
- {
- Return (One)
- }
- Else
- {
- Return (Zero)
- }
- }
-
- Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
- {
- }
-
- Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control \
Levels
- {
- Return (Package (0x0A)
- {
- 0x46,
- 0x28,
- Zero,
- 0x0A,
- 0x14,
- 0x1E,
- 0x28,
- 0x32,
- 0x3C,
- 0x46
- })
- }
-
- Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control \
Method
- {
- Divide (Arg0, 0x0A, Local0, Local1)
- Store (Local1, ^^^^LPCB.EC0.BRTS) /* \
\_SB_.PCI0.LPCB.EC0_.BRTS */
- }
-
- Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query \
Current
- {
- Multiply (^^^^LPCB.EC0.BRTS, 0x0A, Local0)
- Return (Local0)
- }
- }
-
- Device (TV)
- {
- Method (_ADR, 0, NotSerialized) // _ADR: Address
- {
- Return (0x0200)
- }
-
- Method (_DCS, 0, NotSerialized) // _DCS: Display Current \
Status
- {
- ^^^^LPCB.PHSS (0x0C)
- Store (CADL, Local0)
- Store (CSTE, Local1)
- And (Local0, 0x04, Local0)
- And (Local1, 0x04, Local1)
- If (Local0)
- {
- Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
- }
- Else
- {
- Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
- }
-
- If (TVAA)
- {
- If (LEqual (Local1, 0x04))
- {
- Return (0x1F)
- }
- Else
- {
- Return (0x1D)
- }
- }
- Else
- {
- If (LEqual (Local1, 0x04))
- {
- Return (0x0F)
- }
- Else
- {
- Return (0x0D)
- }
- }
- }
-
- Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics \
State
- {
- If (TVAA)
- {
- Return (One)
- }
- Else
- {
- Return (Zero)
- }
- }
-
- Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
- {
- }
- }
-
- Method (DSSW, 0, NotSerialized)
- {
- If (LEqual (SWIT, Zero))
- {
- ^^^LPCB.PHSS (0x0C)
- Store (CADL, Local0)
- Store (CSTE, Local1)
- If (LGreater (Local1, One))
- {
- And (Local0, Local1, VLDF) /* \
\_SB_.PCI0.PEGP.VGA_.VLDF */
- And (VLDF, 0xFE, VLDF) /* \_SB_.PCI0.PEGP.VGA_.VLDF \
*/
- }
-
- If (VLDF)
- {
- If (LEqual (Local0, 0x09))
- {
- If (LEqual (Local1, 0x08))
- {
- STBL (0x02)
- }
-
- If (LEqual (Local1, One))
- {
- STBL (0x03)
- }
-
- If (LEqual (Local1, 0x09))
- {
- STBL (One)
- }
- }
-
- If (LEqual (Local0, 0x0A))
- {
- If (LEqual (Local1, 0x08))
- {
- STBL (0x05)
- }
-
- If (LEqual (Local1, 0x02))
- {
- STBL (One)
- }
-
- If (LEqual (Local1, 0x0A))
- {
- STBL (0x04)
- }
- }
-
- If (LEqual (Local0, 0x0B))
- {
- If (LEqual (Local1, 0x08))
- {
- STBL (0x02)
- }
-
- If (LEqual (Local1, 0x09))
- {
- STBL (0x05)
- }
-
- If (LEqual (Local1, One))
- {
- STBL (0x03)
- }
-
- If (LEqual (Local1, 0x0A))
- {
- STBL (0x04)
- }
-
- If (LEqual (Local1, 0x02))
- {
- STBL (One)
- }
-
- If (LEqual (Local1, 0x0B))
- {
- STBL (One)
- }
- }
- }
- Else
- {
- Store (One, VLDF) /* \_SB_.PCI0.PEGP.VGA_.VLDF */
- STBL (One)
- }
- }
- Else
- {
- If (LEqual (SWIT, One))
- {
- ^^^LPCB.PHSS (One)
- }
- }
- }
-
- Method (STBL, 1, NotSerialized)
- {
- If (LEqual (Arg0, One))
- {
- Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
- Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
- Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
- }
-
- If (LEqual (Arg0, 0x02))
- {
- Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
- Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
- Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
- }
-
- If (LEqual (Arg0, 0x03))
- {
- Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
- Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
- Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
- }
-
- If (LEqual (Arg0, 0x04))
- {
- Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
- Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
- Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
- }
-
- If (LEqual (Arg0, 0x05))
- {
- Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
- Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
- Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
- }
-
- If (LEqual (Arg0, 0x06))
- {
- Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
- Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
- Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
- }
-
- If (LEqual (Arg0, 0x07))
- {
- Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
- Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
- Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
- }
-
- Notify (VGA, 0x80) // Status Change
- }
- }
- }
-
- Device (GFX0)
- {
- Name (_ADR, 0x00020000) // _ADR: Address
- Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching
- {
- Store (And (Arg0, 0x07), DSEN) /* \DSEN */
- }
-
- Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices
- {
- Store (Zero, NDID) /* \NDID */
- If (LNotEqual (DIDL, Zero))
- {
- Store (SDDL (DID1), DID1) /* \DID1 */
- }
-
- If (LNotEqual (DDL2, Zero))
- {
- Store (SDDL (DID2), DID2) /* \DID2 */
- }
-
- If (LNotEqual (DDL3, Zero))
- {
- Store (SDDL (DID3), DID3) /* \DID3 */
- }
-
- If (LNotEqual (DDL4, Zero))
- {
- Store (SDDL (DID4), DID4) /* \DID4 */
- }
-
- If (LNotEqual (DDL5, Zero))
- {
- Store (SDDL (DID5), DID5) /* \DID5 */
- }
-
- If (LEqual (NDID, One))
- {
- Name (TMP1, Package (0x01)
- {
- 0xFFFFFFFF
- })
- Store (Or (0x00010000, DID1), Index (TMP1, Zero))
- Return (TMP1) /* \_SB_.PCI0.GFX0._DOD.TMP1 */
- }
-
- If (LEqual (NDID, 0x02))
- {
- Name (TMP2, Package (0x02)
- {
- 0xFFFFFFFF,
- 0xFFFFFFFF
- })
- Store (Or (0x00010000, DID1), Index (TMP2, Zero))
- Store (Or (0x00010000, DID2), Index (TMP2, One))
- Return (TMP2) /* \_SB_.PCI0.GFX0._DOD.TMP2 */
- }
-
- If (LEqual (NDID, 0x03))
- {
- Name (TMP3, Package (0x03)
- {
- 0xFFFFFFFF,
- 0xFFFFFFFF,
- 0xFFFFFFFF
- })
- Store (Or (0x00010000, DID1), Index (TMP3, Zero))
- Store (Or (0x00010000, DID2), Index (TMP3, One))
- Store (Or (0x00010000, DID3), Index (TMP3, 0x02))
- Return (TMP3) /* \_SB_.PCI0.GFX0._DOD.TMP3 */
- }
-
- If (LEqual (NDID, 0x04))
- {
- Name (TMP4, Package (0x04)
- {
- 0xFFFFFFFF,
- 0xFFFFFFFF,
- 0xFFFFFFFF,
- 0xFFFFFFFF
- })
- Store (Or (0x00010000, DID1), Index (TMP4, Zero))
- Store (Or (0x00010000, DID2), Index (TMP4, One))
- Store (Or (0x00010000, DID3), Index (TMP4, 0x02))
- Store (Or (0x00010000, DID4), Index (TMP4, 0x03))
- Return (TMP4) /* \_SB_.PCI0.GFX0._DOD.TMP4 */
- }
-
- If (LGreater (NDID, 0x04))
- {
- Name (TMP5, Package (0x05)
- {
- 0xFFFFFFFF,
- 0xFFFFFFFF,
- 0xFFFFFFFF,
- 0xFFFFFFFF,
- 0xFFFFFFFF
- })
- Store (Or (0x00010000, DID1), Index (TMP5, Zero))
- Store (Or (0x00010000, DID2), Index (TMP5, One))
- Store (Or (0x00010000, DID3), Index (TMP5, 0x02))
- Store (Or (0x00010000, DID4), Index (TMP5, 0x03))
- Store (Or (0x00010000, DID4), Index (TMP5, 0x04))
- Return (TMP5) /* \_SB_.PCI0.GFX0._DOD.TMP5 */
- }
-
- Return (Package (0x01)
- {
- 0x0400
- })
- }
-
- Device (DD01)
- {
- Method (_ADR, 0, Serialized) // _ADR: Address
- {
- If (LEqual (DID1, Zero))
- {
- Return (One)
- }
- Else
- {
- Return (And (0xFFFF, DID1))
- }
- }
-
- Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
- {
- Return (CDDS (DID1))
- }
-
- Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
- {
- Return (NDDS (DID1))
- }
-
- Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
- {
- If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
- {
- Store (NSTE, CSTE) /* \CSTE */
- }
- }
- }
-
- Device (DD02)
- {
- Method (_ADR, 0, Serialized) // _ADR: Address
- {
- If (LEqual (DID2, Zero))
- {
- Return (0x02)
- }
- Else
- {
- Return (And (0xFFFF, DID2))
- }
- }
-
- Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
- {
- Return (CDDS (DID2))
- }
-
- Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
- {
- Return (NDDS (DID2))
- }
-
- Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
- {
- If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
- {
- Store (NSTE, CSTE) /* \CSTE */
- }
- }
- }
-
- Device (DD03)
- {
- Method (_ADR, 0, Serialized) // _ADR: Address
- {
- If (LEqual (DID3, Zero))
- {
- Return (0x03)
- }
- Else
- {
- Return (And (0xFFFF, DID3))
- }
- }
-
- Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
- {
- If (LEqual (DID3, Zero))
- {
- Return (0x0B)
- }
- Else
- {
- Return (CDDS (DID3))
- }
- }
-
- Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
- {
- Return (NDDS (DID3))
- }
-
- Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
- {
- If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
- {
- Store (NSTE, CSTE) /* \CSTE */
- }
- }
- }
-
- Device (DD04)
- {
- Method (_ADR, 0, Serialized) // _ADR: Address
- {
- If (LEqual (DID4, Zero))
- {
- Return (0x04)
- }
- Else
- {
- Return (And (0xFFFF, DID4))
- }
- }
-
- Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
- {
- If (LEqual (DID4, Zero))
- {
- Return (0x0B)
- }
- Else
- {
- Return (CDDS (DID4))
- }
- }
-
- Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
- {
- Return (NDDS (DID4))
- }
-
- Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
- {
- If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
- {
- Store (NSTE, CSTE) /* \CSTE */
- }
- }
- }
-
- Device (DD05)
- {
- Method (_ADR, 0, Serialized) // _ADR: Address
- {
- If (LEqual (DID5, Zero))
- {
- Return (0x05)
- }
- Else
- {
- Return (And (0xFFFF, DID5))
- }
- }
-
- Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
- {
- If (LEqual (DID5, Zero))
- {
- Return (0x0B)
- }
- Else
- {
- Return (CDDS (DID5))
- }
- }
-
- Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
- {
- Return (NDDS (DID5))
- }
-
- Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
- {
- If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
- {
- Store (NSTE, CSTE) /* \CSTE */
- }
- }
- }
-
- Method (SDDL, 1, NotSerialized)
- {
- Increment (NDID)
- Store (And (Arg0, 0x0F0F), Local0)
- Or (0x80000000, Local0, Local1)
- If (LEqual (DIDL, Local0))
- {
- Return (Local1)
- }
-
- If (LEqual (DDL2, Local0))
- {
- Return (Local1)
- }
-
- If (LEqual (DDL3, Local0))
- {
- Return (Local1)
- }
-
- If (LEqual (DDL4, Local0))
- {
- Return (Local1)
- }
-
- If (LEqual (DDL5, Local0))
- {
- Return (Local1)
- }
-
- If (LEqual (DDL6, Local0))
- {
- Return (Local1)
- }
-
- If (LEqual (DDL7, Local0))
- {
- Return (Local1)
- }
-
- If (LEqual (DDL8, Local0))
- {
- Return (Local1)
- }
-
- Return (Zero)
- }
-
- Method (CDDS, 1, NotSerialized)
- {
- If (LEqual (CADL, And (Arg0, 0x0F0F)))
- {
- Return (0x1F)
- }
-
- If (LEqual (CAL2, And (Arg0, 0x0F0F)))
- {
- Return (0x1F)
- }
-
- If (LEqual (CAL3, And (Arg0, 0x0F0F)))
- {
- Return (0x1F)
- }
-
- If (LEqual (CAL4, And (Arg0, 0x0F0F)))
- {
- Return (0x1F)
- }
-
- If (LEqual (CAL5, And (Arg0, 0x0F0F)))
- {
- Return (0x1F)
- }
-
- If (LEqual (CAL6, And (Arg0, 0x0F0F)))
- {
- Return (0x1F)
- }
-
- If (LEqual (CAL7, And (Arg0, 0x0F0F)))
- {
- Return (0x1F)
- }
-
- If (LEqual (CAL8, And (Arg0, 0x0F0F)))
- {
- Return (0x1F)
- }
-
- Return (0x1D)
- }
-
- Method (NDDS, 1, NotSerialized)
- {
- If (LEqual (NADL, And (Arg0, 0x0F0F)))
- {
- Return (One)
- }
-
- If (LEqual (NDL2, And (Arg0, 0x0F0F)))
- {
- Return (One)
- }
-
- If (LEqual (NDL3, And (Arg0, 0x0F0F)))
- {
- Return (One)
- }
-
- If (LEqual (NDL4, And (Arg0, 0x0F0F)))
- {
- Return (One)
- }
-
- If (LEqual (NDL5, And (Arg0, 0x0F0F)))
- {
- Return (One)
- }
-
- If (LEqual (NDL6, And (Arg0, 0x0F0F)))
- {
- Return (One)
- }
-
- If (LEqual (NDL7, And (Arg0, 0x0F0F)))
- {
- Return (One)
- }
-
- If (LEqual (NDL8, And (Arg0, 0x0F0F)))
- {
- Return (One)
- }
-
- Return (Zero)
- }
-
- Method (BRTN, 1, Serialized)
- {
- If (LEqual (And (DID1, 0x0F00), 0x0400))
- {
- Notify (DD01, Arg0)
- }
-
- If (LEqual (And (DID2, 0x0F00), 0x0400))
- {
- Notify (DD02, Arg0)
- }
-
- If (LEqual (And (DID3, 0x0F00), 0x0400))
- {
- Notify (DD03, Arg0)
- }
-
- If (LEqual (And (DID4, 0x0F00), 0x0400))
- {
- Notify (DD04, Arg0)
- }
-
- If (LEqual (And (DID5, 0x0F00), 0x0400))
- {
- Notify (DD05, Arg0)
- }
- }
-
- Scope (^^PCI0)
- {
- OperationRegion (MCHP, PCI_Config, 0x40, 0xC0)
- Field (MCHP, AnyAcc, NoLock, Preserve)
- {
- Offset (0x60),
- TASM, 10,
- Offset (0x62)
- }
- }
-
- OperationRegion (IGDP, PCI_Config, 0x40, 0xC0)
- Field (IGDP, AnyAcc, NoLock, Preserve)
- {
- Offset (0x12),
- , 1,
- GIVD, 1,
- , 2,
- GUMA, 3,
- Offset (0x14),
- , 4,
- GMFN, 1,
- Offset (0x18),
- Offset (0xA4),
- ASLE, 8,
- Offset (0xA8),
- GSSE, 1,
- GSSB, 14,
- GSES, 1,
- Offset (0xB0),
- Offset (0xB1),
- CDVL, 5,
- Offset (0xB2),
- Offset (0xB5),
- LBPC, 8,
- Offset (0xBC),
- ASLS, 32
- }
-
- OperationRegion (IGDM, SystemMemory, ASLB, 0x2000)
- Field (IGDM, AnyAcc, NoLock, Preserve)
- {
- SIGN, 128,
- SIZE, 32,
- OVER, 32,
- SVER, 256,
- VVER, 128,
- GVER, 128,
- MBOX, 32,
- Offset (0x100),
- DRDY, 32,
- CSTS, 32,
- CEVT, 32,
- Offset (0x120),
- DIDL, 32,
- DDL2, 32,
- DDL3, 32,
- DDL4, 32,
- DDL5, 32,
- DDL6, 32,
- DDL7, 32,
- DDL8, 32,
- CPDL, 32,
- CPL2, 32,
- CPL3, 32,
- CPL4, 32,
- CPL5, 32,
- CPL6, 32,
- CPL7, 32,
- CPL8, 32,
- CADL, 32,
- CAL2, 32,
- CAL3, 32,
- CAL4, 32,
- CAL5, 32,
- CAL6, 32,
- CAL7, 32,
- CAL8, 32,
- NADL, 32,
- NDL2, 32,
- NDL3, 32,
- NDL4, 32,
- NDL5, 32,
- NDL6, 32,
- NDL7, 32,
- NDL8, 32,
- ASLP, 32,
- TIDX, 32,
- CHPD, 32,
- CLID, 32,
- CDCK, 32,
- SXSW, 32,
- EVTS, 32,
- CNOT, 32,
- NRDY, 32,
- Offset (0x200),
- SCIE, 1,
- GEFC, 4,
- GXFC, 3,
- GESF, 8,
- Offset (0x204),
- PARM, 32,
- DSLP, 32,
- Offset (0x300),
- ARDY, 32,
- ASLC, 32,
- TCHE, 32,
- ALSI, 32,
- BCLP, 32,
- PFIT, 32,
- CBLV, 32,
- BCLM, 320,
- CPFM, 32,
- Offset (0x400),
- GVD1, 57344
- }
-
- Name (DBTB, Package (0x15)
- {
- Zero,
- 0x07,
- 0x38,
- 0x01C0,
- 0x0E00,
- 0x3F,
- 0x01C7,
- 0x0E07,
- 0x01F8,
- 0x0E38,
- 0x0FC0,
- Zero,
- Zero,
- Zero,
- Zero,
- Zero,
- 0x7000,
- 0x7007,
- 0x7038,
- 0x71C0,
- 0x7E00
- })
- Name (CDCT, Package (0x03)
- {
- Package (0x03)
- {
- 0xC8,
- 0x0140,
- 0x0190
- },
-
- Package (0x03)
- {
- 0xC8,
- 0x014D,
- 0x0190
- },
-
- Package (0x03)
- {
- 0xDE,
- 0x014D,
- 0x017D
- }
- })
- Name (SUCC, One)
- Name (NVLD, 0x02)
- Name (CRIT, 0x04)
- Name (NCRT, 0x06)
- Method (GSCI, 0, Serialized)
- {
- Method (GBDA, 0, Serialized)
- {
- If (LEqual (GESF, Zero))
- {
- Store (0x0279, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, One))
- {
- Store (0x0240, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x04))
- {
- And (PARM, 0xEFFF0000, PARM) /* \_SB_.PCI0.GFX0.PARM */
- And (PARM, ShiftLeft (DerefOf (Index (DBTB, IBTT)), \
0x10),
- PARM) /* \_SB_.PCI0.GFX0.PARM */
- Or (IBTT, PARM, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x05))
- {
- Store (IPSC, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Or (PARM, ShiftLeft (IPAT, 0x08), PARM) /* \
\_SB_.PCI0.GFX0.PARM */
- Add (PARM, 0x0100, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Or (PARM, ShiftLeft (LIDS, 0x10), PARM) /* \
\_SB_.PCI0.GFX0.PARM */
- Add (PARM, 0x00010000, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Or (PARM, ShiftLeft (IBIA, 0x14), PARM) /* \
\_SB_.PCI0.GFX0.PARM */
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x06))
- {
- Store (ITVF, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Or (PARM, ShiftLeft (ITVM, 0x04), PARM) /* \
\_SB_.PCI0.GFX0.PARM */
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x07))
- {
- Store (GIVD, PARM) /* \_SB_.PCI0.GFX0.PARM */
- XOr (PARM, One, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Or (PARM, ShiftLeft (GMFN, One), PARM) /* \
\_SB_.PCI0.GFX0.PARM */
- Or (PARM, 0x1000, PARM) /* \_SB_.PCI0.GFX0.PARM */
- If (IDMM)
- {
- Or (PARM, ShiftLeft (IDMS, 0x11), PARM) /* \
\_SB_.PCI0.GFX0.PARM */
- }
- Else
- {
- Or (PARM, ShiftLeft (IDMS, 0x0D), PARM) /* \
\_SB_.PCI0.GFX0.PARM */
- }
-
- Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, \
HVCO)), Subtract (
- CDVL, One))), 0x15), PARM, PARM) /* \
\_SB_.PCI0.GFX0.PARM */
- Store (One, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x0A))
- {
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- If (ISSC)
- {
- Or (PARM, 0x03, PARM) /* \_SB_.PCI0.GFX0.PARM */
- }
-
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */
- }
-
- Method (SBCB, 0, Serialized)
- {
- If (LEqual (GESF, Zero))
- {
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Store (0xF77D, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, One))
- {
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x03))
- {
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x04))
- {
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x05))
- {
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x06))
- {
- Store (And (PARM, 0x0F), ITVF) /* \ITVF */
- Store (ShiftRight (And (PARM, 0xF0), 0x04), ITVM) /* \
\ITVM */
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x07))
- {
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x08))
- {
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x09))
- {
- And (PARM, 0xFF, IBTT) /* \IBTT */
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x0A))
- {
- And (PARM, 0xFF, IPSC) /* \IPSC */
- If (And (ShiftRight (PARM, 0x08), 0xFF))
- {
- And (ShiftRight (PARM, 0x08), 0xFF, IPAT) /* \IPAT \
*/
- Decrement (IPAT)
- }
-
- And (ShiftRight (PARM, 0x14), 0x07, IBIA) /* \IBIA */
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x0B))
- {
- And (ShiftRight (PARM, One), One, IF1E) /* \IF1E */
- If (And (PARM, 0x0001E000))
- {
- And (ShiftRight (PARM, 0x0D), 0x0F, IDMS) /* \IDMS \
*/
- Store (Zero, IDMM) /* \IDMM */
- }
- Else
- {
- And (ShiftRight (PARM, 0x11), 0x0F, IDMS) /* \IDMS \
*/
- Store (One, IDMM) /* \IDMM */
- }
-
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x10))
- {
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x11))
- {
- Or (PARM, 0x0100, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x12))
- {
- If (And (PARM, One))
- {
- If (LEqual (ShiftRight (PARM, One), One))
- {
- Store (One, ISSC) /* \ISSC */
- }
- Else
- {
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */
- }
- }
- Else
- {
- Store (Zero, ISSC) /* \ISSC */
- }
-
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GESF, 0x13))
- {
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
- Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
- }
-
- If (LEqual (GEFC, 0x04))
- {
- Store (GBDA (), GXFC) /* \_SB_.PCI0.GFX0.GXFC */
- }
-
- If (LEqual (GEFC, 0x06))
- {
- Store (SBCB (), GXFC) /* \_SB_.PCI0.GFX0.GXFC */
- }
-
- Store (Zero, GEFC) /* \_SB_.PCI0.GFX0.GEFC */
- Store (One, SCIS) /* \SCIS */
- Store (Zero, GSSE) /* \_SB_.PCI0.GFX0.GSSE */
- Store (Zero, SCIE) /* \_SB_.PCI0.GFX0.SCIE */
- Return (Zero)
- }
-
- Method (PDRD, 0, NotSerialized)
- {
- If (LNot (DRDY))
- {
- Sleep (ASLP)
- }
-
- Return (LNot (DRDY))
- }
-
- Method (PSTS, 0, NotSerialized)
- {
- If (LGreater (CSTS, 0x02))
- {
- Sleep (ASLP)
- }
-
- Return (LEqual (CSTS, 0x03))
- }
-
- Method (GNOT, 2, NotSerialized)
- {
- If (PDRD ())
- {
- Return (One)
- }
-
- If (PSTS ())
- {
- Return (One)
- }
-
- Store (Arg0, CEVT) /* \_SB_.PCI0.GFX0.CEVT */
- Store (0x03, CSTS) /* \_SB_.PCI0.GFX0.CSTS */
- If (LAnd (LEqual (CHPD, Zero), LEqual (Arg1, Zero)))
- {
- If (LOr (LGreater (OSYS, 0x07D0), LLess (OSYS, 0x07D6)))
- {
- Notify (PCI0, Arg1)
- }
- Else
- {
- Notify (GFX0, Arg1)
- }
- }
-
- Notify (GFX0, 0x80) // Status Change
- If (LNot (PSTS ()))
- {
- Store (Zero, CEVT) /* \_SB_.PCI0.GFX0.CEVT */
- }
-
- Return (Zero)
- }
-
- Method (GHDS, 1, NotSerialized)
- {
- Store (Arg0, TIDX) /* \_SB_.PCI0.GFX0.TIDX */
- Return (GNOT (One, Zero))
- }
-
- Method (GLID, 1, NotSerialized)
- {
- Store (Arg0, CLID) /* \_SB_.PCI0.GFX0.CLID */
- Return (GNOT (0x02, Zero))
- }
-
- Method (GDCK, 1, NotSerialized)
- {
- Store (Arg0, CDCK) /* \_SB_.PCI0.GFX0.CDCK */
- Return (GNOT (0x04, 0x80))
- }
-
- Method (PARD, 0, NotSerialized)
- {
- If (LNot (ARDY))
- {
- Sleep (ASLP)
- }
-
- Return (LNot (ARDY))
- }
-
- Method (AINT, 2, NotSerialized)
- {
- If (LNot (And (TCHE, ShiftLeft (One, Arg0))))
- {
- Return (One)
- }
-
- If (PARD ())
- {
- Return (One)
- }
-
- If (LEqual (Arg0, 0x02))
- {
- If (CPFM)
- {
- If (LEqual (CPFM, One))
- {
- Store (0x06, PFIT) /* \_SB_.PCI0.GFX0.PFIT */
- }
-
- If (LEqual (CPFM, 0x06))
- {
- Store (0x08, PFIT) /* \_SB_.PCI0.GFX0.PFIT */
- }
-
- If (LEqual (CPFM, 0x08))
- {
- Store (One, PFIT) /* \_SB_.PCI0.GFX0.PFIT */
- }
- }
- Else
- {
- XOr (PFIT, 0x07, PFIT) /* \_SB_.PCI0.GFX0.PFIT */
- }
-
- Or (PFIT, 0x80000000, PFIT) /* \_SB_.PCI0.GFX0.PFIT */
- Store (0x04, ASLC) /* \_SB_.PCI0.GFX0.ASLC */
- }
- Else
- {
- If (LEqual (Arg0, One))
- {
- Store (Divide (Multiply (Arg1, 0xFF), 0x64, ), BCLP) /* \
\_SB_.PCI0.GFX0.BCLP */
- Or (BCLP, 0x80000000, BCLP) /* \_SB_.PCI0.GFX0.BCLP */
- Store (0x02, ASLC) /* \_SB_.PCI0.GFX0.ASLC */
- }
- Else
- {
- If (LEqual (Arg0, Zero))
- {
- Store (Arg1, ALSI) /* \_SB_.PCI0.GFX0.ALSI */
- Store (One, ASLC) /* \_SB_.PCI0.GFX0.ASLC */
- }
- Else
- {
- Return (One)
- }
- }
- }
-
- Store (Zero, LBPC) /* \_SB_.PCI0.GFX0.LBPC */
- Return (Zero)
- }
- }
-
- Scope (\)
- {
- OperationRegion (IO_T, SystemIO, 0x0800, 0x10)
- Field (IO_T, ByteAcc, NoLock, Preserve)
- {
- Offset (0x08),
- TRP0, 8
- }
-
- OperationRegion (PMIO, SystemIO, 0x1000, 0x80)
- Field (PMIO, ByteAcc, NoLock, Preserve)
- {
- Offset (0x2A),
- Offset (0x2B),
- , 2,
- ACPW, 1,
- Offset (0x42),
- , 1,
- GPEC, 1,
- Offset (0x64),
- , 9,
- SCIS, 1,
- Offset (0x66)
- }
-
- OperationRegion (GPIO, SystemIO, 0x1180, 0x3C)
- Field (GPIO, ByteAcc, NoLock, Preserve)
- {
- GU00, 8,
- GU01, 8,
- GU02, 8,
- GU03, 8,
- GIO0, 8,
- GIO1, 8,
- GIO2, 8,
- GIO3, 8,
- Offset (0x0C),
- GL00, 8,
- GL01, 8,
- GL02, 8,
- , 3,
- GP27, 1,
- GP28, 1,
- Offset (0x10),
- Offset (0x18),
- GB00, 8,
- GB01, 8,
- GB02, 8,
- GB03, 8,
- Offset (0x2C),
- GIV0, 8,
- , 3,
- LPOL, 1,
- Offset (0x2E),
- GIV2, 8,
- GIV3, 8,
- GU04, 8,
- GU05, 8,
- GU06, 8,
- GU07, 8,
- GIO4, 8,
- GIO5, 8,
- GIO6, 8,
- GIO7, 8,
- , 5,
- GP37, 1,
- Offset (0x39),
- GL05, 8,
- GL06, 8,
- GL07, 8
- }
-
- OperationRegion (RCRB, SystemMemory, 0xFED1C000, 0x4000)
- Field (RCRB, DWordAcc, Lock, Preserve)
- {
- Offset (0x1000),
- Offset (0x3000),
- Offset (0x3404),
- HPAS, 2,
- , 5,
- HPAE, 1,
- Offset (0x3418),
- , 1,
- PATD, 1,
- SATD, 1,
- SMBD, 1,
- HDAD, 1,
- Offset (0x341A),
- RP1D, 1,
- RP2D, 1,
- RP3D, 1,
- RP4D, 1,
- RP5D, 1,
- RP6D, 1
- }
-
- Name (_S0, Package (0x03) // _S0_: S0 System State
- {
- Zero,
- Zero,
- Zero
- })
- Name (_S3, Package (0x03) // _S3_: S3 System State
- {
- 0x05,
- 0x05,
- Zero
- })
- Name (_S4, Package (0x03) // _S4_: S4 System State
- {
- 0x06,
- 0x06,
- Zero
- })
- Name (_S5, Package (0x03) // _S5_: S5 System State
- {
- 0x07,
- 0x07,
- Zero
- })
- Method (GETP, 1, Serialized)
- {
- If (LEqual (And (Arg0, 0x09), Zero))
- {
- Return (0xFFFFFFFF)
- }
-
- If (LEqual (And (Arg0, 0x09), 0x08))
- {
- Return (0x0384)
- }
-
- ShiftRight (And (Arg0, 0x0300), 0x08, Local0)
- ShiftRight (And (Arg0, 0x3000), 0x0C, Local1)
- Return (Multiply (0x1E, Subtract (0x09, Add (Local0, Local1))
- ))
- }
-
- Method (GDMA, 5, Serialized)
- {
- If (Arg0)
- {
- If (LAnd (Arg1, Arg4))
- {
- Return (0x14)
- }
-
- If (LAnd (Arg2, Arg4))
- {
- Return (Multiply (Subtract (0x04, Arg3), 0x0F))
- }
-
- Return (Multiply (Subtract (0x04, Arg3), 0x1E))
- }
-
- Return (0xFFFFFFFF)
- }
-
- Method (GETT, 1, Serialized)
- {
- Return (Multiply (0x1E, Subtract (0x09, Add (And (ShiftRight \
(Arg0, 0x02
- ), 0x03), And (Arg0, 0x03)))))
- }
-
- Method (GETF, 3, Serialized)
- {
- Name (TMPF, Zero)
- If (Arg0)
- {
- Or (TMPF, One, TMPF) /* \GETF.TMPF */
- }
-
- If (And (Arg2, 0x02))
- {
- Or (TMPF, 0x02, TMPF) /* \GETF.TMPF */
- }
-
- If (Arg1)
- {
- Or (TMPF, 0x04, TMPF) /* \GETF.TMPF */
- }
-
- If (And (Arg2, 0x20))
- {
- Or (TMPF, 0x08, TMPF) /* \GETF.TMPF */
- }
-
- If (And (Arg2, 0x4000))
- {
- Or (TMPF, 0x10, TMPF) /* \GETF.TMPF */
- }
-
- Return (TMPF) /* \GETF.TMPF */
- }
-
- Method (SETP, 3, Serialized)
- {
- If (LGreater (Arg0, 0xF0))
- {
- Return (0x08)
- }
- Else
- {
- If (And (Arg1, 0x02))
- {
- If (LAnd (LLessEqual (Arg0, 0x78), And (Arg2, 0x02)))
- {
- Return (0x2301)
- }
-
- If (LAnd (LLessEqual (Arg0, 0xB4), And (Arg2, One)))
- {
- Return (0x2101)
- }
- }
-
- Return (0x1001)
- }
- }
-
- Method (SDMA, 1, Serialized)
- {
- If (LLessEqual (Arg0, 0x14))
- {
- Return (One)
- }
-
- If (LLessEqual (Arg0, 0x1E))
- {
- Return (0x02)
- }
-
- If (LLessEqual (Arg0, 0x2D))
- {
- Return (One)
- }
-
- If (LLessEqual (Arg0, 0x3C))
- {
- Return (0x02)
- }
-
- If (LLessEqual (Arg0, 0x5A))
- {
- Return (One)
- }
-
- Return (Zero)
- }
-
- Method (SETT, 3, Serialized)
- {
- If (And (Arg1, 0x02))
- {
- If (LAnd (LLessEqual (Arg0, 0x78), And (Arg2, 0x02)))
- {
- Return (0x0B)
- }
-
- If (LAnd (LLessEqual (Arg0, 0xB4), And (Arg2, One)))
- {
- Return (0x09)
- }
- }
-
- Return (0x04)
- }
- }
-
- Device (HDEF)
- {
- Name (_ADR, 0x001B0000) // _ADR: Address
- OperationRegion (HDAR, PCI_Config, 0x4C, 0x10)
- Field (HDAR, WordAcc, NoLock, Preserve)
- {
- DCKA, 1,
- Offset (0x01),
- DCKM, 1,
- , 6,
- DCKS, 1,
- Offset (0x08),
- , 15,
- PMES, 1
- }
-
- Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
- {
- 0x0D,
- 0x03
- })
- }
-
- Device (RP01)
- {
- Name (_ADR, 0x001C0000) // _ADR: Address
- OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
- Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
- {
- Offset (0x12),
- , 13,
- LASX, 1,
- Offset (0x1A),
- ABPX, 1,
- , 2,
- PDCX, 1,
- , 2,
- PDSX, 1,
- Offset (0x1B),
- LSCX, 1,
- Offset (0x20),
- Offset (0x22),
- PSPX, 1,
- Offset (0x9C),
- , 30,
- HPSX, 1,
- PMSX, 1
- }
-
- Device (PXSX)
- {
- Name (_ADR, Zero) // _ADR: Address
- }
-
- Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
- {
- If (GPIC)
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- Zero,
- 0x10
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- Zero,
- 0x11
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- Zero,
- 0x12
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- Zero,
- 0x13
- }
- })
- }
- Else
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- ^^LPCB.LNKA,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- ^^LPCB.LNKB,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- ^^LPCB.LNKC,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- ^^LPCB.LNKD,
- Zero
- }
- })
- }
- }
- }
-
- Device (RP02)
- {
- Name (_ADR, 0x001C0001) // _ADR: Address
- OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
- Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
- {
- Offset (0x12),
- , 13,
- LASX, 1,
- Offset (0x1A),
- ABPX, 1,
- , 2,
- PDCX, 1,
- , 2,
- PDSX, 1,
- Offset (0x1B),
- LSCX, 1,
- Offset (0x20),
- Offset (0x22),
- PSPX, 1,
- Offset (0x9C),
- , 30,
- HPSX, 1,
- PMSX, 1
- }
-
- Device (PXSX)
- {
- Name (_ADR, Zero) // _ADR: Address
- }
-
- Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
- {
- If (GPIC)
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- Zero,
- 0x11
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- Zero,
- 0x12
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- Zero,
- 0x13
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- Zero,
- 0x10
- }
- })
- }
- Else
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- ^^LPCB.LNKB,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- ^^LPCB.LNKC,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- ^^LPCB.LNKD,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- ^^LPCB.LNKA,
- Zero
- }
- })
- }
- }
- }
-
- Device (RP03)
- {
- Name (_ADR, 0x001C0002) // _ADR: Address
- OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
- Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
- {
- Offset (0x12),
- , 13,
- LASX, 1,
- Offset (0x1A),
- ABPX, 1,
- , 2,
- PDCX, 1,
- , 2,
- PDSX, 1,
- Offset (0x1B),
- LSCX, 1,
- Offset (0x20),
- Offset (0x22),
- PSPX, 1,
- Offset (0x9C),
- , 30,
- HPSX, 1,
- PMSX, 1
- }
-
- Device (PXSX)
- {
- Name (_ADR, Zero) // _ADR: Address
- }
-
- Name (PXSX._RMV, One) // _RMV: Removal Status
- Name (PXSX._PRW, Package (0x02) // _PRW: Power Resources for Wake
- {
- 0x09,
- 0x03
- })
- Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
- {
- If (GPIC)
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- Zero,
- 0x12
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- Zero,
- 0x13
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- Zero,
- 0x10
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- Zero,
- 0x11
- }
- })
- }
- Else
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- ^^LPCB.LNKC,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- ^^LPCB.LNKD,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- ^^LPCB.LNKA,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- ^^LPCB.LNKB,
- Zero
- }
- })
- }
- }
- }
-
- Device (RP04)
- {
- Name (_ADR, 0x001C0003) // _ADR: Address
- OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
- Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
- {
- Offset (0x12),
- , 13,
- LASX, 1,
- Offset (0x1A),
- ABPX, 1,
- , 2,
- PDCX, 1,
- , 2,
- PDSX, 1,
- Offset (0x1B),
- LSCX, 1,
- Offset (0x20),
- Offset (0x22),
- PSPX, 1,
- Offset (0x9C),
- , 30,
- HPSX, 1,
- PMSX, 1
- }
-
- Device (PXSX)
- {
- Name (_ADR, Zero) // _ADR: Address
- Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for \
Wake
- {
- If (WKLN)
- {
- Return (Package (0x02)
- {
- 0x09,
- 0x03
- })
- }
- Else
- {
- Return (Package (0x02)
- {
- 0x09,
- Zero
- })
- }
- }
- }
-
- Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
- {
- If (GPIC)
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- Zero,
- 0x13
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- Zero,
- 0x10
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- Zero,
- 0x11
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- Zero,
- 0x12
- }
- })
- }
- Else
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- ^^LPCB.LNKD,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- ^^LPCB.LNKA,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- ^^LPCB.LNKB,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- ^^LPCB.LNKC,
- Zero
- }
- })
- }
- }
- }
-
- Device (RP05)
- {
- Name (_ADR, 0x001C0004) // _ADR: Address
- OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
- Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
- {
- Offset (0x12),
- , 13,
- LASX, 1,
- Offset (0x1A),
- ABPX, 1,
- , 2,
- PDCX, 1,
- , 2,
- PDSX, 1,
- Offset (0x1B),
- LSCX, 1,
- Offset (0x20),
- Offset (0x22),
- PSPX, 1,
- Offset (0x9C),
- , 30,
- HPSX, 1,
- PMSX, 1
- }
-
- Device (PXSX)
- {
- Name (_ADR, Zero) // _ADR: Address
- }
-
- Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
- {
- If (GPIC)
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- Zero,
- 0x10
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- Zero,
- 0x11
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- Zero,
- 0x12
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- Zero,
- 0x13
- }
- })
- }
- Else
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- ^^LPCB.LNKA,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- ^^LPCB.LNKB,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- ^^LPCB.LNKC,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- ^^LPCB.LNKD,
- Zero
- }
- })
- }
- }
- }
-
- Device (RP06)
- {
- Name (_ADR, 0x001C0005) // _ADR: Address
- OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
- Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
- {
- Offset (0x12),
- , 13,
- LASX, 1,
- Offset (0x1A),
- ABPX, 1,
- , 2,
- PDCX, 1,
- , 2,
- PDSX, 1,
- Offset (0x1B),
- LSCX, 1,
- Offset (0x20),
- Offset (0x22),
- PSPX, 1,
- Offset (0x9C),
- , 30,
- HPSX, 1,
- PMSX, 1
- }
-
- Device (PXSX)
- {
- Name (_ADR, Zero) // _ADR: Address
- }
-
- Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
- {
- If (GPIC)
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- Zero,
- 0x11
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- Zero,
- 0x12
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- Zero,
- 0x13
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- Zero,
- 0x10
- }
- })
- }
- Else
- {
- Return (Package (0x04)
- {
- Package (0x04)
- {
- 0xFFFF,
- Zero,
- ^^LPCB.LNKB,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- One,
- ^^LPCB.LNKC,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x02,
- ^^LPCB.LNKD,
- Zero
- },
-
- Package (0x04)
- {
- 0xFFFF,
- 0x03,
- ^^LPCB.LNKA,
- Zero
- }
- })
- }
- }
- }
-
- Device (USB1)
- {
- Name (_ADR, 0x001D0000) // _ADR: Address
- OperationRegion (U1CS, PCI_Config, 0xC4, 0x04)
- Field (U1CS, DWordAcc, NoLock, Preserve)
- {
- U1EN, 2
- }
-
- Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
- {
- 0x03,
- 0x03
- })
- Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
- {
- If (Arg0)
- {
- Store (One, ACPW) /* \ACPW */
- If (ACPW)
- {
- Store (0x03, U1EN) /* \_SB_.PCI0.USB1.U1EN */
- }
- }
- Else
- {
- Store (Zero, U1EN) /* \_SB_.PCI0.USB1.U1EN */
- }
- }
-
- Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
- {
- Return (0x02)
- }
-
- Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
- {
- Return (0x02)
- }
- }
-
- Device (USB2)
- {
- Name (_ADR, 0x001D0001) // _ADR: Address
- OperationRegion (U2CS, PCI_Config, 0xC4, 0x04)
- Field (U2CS, DWordAcc, NoLock, Preserve)
- {
- U2EN, 2
- }
-
- Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
- {
- 0x04,
- 0x03
- })
- Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
- {
- If (Arg0)
- {
- Store (One, ACPW) /* \ACPW */
- If (ACPW)
- {
- Store (One, U2EN) /* \_SB_.PCI0.USB2.U2EN */
- }
- }
- Else
- {
- Store (Zero, U2EN) /* \_SB_.PCI0.USB2.U2EN */
- }
- }
-
- Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
- {
- Return (0x02)
- }
-
- Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
- {
- Return (0x02)
- }
- }
-
- Device (USB3)
- {
- Name (_ADR, 0x001D0002) // _ADR: Address
- OperationRegion (U2CS, PCI_Config, 0xC4, 0x04)
- Field (U2CS, DWordAcc, NoLock, Preserve)
- {
- U3EN, 2
- }
-
- Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
- {
- 0x0C,
- 0x03
- })
- Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
- {
- If (Arg0)
- {
- Store (One, ACPW) /* \ACPW */
- If (ACPW)
- {
- Store (0x03, U3EN) /* \_SB_.PCI0.USB3.U3EN */
- }
- }
- Else
- {
- Store (Zero, U3EN) /* \_SB_.PCI0.USB3.U3EN */
- }
- }
-
- Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
- {
- Return (0x02)
- }
-
- Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
- {
- Return (0x02)
- }
- }
-
- Device (USB4)
- {
- Name (_ADR, 0x001A0000) // _ADR: Address
- OperationRegion (U4CS, PCI_Config, 0xC4, 0x04)
- Field (U4CS, DWordAcc, NoLock, Preserve)
- {
- U4EN, 2
- }
-
- Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
- {
- 0x0E,
- 0x03
- })
- Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
- {
- If (Arg0)
- {
- Store (One, ACPW) /* \ACPW */
- If (ACPW)
- {
- Store (0x03, U4EN) /* \_SB_.PCI0.USB4.U4EN */
- }
- }
- Else
- {
- Store (Zero, U4EN) /* \_SB_.PCI0.USB4.U4EN */
- }
- }
-
- Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
- {
- Return (0x02)
- }
-
- Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
- {
- Return (0x02)
- }
- }
-
- Device (USB5)
- {
- Name (_ADR, 0x001A0001) // _ADR: Address
- OperationRegion (U5CS, PCI_Config, 0xC4, 0x04)
- Field (U5CS, DWordAcc, NoLock, Preserve)
- {
- U5EN, 2
- }
-
- Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
- {
- If (Arg0)
- {
- Store (One, ACPW) /* \ACPW */
- If (ACPW)
- {
- Store (0x03, U5EN) /* \_SB_.PCI0.USB5.U5EN */
- }
- }
- Else
- {
- Store (Zero, U5EN) /* \_SB_.PCI0.USB5.U5EN */
- }
- }
-
- Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
- {
- Return (0x02)
- }
-
- Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
- {
- Return (0x02)
- }
- }
-
- Device (EHC1)
- {
- Name (_ADR, 0x001D0007) // _ADR: Address
- OperationRegion (U7CS, PCI_Config, 0x54, 0x04)
- Field (U7CS, DWordAcc, NoLock, Preserve)
- {
- , 15,
- PMES, 1
- }
-
- Device (HUB7)
- {
- Name (_ADR, Zero) // _ADR: Address
- Device (PRT1)
- {
- Name (_ADR, One) // _ADR: Address
- }
-
- Device (PRT2)
- {
- Name (_ADR, 0x02) // _ADR: Address
- }
-
- Device (PRT3)
- {
- Name (_ADR, 0x03) // _ADR: Address
- }
-
- Device (PRT4)
- {
- Name (_ADR, 0x04) // _ADR: Address
- }
-
- Device (PRT5)
- {
- Name (_ADR, 0x05) // _ADR: Address
- }
-
- Device (PRT6)
- {
- Name (_ADR, 0x06) // _ADR: Address
- }
- }
-
- Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
- {
- 0x0D,
- 0x03
- })
- Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
- {
- Return (0x02)
- }
-
- Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
- {
- Return (0x02)
- }
- }
-
- Device (EHC2)
- {
- Name (_ADR, 0x001A0007) // _ADR: Address
- OperationRegion (UFCS, PCI_Config, 0x54, 0x04)
- Field (UFCS, DWordAcc, NoLock, Preserve)
- {
- , 15,
- PMES, 1
- }
-
- Device (HUB7)
- {
- Name (_ADR, Zero) // _ADR: Address
- Device (PRT1)
- {
- Name (_ADR, One) // _ADR: Address
- }
-
- Device (PRT2)
- {
- Name (_ADR, 0x02) // _ADR: Address
- }
-
- Device (PRT3)
- {
- Name (_ADR, 0x03) // _ADR: Address
- }
-
- Device (PRT4)
- {
- Name (_ADR, 0x04) // _ADR: Address
- }
- }
-
- Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
- {
- 0x0D,
- 0x03
- })
- Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
- {
- Return (0x02)
- }
-
- Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
- {
- Return (0x02)
- }
- }
-
- Device (PCIB)
- {
- Name (_ADR, 0x001E0000) // _ADR: Address
- Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
- {
- If (GPIC)
- {
- Return (Package (0x02)
- {
- Package (0x04)
- {
- 0x0006FFFF,
- Zero,
- Zero,
- 0x16
- },
-
- Package (0x04)
- {
- 0x0006FFFF,
- One,
- Zero,
- 0x17
- }
- })
- }
- Else
- {
- Return (Package (0x02)
- {
- Package (0x04)
- {
- 0x0006FFFF,
- Zero,
- ^^LPCB.LNKG,
- Zero
- },
-
- Package (0x04)
- {
- 0x0006FFFF,
- One,
- ^^LPCB.LNKH,
- Zero
- }
- })
- }
- }
- }
-
- Device (LPCB)
- {
- Name (_ADR, 0x001F0000) // _ADR: Address
- OperationRegion (LPC0, PCI_Config, 0x40, 0xC0)
- Field (LPC0, AnyAcc, NoLock, Preserve)
- {
- Offset (0x20),
- PARC, 8,
- PBRC, 8,
- PCRC, 8,
- PDRC, 8,
- Offset (0x28),
- PERC, 8,
- PFRC, 8,
- PGRC, 8,
- PHRC, 8,
- Offset (0x40),
- CMAR, 3,
- , 1,
- CMBR, 3,
- Offset (0x41),
- LPTR, 2,
- Offset (0x42),
- CMAD, 1,
- CMBD, 1,
- LPTD, 1,
- FDDD, 1,
- Offset (0x48),
- IOR2, 16,
- , 2,
- LGRM, 6,
- Offset (0xB0),
- RAEN, 1,
- , 13,
- RCBA, 18
- }
-
- OperationRegion (SMI0, SystemIO, 0x0000FE00, 0x00000002)
- Field (SMI0, AnyAcc, NoLock, Preserve)
- {
- SMIC, 8
- }
-
- OperationRegion (SMI1, SystemMemory, 0xBF6E2EBD, 0x00000090)
- Field (SMI1, AnyAcc, NoLock, Preserve)
- {
- BCMD, 8,
- DID, 32,
- INFO, 1024
- }
-
- Field (SMI1, AnyAcc, NoLock, Preserve)
- {
- AccessAs (ByteAcc, 0x00),
- Offset (0x05),
- INF, 8,
- INF1, 32
- }
-
- Mutex (PSMX, 0x00)
- Method (PHSS, 1, NotSerialized)
- {
- Acquire (PSMX, 0xFFFF)
- Store (0x80, BCMD) /* \_SB_.PCI0.LPCB.BCMD */
- Store (Arg0, DID) /* \_SB_.PCI0.LPCB.DID_ */
- Store (Zero, SMIC) /* \_SB_.PCI0.LPCB.SMIC */
- Release (PSMX)
- }
-
- Device (LNKA)
- {
- Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID
- Name (_UID, One) // _UID: Unique ID
- Method (_DIS, 0, Serialized) // _DIS: Disable Device
- {
- Store (0x80, PARC) /* \_SB_.PCI0.LPCB.PARC */
- }
-
- Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings
- {
- IRQ (Level, ActiveLow, Shared, )
- {1,3,4,5,6,7,10,12,14,15}
- })
- Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
- {
- Name (RTLA, ResourceTemplate ()
- {
- IRQ (Level, ActiveLow, Shared, )
- {}
- })
- CreateWordField (RTLA, One, IRQ0)
- Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKA._CRS.IRQ0 */
- ShiftLeft (One, And (PARC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKA._CRS.IRQ0 */
- Return (RTLA) /* \_SB_.PCI0.LPCB.LNKA._CRS.RTLA */
- }
-
- Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
- {
- CreateWordField (Arg0, One, IRQ0)
- FindSetRightBit (IRQ0, Local0)
- Decrement (Local0)
- Store (Local0, PARC) /* \_SB_.PCI0.LPCB.PARC */
- }
-
- Method (_STA, 0, Serialized) // _STA: Status
- {
- If (And (PARC, 0x80))
- {
- Return (0x09)
- }
- Else
- {
- Return (0x0B)
- }
- }
- }
-
- Device (LNKB)
- {
- Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID
- Name (_UID, 0x02) // _UID: Unique ID
- Method (_DIS, 0, Serialized) // _DIS: Disable Device
- {
- Store (0x80, PBRC) /* \_SB_.PCI0.LPCB.PBRC */
- }
-
- Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings
- {
- IRQ (Level, ActiveLow, Shared, )
- {1,3,4,5,6,7,11,12,14,15}
- })
- Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
- {
- Name (RTLB, ResourceTemplate ()
- {
- IRQ (Level, ActiveLow, Shared, )
- {}
- })
- CreateWordField (RTLB, One, IRQ0)
- Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKB._CRS.IRQ0 */
- ShiftLeft (One, And (PBRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKB._CRS.IRQ0 */
- Return (RTLB) /* \_SB_.PCI0.LPCB.LNKB._CRS.RTLB */
- }
-
- Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
- {
- CreateWordField (Arg0, One, IRQ0)
- FindSetRightBit (IRQ0, Local0)
- Decrement (Local0)
- Store (Local0, PBRC) /* \_SB_.PCI0.LPCB.PBRC */
- }
-
- Method (_STA, 0, Serialized) // _STA: Status
- {
- If (And (PBRC, 0x80))
- {
- Return (0x09)
- }
- Else
- {
- Return (0x0B)
- }
- }
- }
-
- Device (LNKC)
- {
- Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID
- Name (_UID, 0x03) // _UID: Unique ID
- Method (_DIS, 0, Serialized) // _DIS: Disable Device
- {
- Store (0x80, PCRC) /* \_SB_.PCI0.LPCB.PCRC */
- }
-
- Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings
- {
- IRQ (Level, ActiveLow, Shared, )
- {1,3,4,5,6,7,10,12,14,15}
- })
- Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
- {
- Name (RTLC, ResourceTemplate ()
- {
- IRQ (Level, ActiveLow, Shared, )
- {}
- })
- CreateWordField (RTLC, One, IRQ0)
- Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKC._CRS.IRQ0 */
- ShiftLeft (One, And (PCRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKC._CRS.IRQ0 */
- Return (RTLC) /* \_SB_.PCI0.LPCB.LNKC._CRS.RTLC */
- }
-
- Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
- {
- CreateWordField (Arg0, One, IRQ0)
- FindSetRightBit (IRQ0, Local0)
- Decrement (Local0)
- Store (Local0, PCRC) /* \_SB_.PCI0.LPCB.PCRC */
- }
-
- Method (_STA, 0, Serialized) // _STA: Status
- {
- If (And (PCRC, 0x80))
- {
- Return (0x09)
- }
- Else
- {
- Return (0x0B)
- }
- }
- }
-
- Device (LNKD)
- {
- Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID
- Name (_UID, 0x04) // _UID: Unique ID
- Method (_DIS, 0, Serialized) // _DIS: Disable Device
- {
- Store (0x80, PDRC) /* \_SB_.PCI0.LPCB.PDRC */
- }
-
- Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings
- {
- IRQ (Level, ActiveLow, Shared, )
- {1,3,4,5,6,7,11,12,14,15}
- })
- Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
- {
- Name (RTLD, ResourceTemplate ()
- {
- IRQ (Level, ActiveLow, Shared, )
- {}
- })
- CreateWordField (RTLD, One, IRQ0)
- Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKD._CRS.IRQ0 */
- ShiftLeft (One, And (PDRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKD._CRS.IRQ0 */
- Return (RTLD) /* \_SB_.PCI0.LPCB.LNKD._CRS.RTLD */
- }
-
- Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
- {
- CreateWordField (Arg0, One, IRQ0)
- FindSetRightBit (IRQ0, Local0)
- Decrement (Local0)
- Store (Local0, PDRC) /* \_SB_.PCI0.LPCB.PDRC */
- }
-
- Method (_STA, 0, Serialized) // _STA: Status
- {
- If (And (PDRC, 0x80))
- {
- Return (0x09)
- }
- Else
- {
- Return (0x0B)
- }
- }
- }
-
- Device (LNKE)
- {
- Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID
- Name (_UID, 0x05) // _UID: Unique ID
- Method (_DIS, 0, Serialized) // _DIS: Disable Device
- {
- Store (0x80, PERC) /* \_SB_.PCI0.LPCB.PERC */
- }
-
- Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings
- {
- IRQ (Level, ActiveLow, Shared, )
- {1,3,4,5,6,7,10,12,14,15}
- })
- Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
- {
- Name (RTLE, ResourceTemplate ()
- {
- IRQ (Level, ActiveLow, Shared, )
- {}
- })
- CreateWordField (RTLE, One, IRQ0)
- Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKE._CRS.IRQ0 */
- ShiftLeft (One, And (PERC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKE._CRS.IRQ0 */
- Return (RTLE) /* \_SB_.PCI0.LPCB.LNKE._CRS.RTLE */
- }
-
- Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
- {
- CreateWordField (Arg0, One, IRQ0)
- FindSetRightBit (IRQ0, Local0)
- Decrement (Local0)
- Store (Local0, PERC) /* \_SB_.PCI0.LPCB.PERC */
- }
-
- Method (_STA, 0, Serialized) // _STA: Status
- {
- If (And (PERC, 0x80))
- {
- Return (0x09)
- }
- Else
- {
- Return (0x0B)
- }
- }
- }
-
- Device (LNKF)
- {
- Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID
- Name (_UID, 0x06) // _UID: Unique ID
- Method (_DIS, 0, Serialized) // _DIS: Disable Device
- {
- Store (0x80, PFRC) /* \_SB_.PCI0.LPCB.PFRC */
- }
-
- Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings
- {
- IRQ (Level, ActiveLow, Shared, )
- {1,3,4,5,6,7,11,12,14,15}
- })
- Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
- {
- Name (RTLF, ResourceTemplate ()
- {
- IRQ (Level, ActiveLow, Shared, )
- {}
- })
- CreateWordField (RTLF, One, IRQ0)
- Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKF._CRS.IRQ0 */
- ShiftLeft (One, And (PFRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKF._CRS.IRQ0 */
- Return (RTLF) /* \_SB_.PCI0.LPCB.LNKF._CRS.RTLF */
- }
-
- Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
- {
- CreateWordField (Arg0, One, IRQ0)
- FindSetRightBit (IRQ0, Local0)
- Decrement (Local0)
- Store (Local0, PFRC) /* \_SB_.PCI0.LPCB.PFRC */
- }
-
- Method (_STA, 0, Serialized) // _STA: Status
- {
- If (And (PFRC, 0x80))
- {
- Return (0x09)
- }
- Else
- {
- Return (0x0B)
- }
- }
- }
-
- Device (LNKG)
- {
- Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID
- Name (_UID, 0x07) // _UID: Unique ID
- Method (_DIS, 0, Serialized) // _DIS: Disable Device
- {
- Store (0x80, PGRC) /* \_SB_.PCI0.LPCB.PGRC */
- }
-
- Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings
- {
- IRQ (Level, ActiveLow, Shared, )
- {1,3,4,5,6,7,10,12,14,15}
- })
- Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
- {
- Name (RTLG, ResourceTemplate ()
- {
- IRQ (Level, ActiveLow, Shared, )
- {}
- })
- CreateWordField (RTLG, One, IRQ0)
- Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKG._CRS.IRQ0 */
- ShiftLeft (One, And (PGRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKG._CRS.IRQ0 */
- Return (RTLG) /* \_SB_.PCI0.LPCB.LNKG._CRS.RTLG */
- }
-
- Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
- {
- CreateWordField (Arg0, One, IRQ0)
- FindSetRightBit (IRQ0, Local0)
- Decrement (Local0)
- Store (Local0, PGRC) /* \_SB_.PCI0.LPCB.PGRC */
- }
-
- Method (_STA, 0, Serialized) // _STA: Status
- {
- If (And (PGRC, 0x80))
- {
- Return (0x09)
- }
- Else
- {
- Return (0x0B)
- }
- }
- }
-
- Device (LNKH)
- {
- Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID
- Name (_UID, 0x08) // _UID: Unique ID
- Method (_DIS, 0, Serialized) // _DIS: Disable Device
- {
- Store (0x80, PHRC) /* \_SB_.PCI0.LPCB.PHRC */
- }
-
- Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings
- {
- IRQ (Level, ActiveLow, Shared, )
- {1,3,4,5,6,7,11,12,14,15}
- })
- Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
- {
- Name (RTLH, ResourceTemplate ()
- {
- IRQ (Level, ActiveLow, Shared, )
- {}
- })
- CreateWordField (RTLH, One, IRQ0)
- Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKH._CRS.IRQ0 */
- ShiftLeft (One, And (PHRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKH._CRS.IRQ0 */
- Return (RTLH) /* \_SB_.PCI0.LPCB.LNKH._CRS.RTLH */
- }
-
- Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
- {
- CreateWordField (Arg0, One, IRQ0)
- FindSetRightBit (IRQ0, Local0)
- Decrement (Local0)
- Store (Local0, PHRC) /* \_SB_.PCI0.LPCB.PHRC */
- }
-
- Method (_STA, 0, Serialized) // _STA: Status
- {
- If (And (PHRC, 0x80))
- {
- Return (0x09)
- }
- Else
- {
- Return (0x0B)
- }
- }
- }
-
- Device (DMAC)
- {
- Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) \
// _HID: Hardware ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings
- {
- IO (Decode16,
- 0x0000, // Range Minimum
- 0x0000, // Range Maximum
- 0x01, // Alignment
- 0x20, // Length
- )
- IO (Decode16,
- 0x0081, // Range Minimum
- 0x0081, // Range Maximum
- 0x01, // Alignment
- 0x11, // Length
- )
- IO (Decode16,
- 0x0093, // Range Minimum
- 0x0093, // Range Maximum
- 0x01, // Alignment
- 0x0D, // Length
- )
- IO (Decode16,
- 0x00C0, // Range Minimum
- 0x00C0, // Range Maximum
- 0x01, // Alignment
- 0x20, // Length
- )
- DMA (Compatibility, NotBusMaster, Transfer8_16, )
- {4}
- })
- }
-
- Device (FWHD)
- {
- Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub \
Device */) // _HID: Hardware ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings
- {
- Memory32Fixed (ReadOnly,
- 0xFF000000, // Address Base
- 0x01000000, // Address Length
- )
- })
- }
-
- Device (HPET)
- {
- Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // \
_HID: Hardware ID
- Name (_CID, EisaId ("PNP0C01") /* System Board */) // _CID: \
Compatible ID
- Name (BUF0, ResourceTemplate ()
- {
- Memory32Fixed (ReadOnly,
- 0xFED00000, // Address Base
- 0x00000400, // Address Length
- _Y14)
- })
- Method (_STA, 0, NotSerialized) // _STA: Status
- {
- If (LGreaterEqual (OSYS, 0x07D1))
- {
- If (HPAE)
- {
- Return (0x0F)
- }
- }
- Else
- {
- If (HPAE)
- {
- Return (0x0B)
- }
- }
-
- Return (Zero)
- }
-
- Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
- {
- If (HPAE)
- {
- CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y14._BAS, \
HPT0) // _BAS: Base Address
- If (LEqual (HPAS, One))
- {
- Store (0xFED01000, HPT0) /* \
\_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
- }
-
- If (LEqual (HPAS, 0x02))
- {
- Store (0xFED02000, HPT0) /* \
\_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
- }
-
- If (LEqual (HPAS, 0x03))
- {
- Store (0xFED03000, HPT0) /* \
\_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
- }
- }
-
- Return (BUF0) /* \_SB_.PCI0.LPCB.HPET.BUF0 */
- }
- }
-
- Device (IPIC)
- {
- Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable \
Interrupt Controller */) // _HID: Hardware ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings
- {
- IO (Decode16,
- 0x0020, // Range Minimum
- 0x0020, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x0024, // Range Minimum
- 0x0024, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x0028, // Range Minimum
- 0x0028, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x002C, // Range Minimum
- 0x002C, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x0030, // Range Minimum
- 0x0030, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x0034, // Range Minimum
- 0x0034, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x0038, // Range Minimum
- 0x0038, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x003C, // Range Minimum
- 0x003C, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x00A0, // Range Minimum
- 0x00A0, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x00A4, // Range Minimum
- 0x00A4, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x00A8, // Range Minimum
- 0x00A8, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x00AC, // Range Minimum
- 0x00AC, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x00B0, // Range Minimum
- 0x00B0, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x00B4, // Range Minimum
- 0x00B4, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x00B8, // Range Minimum
- 0x00B8, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x00BC, // Range Minimum
- 0x00BC, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x04D0, // Range Minimum
- 0x04D0, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IRQNoFlags ()
- {2}
- })
- }
-
- Device (MATH)
- {
- Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point \
Processing Unit */) // _HID: Hardware ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings
- {
- IO (Decode16,
- 0x00F0, // Range Minimum
- 0x00F0, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- IRQNoFlags ()
- {13}
- })
- }
-
- Device (LDRC)
- {
- Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) \
// _HID: Hardware ID
- Name (_UID, 0x02) // _UID: Unique ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings
- {
- IO (Decode16,
- 0x002E, // Range Minimum
- 0x002E, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x004E, // Range Minimum
- 0x004E, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x0061, // Range Minimum
- 0x0061, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- IO (Decode16,
- 0x0063, // Range Minimum
- 0x0063, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- IO (Decode16,
- 0x0065, // Range Minimum
- 0x0065, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- IO (Decode16,
- 0x0067, // Range Minimum
- 0x0067, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- IO (Decode16,
- 0x0080, // Range Minimum
- 0x0080, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- IO (Decode16,
- 0x0092, // Range Minimum
- 0x0092, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- IO (Decode16,
- 0x00B2, // Range Minimum
- 0x00B2, // Range Maximum
- 0x01, // Alignment
- 0x02, // Length
- )
- IO (Decode16,
- 0x0680, // Range Minimum
- 0x0680, // Range Maximum
- 0x01, // Alignment
- 0x20, // Length
- )
- IO (Decode16,
- 0x0800, // Range Minimum
- 0x0800, // Range Maximum
- 0x01, // Alignment
- 0x10, // Length
- )
- IO (Decode16,
- 0x1000, // Range Minimum
- 0x1000, // Range Maximum
- 0x01, // Alignment
- 0x80, // Length
- )
- IO (Decode16,
- 0x1180, // Range Minimum
- 0x1180, // Range Maximum
- 0x01, // Alignment
- 0x40, // Length
- )
- IO (Decode16,
- 0xFE00, // Range Minimum
- 0xFE00, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- IO (Decode16,
- 0xFF00, // Range Minimum
- 0xFF00, // Range Maximum
- 0x01, // Alignment
- 0x80, // Length
- )
- })
- }
-
- Device (RTC)
- {
- Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // \
_HID: Hardware ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings
- {
- IO (Decode16,
- 0x0070, // Range Minimum
- 0x0070, // Range Maximum
- 0x01, // Alignment
- 0x08, // Length
- )
- IRQNoFlags ()
- {8}
- })
- }
-
- Device (TIMR)
- {
- Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // \
_HID: Hardware ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings
- {
- IO (Decode16,
- 0x0040, // Range Minimum
- 0x0040, // Range Maximum
- 0x01, // Alignment
- 0x04, // Length
- )
- IO (Decode16,
- 0x0050, // Range Minimum
- 0x0050, // Range Maximum
- 0x10, // Alignment
- 0x04, // Length
- )
- IRQNoFlags ()
- {0}
- })
- }
-
- Device (ACAD)
- {
- Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: \
Hardware ID
- Name (_PCL, Package (0x01) // _PCL: Power Consumer List
- {
- _SB
- })
- Method (_PSR, 0, NotSerialized) // _PSR: Power Source
- {
- Store (One, ACPW) /* \ACPW */
- Return (ACPW) /* \ACPW */
- }
- }
-
- Method (ECOK, 0, NotSerialized)
- {
- If (LEqual (^EC0.Z009, One))
- {
- Return (One)
- }
- Else
- {
- Return (Zero)
- }
- }
-
- Device (EC0)
- {
- Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) \
// _HID: Hardware ID
- Name (_GPE, 0x1C) // _GPE: General Purpose Events
- Name (Z009, Zero)
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings
- {
- IO (Decode16,
- 0x0062, // Range Minimum
- 0x0062, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- IO (Decode16,
- 0x0066, // Range Minimum
- 0x0066, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- })
- Method (_REG, 2, NotSerialized) // _REG: Region Availability
- {
- If (LEqual (Arg0, 0x03))
- {
- Store (Arg1, Z009) /* \_SB_.PCI0.LPCB.EC0_.Z009 */
- If (CondRefOf (_OSI, Local0))
- {
- Store (Zero, BTDS) /* \_SB_.PCI0.LPCB.EC0_.BTDS */
- If (_OSI ("Windows 2006"))
- {
- Store (One, BTDS) /* \_SB_.PCI0.LPCB.EC0_.BTDS \
*/
- }
- }
- }
- }
-
- OperationRegion (ERAM, EmbeddedControl, Zero, 0xFF)
- Field (ERAM, ByteAcc, Lock, Preserve)
- {
- Offset (0x60),
- SMPR, 8,
- SMST, 8,
- SMAD, 8,
- SMCM, 8,
- SMD0, 256,
- BCNT, 8,
- SMAA, 24,
- Offset (0x90),
- CHGM, 16,
- CHGS, 16,
- ENID, 8,
- ENIB, 8,
- ENDD, 8,
- CHGV, 8,
- CHGA, 16,
- BAL0, 1,
- BAL1, 1,
- BAL2, 1,
- BAL3, 1,
- BBC0, 1,
- BBC1, 1,
- BBC2, 1,
- BBC3, 1,
- Offset (0x9C),
- PHDD, 1,
- IFDD, 1,
- IODD, 1,
- SHDD, 1,
- S120, 1,
- EFDD, 1,
- CRTD, 1,
- SPWR, 1,
- SBTN, 1,
- VIDO, 1,
- VOLD, 1,
- VOLU, 1,
- MUTE, 1,
- CONT, 1,
- BRGT, 1,
- HBTN, 1,
- S4ST, 1,
- SKEY, 1,
- BKEY, 1,
- TOUP, 1,
- FNBN, 1,
- LIDF, 1,
- DIGM, 1,
- UWAK, 1,
- Offset (0xA0),
- DKSP, 1,
- DKIN, 1,
- DKID, 1,
- DKOK, 1,
- Offset (0xA1),
- DKPW, 1,
- Offset (0xA2),
- BTNS, 8,
- S1LD, 1,
- S3LD, 1,
- VGAQ, 1,
- PCMQ, 1,
- PCMR, 1,
- ADPT, 1,
- SLLS, 1,
- SYS7, 1,
- PWAK, 1,
- MWAK, 1,
- LWAK, 1,
- Offset (0xA5),
- Offset (0xAA),
- TCNL, 8,
- TMPI, 8,
- TMSD, 8,
- FASN, 4,
- FASU, 4,
- PCVL, 4,
- , 2,
- SWTO, 1,
- HWTO, 1,
- MODE, 1,
- FANS, 2,
- INIT, 1,
- FAN1, 1,
- FAN2, 1,
- FANT, 1,
- SKNM, 1,
- CTMP, 8,
- LIDE, 1,
- PMEE, 1,
- PWBE, 1,
- RNGE, 1,
- BTWE, 1,
- DCKE, 1,
- Offset (0xB2),
- SKTX, 8,
- SKTB, 8,
- SKTC, 8,
- SKTA, 8,
- Offset (0xB7),
- HAPL, 2,
- HAPR, 1,
- Offset (0xB8),
- BTDT, 1,
- BTPW, 1,
- BTDS, 1,
- BTPS, 1,
- BTSW, 1,
- BTWK, 1,
- BTLD, 1,
- Offset (0xB9),
- BRTS, 8,
- CNTS, 8,
- WLAT, 1,
- BTAT, 1,
- WLEX, 1,
- BTEX, 1,
- KLSW, 1,
- WLOK, 1,
- Offset (0xBC),
- PTID, 8,
- CPUT, 8,
- EPKT, 8,
- GHID, 8,
- , 4,
- BMF0, 3,
- BTY0, 1,
- BST0, 8,
- BRC0, 16,
- BSN0, 16,
- BPV0, 16,
- BDV0, 16,
- BDC0, 16,
- BFC0, 16,
- GAU0, 8,
- CYC0, 8,
- BPC0, 16,
- BAC0, 16,
- BAT0, 8,
- BTW0, 16,
- BDN0, 8,
- Offset (0xE0),
- , 4,
- BMF1, 3,
- BTY1, 1,
- BST1, 8,
- BRC1, 16,
- BSN1, 16,
- BPV1, 16,
- BDV1, 16,
- BDC1, 16,
- BFC1, 16,
- GAU1, 8,
- CYC1, 8,
- BPC1, 16,
- BAC1, 16,
- BAT1, 8,
- BTW1, 16
- }
-
- Method (_Q11, 0, NotSerialized) // _Qxx: EC Query
- {
- Store (0x87, P80H) /* \P80H */
- If (IGDS)
- {
- ^^^GFX0.BRTN (0x87)
- }
- Else
- {
- Notify (^^^PEGP.VGA.LCD, 0x87) // Device-Specific
- }
- }
-
- Method (_Q12, 0, NotSerialized) // _Qxx: EC Query
- {
- Store (0x86, P80H) /* \P80H */
- If (IGDS)
- {
- ^^^GFX0.BRTN (0x86)
- }
- Else
- {
- Notify (^^^PEGP.VGA.LCD, 0x86) // Device-Specific
- }
- }
-
- Method (_Q1C, 0, NotSerialized) // _Qxx: EC Query
- {
- Store ("=====QUERY_1C=====", Debug)
- If (VIDO)
- {
- If (IGDS)
- {
- ^^^GFX0.GHDS (Zero)
- }
- Else
- {
- ^^^PEGP.VGA.DSSW ()
- }
-
- Store (Zero, VIDO) /* \_SB_.PCI0.LPCB.EC0_.VIDO */
- }
- }
-
- Method (_Q1D, 0, NotSerialized) // _Qxx: EC Query
- {
- Store ("=====QUERY_1D=====", Debug)
- PCLK ()
- }
-
- Method (_Q1E, 0, NotSerialized) // _Qxx: EC Query
- {
- Store ("=====QUERY_1E=====", Debug)
- PCLK ()
- }
-
- Method (_Q25, 0, NotSerialized) // _Qxx: EC Query
- {
- Store ("=====QUERY_25=====", Debug)
- Sleep (0x03E8)
- Notify (^^BAT1, 0x81) // Information Change
- Sleep (0x03E8)
- Notify (^^BAT1, 0x80) // Status Change
- }
-
- Method (_Q34, 0, NotSerialized) // _Qxx: EC Query
- {
- Store ("=====QUERY_34=====", Debug)
- If (BKEY)
- {
- PHSS (0x71)
- Store (Zero, BKEY) /* \_SB_.PCI0.LPCB.EC0_.BKEY */
- }
- }
-
- Method (_Q37, 0, NotSerialized) // _Qxx: EC Query
- {
- Store ("=====QUERY_37=====", Debug)
- Notify (ACAD, 0x80) // Status Change
- Sleep (0x03E8)
- Notify (^^BAT1, 0x80) // Status Change
- }
-
- Method (_Q38, 0, NotSerialized) // _Qxx: EC Query
- {
- Store ("=====QUERY_38=====", Debug)
- Notify (ACAD, 0x80) // Status Change
- Sleep (0x03E8)
- Notify (^^BAT1, 0x80) // Status Change
- }
-
- Method (_Q2D, 0, NotSerialized) // _Qxx: EC Query
- {
- Store ("=====QUERY_2D=====", Debug)
- Store (Zero, DTSM) /* \DTSM */
- TRAP (0x46)
- }
-
- Method (_Q2E, 0, NotSerialized) // _Qxx: EC Query
- {
- Store ("=====QUERY_2E=====", Debug)
- Store (One, DTSM) /* \DTSM */
- TRAP (0x46)
- }
-
- OperationRegion (CCLK, SystemIO, 0x1010, 0x04)
- Field (CCLK, DWordAcc, NoLock, Preserve)
- {
- , 1,
- DUTY, 3,
- THEN, 1,
- Offset (0x01),
- FTT, 1,
- , 8,
- TSTS, 1
- }
-
- OperationRegion (ECRM, EmbeddedControl, Zero, 0xFF)
- Field (ECRM, ByteAcc, Lock, Preserve)
- {
- Offset (0x94),
- ERIB, 16,
- ERBD, 8,
- Offset (0xAC),
- SDTM, 8,
- FSSN, 4,
- FANU, 4,
- PTVL, 3,
- , 4,
- TTHR, 1,
- Offset (0xBC),
- PJID, 8,
- Offset (0xBE),
- Offset (0xF9),
- RFRD, 16
- }
-
- Mutex (FAMX, 0x00)
- Method (FANG, 1, NotSerialized)
- {
- Acquire (FAMX, 0xFFFF)
- Store (Arg0, ERIB) /* \_SB_.PCI0.LPCB.EC0_.ERIB */
- Store (ERBD, Local0)
- Release (FAMX)
- Return (Local0)
- }
-
- Method (FANW, 2, NotSerialized)
- {
- Acquire (FAMX, 0xFFFF)
- Store (Arg0, ERIB) /* \_SB_.PCI0.LPCB.EC0_.ERIB */
- Store (Arg1, ERBD) /* \_SB_.PCI0.LPCB.EC0_.ERBD */
- Release (FAMX)
- Return (Arg1)
- }
-
- Method (TUVR, 1, NotSerialized)
- {
- Return (0x03)
- }
-
- Method (THRO, 1, NotSerialized)
- {
- If (LEqual (Arg0, Zero))
- {
- Return (THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
- }
- Else
- {
- If (LEqual (Arg0, One))
- {
- Return (DUTY) /* \_SB_.PCI0.LPCB.EC0_.DUTY */
- }
- Else
- {
- If (LEqual (Arg0, 0x02))
- {
- Return (TTHR) /* \_SB_.PCI0.LPCB.EC0_.TTHR */
- }
- Else
- {
- Return (0xFF)
- }
- }
- }
- }
-
- Method (CLCK, 1, NotSerialized)
- {
- If (LEqual (Arg0, Zero))
- {
- Store (Zero, THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
- Store (Zero, FTT) /* \_SB_.PCI0.LPCB.EC0_.FTT_ */
- }
- Else
- {
- Store (Arg0, DUTY) /* \_SB_.PCI0.LPCB.EC0_.DUTY */
- Store (One, THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
- }
-
- Return (THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
- }
-
- Method (PCLK, 0, NotSerialized)
- {
- Store (PTVL, Local0)
- If (LEqual (Local0, Zero))
- {
- Store (Zero, THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
- Store (Zero, FTT) /* \_SB_.PCI0.LPCB.EC0_.FTT_ */
- }
- Else
- {
- Decrement (Local0)
- Store (Not (Local0), Local1)
- And (Local1, 0x07, Local1)
- Store (Local1, DUTY) /* \_SB_.PCI0.LPCB.EC0_.DUTY */
- Store (One, THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
- }
- }
- }
-
- Device (BAT1)
- {
- Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // \
_HID: Hardware ID
- Name (_UID, One) // _UID: Unique ID
- Name (_PCL, Package (0x01) // _PCL: Power Consumer List
- {
- _SB
- })
- Method (_STA, 0, NotSerialized) // _STA: Status
- {
- If (LAnd (ECOK (), LEqual (ECDY, Zero)))
- {
- If (^^EC0.BAL0)
- {
- Sleep (0x14)
- Return (0x1F)
- }
- Else
- {
- Sleep (0x14)
- Return (0x0F)
- }
- }
- Else
- {
- Sleep (0x14)
- Return (0x1F)
- }
- }
-
- Method (_BIF, 0, NotSerialized) // _BIF: Battery Information
- {
- Name (STAT, Package (0x0D)
- {
- One,
- 0x0FA0,
- 0x0FA0,
- One,
- 0x2B5C,
- 0x01A4,
- 0x9C,
- 0x0108,
- 0x0EC4,
- "PA3465U ",
- "3658Q",
- "Li-Ion",
- "COMPAL "
- })
- If (LAnd (ECOK (), LEqual (ECDY, Zero)))
- {
- Store (^^EC0.BDN0, Local0)
- If (LEqual (Local0, 0x08))
- {
- Store (0xB4, Index (STAT, 0x06))
- Store ("PA3457U ", Index (STAT, 0x09))
- }
-
- If (LEqual (Local0, 0x20))
- {
- Store (0x0102, Index (STAT, 0x06))
- Store ("PA3457U ", Index (STAT, 0x09))
- }
-
- Sleep (0x14)
- Store (^^EC0.BDC0, BFC1) /* \BFC1 */
- Sleep (0x14)
- }
- Else
- {
- Store ("Li-Ion", Index (STAT, 0x0B))
- }
-
- If (BFC1)
- {
- Divide (BFC1, 0x64, Local0, Local1)
- Multiply (Local1, 0x64, Local1)
- Store (Local1, BFC1) /* \BFC1 */
- Store (Local1, Index (STAT, One))
- Store (Local1, Index (STAT, 0x02))
- }
-
- Return (STAT) /* \_SB_.PCI0.LPCB.BAT1._BIF.STAT */
- }
-
- Method (_BST, 0, NotSerialized) // _BST: Battery Status
- {
- Name (PBST, Package (0x04)
- {
- Zero,
- 0xFFFFFFFF,
- 0xFFFFFFFF,
- 0x2B5C
- })
- Store (0x2B5C, Local3)
- If (LAnd (ECOK (), LEqual (ECDY, Zero)))
- {
- Sleep (0x14)
- Store (^^EC0.BST0, BST1) /* \BST1 */
- Sleep (0x14)
- Store (^^EC0.GAU0, BGU1) /* \BGU1 */
- Sleep (0x14)
- }
-
- If (BFC1)
- {
- Multiply (BGU1, BFC1, Local2)
- Divide (Local2, 0x64, Local4, Local2)
- }
- Else
- {
- Multiply (BGU1, 0x28, Local2)
- }
-
- Store (BST1, Index (PBST, Zero))
- Store (Zero, Index (PBST, One))
- Store (Local2, Index (PBST, 0x02))
- Store (Local3, Index (PBST, 0x03))
- If (LGreater (ECDY, Zero))
- {
- Decrement (ECDY)
- If (LEqual (ECDY, Zero))
- {
- Notify (BAT1, 0x80) // Status Change
- }
- }
-
- Return (PBST) /* \_SB_.PCI0.LPCB.BAT1._BST.PBST */
- }
- }
-
- Device (PS2K)
- {
- Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard \
(101/102-key, PS/2 Mouse) */) // _HID: Hardware ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings
- {
- IO (Decode16,
- 0x0060, // Range Minimum
- 0x0060, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- IO (Decode16,
- 0x0064, // Range Minimum
- 0x0064, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- IRQ (Edge, ActiveHigh, Exclusive, )
- {1}
- })
- }
-
- Device (PS2M)
- {
- Name (_HID, EisaId ("PNP0F13")) // _HID: Hardware ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings
- {
- IRQ (Edge, ActiveHigh, Exclusive, )
- {12}
- })
- }
- }
-
- Device (PATA)
- {
- Name (_ADR, 0x001F0001) // _ADR: Address
- OperationRegion (PACS, PCI_Config, 0x40, 0xC0)
- Field (PACS, DWordAcc, NoLock, Preserve)
- {
- PRIT, 16,
- Offset (0x04),
- PSIT, 4,
- Offset (0x08),
- SYNC, 4,
- Offset (0x0A),
- SDT0, 2,
- , 2,
- SDT1, 2,
- Offset (0x14),
- ICR0, 4,
- ICR1, 4,
- ICR2, 4,
- ICR3, 4,
- ICR4, 4,
- ICR5, 4
- }
-
- Device (PRID)
- {
- Name (_ADR, Zero) // _ADR: Address
- Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode
- {
- Name (PBUF, Buffer (0x14)
- {
- /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \
0x00,
- /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \
0x00,
- /* 0010 */ 0x00, 0x00, 0x00, 0x00
- })
- CreateDWordField (PBUF, Zero, PIO0)
- CreateDWordField (PBUF, 0x04, DMA0)
- CreateDWordField (PBUF, 0x08, PIO1)
- CreateDWordField (PBUF, 0x0C, DMA1)
- CreateDWordField (PBUF, 0x10, FLAG)
- Store (GETP (PRIT), PIO0) /* \_SB_.PCI0.PATA.PRID._GTM.PIO0 \
*/
- Store (GDMA (And (SYNC, One), And (ICR3, One),
- And (ICR0, One), SDT0, And (ICR1, One)), DMA0) /* \
\_SB_.PCI0.PATA.PRID._GTM.DMA0 */
- If (LEqual (DMA0, 0xFFFFFFFF))
- {
- Store (PIO0, DMA0) /* \_SB_.PCI0.PATA.PRID._GTM.DMA0 */
- }
-
- If (And (PRIT, 0x4000))
- {
- If (LEqual (And (PRIT, 0x90), 0x80))
- {
- Store (0x0384, PIO1) /* \
\_SB_.PCI0.PATA.PRID._GTM.PIO1 */
- }
- Else
- {
- Store (GETT (PSIT), PIO1) /* \
\_SB_.PCI0.PATA.PRID._GTM.PIO1 */
- }
- }
- Else
- {
- Store (0xFFFFFFFF, PIO1) /* \
\_SB_.PCI0.PATA.PRID._GTM.PIO1 */
- }
-
- Store (GDMA (And (SYNC, 0x02), And (ICR3, 0x02),
- And (ICR0, 0x02), SDT1, And (ICR1, 0x02)), DMA1) /* \
\_SB_.PCI0.PATA.PRID._GTM.DMA1 */
- If (LEqual (DMA1, 0xFFFFFFFF))
- {
- Store (PIO1, DMA1) /* \_SB_.PCI0.PATA.PRID._GTM.DMA1 */
- }
-
- Store (GETF (And (SYNC, One), And (SYNC, 0x02),
- PRIT), FLAG) /* \_SB_.PCI0.PATA.PRID._GTM.FLAG */
- If (And (LEqual (PIO0, 0xFFFFFFFF), LEqual (DMA0, \
0xFFFFFFFF)))
- {
- Store (0x78, PIO0) /* \_SB_.PCI0.PATA.PRID._GTM.PIO0 */
- Store (0x14, DMA0) /* \_SB_.PCI0.PATA.PRID._GTM.DMA0 */
- Store (0x03, FLAG) /* \_SB_.PCI0.PATA.PRID._GTM.FLAG */
- }
-
- Return (PBUF) /* \_SB_.PCI0.PATA.PRID._GTM.PBUF */
- }
-
- Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode
- {
- CreateDWordField (Arg0, Zero, PIO0)
- CreateDWordField (Arg0, 0x04, DMA0)
- CreateDWordField (Arg0, 0x08, PIO1)
- CreateDWordField (Arg0, 0x0C, DMA1)
- CreateDWordField (Arg0, 0x10, FLAG)
- If (LEqual (SizeOf (Arg1), 0x0200))
- {
- And (PRIT, 0xC0F0, PRIT) /* \_SB_.PCI0.PATA.PRIT */
- And (SYNC, 0x02, SYNC) /* \_SB_.PCI0.PATA.SYNC */
- Store (Zero, SDT0) /* \_SB_.PCI0.PATA.SDT0 */
- And (ICR0, 0x02, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
- And (ICR1, 0x02, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
- And (ICR3, 0x02, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
- And (ICR5, 0x02, ICR5) /* \_SB_.PCI0.PATA.ICR5 */
- CreateWordField (Arg1, 0x62, W490)
- CreateWordField (Arg1, 0x6A, W530)
- CreateWordField (Arg1, 0x7E, W630)
- CreateWordField (Arg1, 0x80, W640)
- CreateWordField (Arg1, 0xB0, W880)
- CreateWordField (Arg1, 0xBA, W930)
- Or (PRIT, 0x8004, PRIT) /* \_SB_.PCI0.PATA.PRIT */
- If (LAnd (And (FLAG, 0x02), And (W490, 0x0800)))
- {
- Or (PRIT, 0x02, PRIT) /* \_SB_.PCI0.PATA.PRIT */
- }
-
- Or (PRIT, SETP (PIO0, W530, W640), PRIT) /* \
\_SB_.PCI0.PATA.PRIT */
- If (And (FLAG, One))
- {
- Or (SYNC, One, SYNC) /* \_SB_.PCI0.PATA.SYNC */
- Store (SDMA (DMA0), SDT0) /* \_SB_.PCI0.PATA.SDT0 */
- If (LLess (DMA0, 0x1E))
- {
- Or (ICR3, One, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
- }
-
- If (LLess (DMA0, 0x3C))
- {
- Or (ICR0, One, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
- }
-
- If (And (W930, 0x2000))
- {
- Or (ICR1, One, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
- }
- }
- }
-
- If (LEqual (SizeOf (Arg2), 0x0200))
- {
- And (PRIT, 0xBF0F, PRIT) /* \_SB_.PCI0.PATA.PRIT */
- Store (Zero, PSIT) /* \_SB_.PCI0.PATA.PSIT */
- And (SYNC, One, SYNC) /* \_SB_.PCI0.PATA.SYNC */
- Store (Zero, SDT1) /* \_SB_.PCI0.PATA.SDT1 */
- And (ICR0, One, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
- And (ICR1, One, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
- And (ICR3, One, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
- And (ICR5, One, ICR5) /* \_SB_.PCI0.PATA.ICR5 */
- CreateWordField (Arg2, 0x62, W491)
- CreateWordField (Arg2, 0x6A, W531)
- CreateWordField (Arg2, 0x7E, W631)
- CreateWordField (Arg2, 0x80, W641)
- CreateWordField (Arg2, 0xB0, W881)
- CreateWordField (Arg2, 0xBA, W931)
- Or (PRIT, 0x8040, PRIT) /* \_SB_.PCI0.PATA.PRIT */
- If (LAnd (And (FLAG, 0x08), And (W491, 0x0800)))
- {
- Or (PRIT, 0x20, PRIT) /* \_SB_.PCI0.PATA.PRIT */
- }
-
- If (And (FLAG, 0x10))
- {
- Or (PRIT, 0x4000, PRIT) /* \_SB_.PCI0.PATA.PRIT */
- If (LGreater (PIO1, 0xF0))
- {
- Or (PRIT, 0x80, PRIT) /* \_SB_.PCI0.PATA.PRIT */
- }
- Else
- {
- Or (PRIT, 0x10, PRIT) /* \_SB_.PCI0.PATA.PRIT */
- Store (SETT (PIO1, W531, W641), PSIT) /* \
\_SB_.PCI0.PATA.PSIT */
- }
- }
-
- If (And (FLAG, 0x04))
- {
- Or (SYNC, 0x02, SYNC) /* \_SB_.PCI0.PATA.SYNC */
- Store (SDMA (DMA1), SDT1) /* \_SB_.PCI0.PATA.SDT1 */
- If (LLess (DMA1, 0x1E))
- {
- Or (ICR3, 0x02, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
- }
-
- If (LLess (DMA1, 0x3C))
- {
- Or (ICR0, 0x02, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
- }
-
- If (And (W931, 0x2000))
- {
- Or (ICR1, 0x02, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
- }
- }
- }
- }
-
- Device (P_D0)
- {
- Name (_ADR, Zero) // _ADR: Address
- Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
- {
- Name (PIB0, Buffer (0x0E)
- {
- /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, \
0xEF, 0x03,
- /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF
- })
- CreateByteField (PIB0, One, PMD0)
- CreateByteField (PIB0, 0x08, DMD0)
- If (And (PRIT, 0x02))
- {
- If (LEqual (And (PRIT, 0x09), 0x08))
- {
- Store (0x08, PMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */
- }
- Else
- {
- Store (0x0A, PMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */
- ShiftRight (And (PRIT, 0x0300), 0x08, Local0)
- ShiftRight (And (PRIT, 0x3000), 0x0C, Local1)
- Add (Local0, Local1, Local2)
- If (LEqual (0x03, Local2))
- {
- Store (0x0B, PMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */
- }
-
- If (LEqual (0x05, Local2))
- {
- Store (0x0C, PMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */
- }
- }
- }
- Else
- {
- Store (One, PMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */
- }
-
- If (And (SYNC, One))
- {
- Store (Or (SDT0, 0x40), DMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */
- If (And (ICR1, One))
- {
- If (And (ICR0, One))
- {
- Add (DMD0, 0x02, DMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */
- }
-
- If (And (ICR3, One))
- {
- Store (0x45, DMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */
- }
- }
- }
- Else
- {
- Or (Subtract (And (PMD0, 0x07), 0x02), 0x20, DMD0) \
/* \_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */
- }
-
- Return (PIB0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.PIB0 */
- }
- }
-
- Device (P_D1)
- {
- Name (_ADR, One) // _ADR: Address
- Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
- {
- Name (PIB1, Buffer (0x0E)
- {
- /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, \
0xEF, 0x03,
- /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF
- })
- CreateByteField (PIB1, One, PMD1)
- CreateByteField (PIB1, 0x08, DMD1)
- If (And (PRIT, 0x20))
- {
- If (LEqual (And (PRIT, 0x90), 0x80))
- {
- Store (0x08, PMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */
- }
- Else
- {
- Add (And (PSIT, 0x03), ShiftRight (And (PSIT, \
0x0C),
- 0x02), Local0)
- If (LEqual (0x05, Local0))
- {
- Store (0x0C, PMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */
- }
- Else
- {
- If (LEqual (0x03, Local0))
- {
- Store (0x0B, PMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */
- }
- Else
- {
- Store (0x0A, PMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */
- }
- }
- }
- }
- Else
- {
- Store (One, PMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */
- }
-
- If (And (SYNC, 0x02))
- {
- Store (Or (SDT1, 0x40), DMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */
- If (And (ICR1, 0x02))
- {
- If (And (ICR0, 0x02))
- {
- Add (DMD1, 0x02, DMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */
- }
-
- If (And (ICR3, 0x02))
- {
- Store (0x45, DMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */
- }
- }
- }
- Else
- {
- Or (Subtract (And (PMD1, 0x07), 0x02), 0x20, DMD1) \
/* \_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */
- }
-
- Return (PIB1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.PIB1 */
- }
- }
- }
- }
-
- Device (SATA)
- {
- Name (_ADR, 0x001F0002) // _ADR: Address
- OperationRegion (SACS, PCI_Config, 0x40, 0xC0)
- Field (SACS, DWordAcc, NoLock, Preserve)
- {
- PRIT, 16,
- SECT, 16,
- PSIT, 4,
- SSIT, 4,
- Offset (0x08),
- SYNC, 4,
- Offset (0x0A),
- SDT0, 2,
- , 2,
- SDT1, 2,
- Offset (0x0B),
- SDT2, 2,
- , 2,
- SDT3, 2,
- Offset (0x14),
- ICR0, 4,
- ICR1, 4,
- ICR2, 4,
- ICR3, 4,
- ICR4, 4,
- ICR5, 4,
- Offset (0x50),
- MAPV, 2
- }
- }
-
- Device (SBUS)
- {
- Name (_ADR, 0x001F0003) // _ADR: Address
- OperationRegion (SMBP, PCI_Config, 0x40, 0xC0)
- Field (SMBP, DWordAcc, NoLock, Preserve)
- {
- , 2,
- I2CE, 1
- }
-
- OperationRegion (SMBI, SystemIO, 0x1C20, 0x10)
- Field (SMBI, ByteAcc, NoLock, Preserve)
- {
- HSTS, 8,
- Offset (0x02),
- HCON, 8,
- HCOM, 8,
- TXSA, 8,
- DAT0, 8,
- DAT1, 8,
- HBDR, 8,
- PECR, 8,
- RXSA, 8,
- SDAT, 16
- }
-
- Method (SSXB, 2, Serialized)
- {
- If (STRT ())
- {
- Return (Zero)
- }
-
- Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
- Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
- Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
- Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
- If (COMP ())
- {
- Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Return (One)
- }
-
- Return (Zero)
- }
-
- Method (SRXB, 1, Serialized)
- {
- If (STRT ())
- {
- Return (0xFFFF)
- }
-
- Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
- Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
- Store (0x44, HCON) /* \_SB_.PCI0.SBUS.HCON */
- If (COMP ())
- {
- Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
- }
-
- Return (0xFFFF)
- }
-
- Method (SWRB, 3, Serialized)
- {
- If (STRT ())
- {
- Return (Zero)
- }
-
- Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
- Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
- Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
- Store (Arg2, DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
- Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
- If (COMP ())
- {
- Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Return (One)
- }
-
- Return (Zero)
- }
-
- Method (SRDB, 2, Serialized)
- {
- If (STRT ())
- {
- Return (0xFFFF)
- }
-
- Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
- Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
- Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
- Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
- If (COMP ())
- {
- Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
- }
-
- Return (0xFFFF)
- }
-
- Method (SWRW, 3, Serialized)
- {
- If (STRT ())
- {
- Return (Zero)
- }
-
- Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
- Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
- Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
- And (Arg2, 0xFF, DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
- And (ShiftRight (Arg2, 0x08), 0xFF, DAT1) /* \
\_SB_.PCI0.SBUS.DAT1 */
- Store (0x4C, HCON) /* \_SB_.PCI0.SBUS.HCON */
- If (COMP ())
- {
- Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Return (One)
- }
-
- Return (Zero)
- }
-
- Method (SRDW, 2, Serialized)
- {
- If (STRT ())
- {
- Return (0xFFFF)
- }
-
- Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
- Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
- Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
- Store (0x4C, HCON) /* \_SB_.PCI0.SBUS.HCON */
- If (COMP ())
- {
- Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Return (Or (ShiftLeft (DAT1, 0x08), DAT0))
- }
-
- Return (0xFFFFFFFF)
- }
-
- Method (SBLW, 4, Serialized)
- {
- If (STRT ())
- {
- Return (Zero)
- }
-
- Store (Arg3, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
- Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
- Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
- Store (SizeOf (Arg2), DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
- Store (Zero, Local1)
- Store (DerefOf (Index (Arg2, Zero)), HBDR) /* \
\_SB_.PCI0.SBUS.HBDR */
- Store (0x54, HCON) /* \_SB_.PCI0.SBUS.HCON */
- While (LGreater (SizeOf (Arg2), Local1))
- {
- Store (0x0FA0, Local0)
- While (LAnd (LNot (And (HSTS, 0x80)), Local0))
- {
- Decrement (Local0)
- Stall (0x32)
- }
-
- If (LNot (Local0))
- {
- KILL ()
- Return (Zero)
- }
-
- Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Increment (Local1)
- If (LGreater (SizeOf (Arg2), Local1))
- {
- Store (DerefOf (Index (Arg2, Local1)), HBDR) /* \
\_SB_.PCI0.SBUS.HBDR */
- }
- }
-
- If (COMP ())
- {
- Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Return (One)
- }
-
- Return (Zero)
- }
-
- Method (SBLR, 3, Serialized)
- {
- Name (TBUF, Buffer (0x0100) {})
- If (STRT ())
- {
- Return (Zero)
- }
-
- Store (Arg2, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
- Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
- Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
- Store (0x54, HCON) /* \_SB_.PCI0.SBUS.HCON */
- Store (0x0FA0, Local0)
- While (LAnd (LNot (And (HSTS, 0x80)), Local0))
- {
- Decrement (Local0)
- Stall (0x32)
- }
-
- If (LNot (Local0))
- {
- KILL ()
- Return (Zero)
- }
-
- Store (DAT0, Index (TBUF, Zero))
- Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Store (One, Local1)
- While (LLess (Local1, DerefOf (Index (TBUF, Zero))))
- {
- Store (0x0FA0, Local0)
- While (LAnd (LNot (And (HSTS, 0x80)), Local0))
- {
- Decrement (Local0)
- Stall (0x32)
- }
-
- If (LNot (Local0))
- {
- KILL ()
- Return (Zero)
- }
-
- Store (HBDR, Index (TBUF, Local1))
- Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Increment (Local1)
- }
-
- If (COMP ())
- {
- Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- Return (TBUF) /* \_SB_.PCI0.SBUS.SBLR.TBUF */
- }
-
- Return (Zero)
- }
-
- Method (STRT, 0, Serialized)
- {
- Store (0xC8, Local0)
- While (Local0)
- {
- If (And (HSTS, 0x40))
- {
- Decrement (Local0)
- Sleep (One)
- If (LEqual (Local0, Zero))
- {
- Return (One)
- }
- }
- Else
- {
- Store (Zero, Local0)
- }
- }
-
- Store (0x0FA0, Local0)
- While (Local0)
- {
- If (And (HSTS, One))
- {
- Decrement (Local0)
- Stall (0x32)
- If (LEqual (Local0, Zero))
- {
- KILL ()
- }
- }
- Else
- {
- Return (Zero)
- }
- }
-
- Return (One)
- }
-
- Method (COMP, 0, Serialized)
- {
- Store (0x0FA0, Local0)
- While (Local0)
- {
- If (And (HSTS, 0x02))
- {
- Return (One)
- }
- Else
- {
- Decrement (Local0)
- Stall (0x32)
- If (LEqual (Local0, Zero))
- {
- KILL ()
- }
- }
- }
-
- Return (Zero)
- }
-
- Method (KILL, 0, Serialized)
- {
- Or (HCON, 0x02, HCON) /* \_SB_.PCI0.SBUS.HCON */
- Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
- }
- }
- }
- }
-}
-
diff --git a/fwts-test/disassemble-0001/DSDT0.dsl.original \
b/fwts-test/disassemble-0001/DSDT0.dsl.original new file mode 100644
index 0000000..7598477
--- /dev/null
+++ b/fwts-test/disassemble-0001/DSDT0.dsl.original
@@ -0,0 +1,6636 @@
+/*
+ * Intel ACPI Component Architecture
+ * AML Disassembler version 20140325-64 [May 29 2014]
+ * Copyright (c) 2000 - 2014 Intel Corporation
+ *
+ * Disassembly of /tmp/fwts_tmp_table_16317_DSDT_0.dsl, Thu May 29 08:43:23 2014
+ *
+ * Original Table Header:
+ * Signature "DSDT"
+ * Length 0x00005FF4 (24564)
+ * Revision 0x02
+ * Checksum 0x11
+ * OEM ID "TOSCPL"
+ * OEM Table ID "CRESTLNE"
+ * OEM Revision 0x06040000 (100925440)
+ * Compiler ID "INTL"
+ * Compiler Version 0x20060608 (537265672)
+ */
+DefinitionBlock ("/tmp/fwts_tmp_table_16317_DSDT_0.aml", "DSDT", 2, "TOSCPL", \
"CRESTLNE", 0x06040000) +{
+
+ External (_PR_.CPU0._PPC, UnknownObj)
+ External (CFGD, IntObj)
+ External (PDC0, IntObj)
+ External (PDC1, IntObj)
+
+ Name (Z000, One)
+ Name (Z001, 0x02)
+ Name (Z002, 0x04)
+ Name (Z003, 0x08)
+ Name (Z004, Zero)
+ Name (Z005, 0x0F)
+ Name (Z006, 0x0D)
+ Name (Z007, 0x0B)
+ Name (Z008, 0x09)
+ Name (ECDY, 0x07)
+ Mutex (MUTX, 0x00)
+ OperationRegion (PRT0, SystemIO, 0x80, 0x04)
+ Field (PRT0, DWordAcc, Lock, Preserve)
+ {
+ P80H, 32
+ }
+
+ Method (P8XH, 2, Serialized)
+ {
+ If (LEqual (Arg0, Zero))
+ {
+ Store (Or (And (P80D, 0xFFFFFF00), Arg1), P80D) /* \P80D */
+ }
+
+ If (LEqual (Arg0, One))
+ {
+ Store (Or (And (P80D, 0xFFFF00FF), ShiftLeft (Arg1, 0x08)
+ ), P80D) /* \P80D */
+ }
+
+ If (LEqual (Arg0, 0x02))
+ {
+ Store (Or (And (P80D, 0xFF00FFFF), ShiftLeft (Arg1, 0x10)
+ ), P80D) /* \P80D */
+ }
+
+ If (LEqual (Arg0, 0x03))
+ {
+ Store (Or (And (P80D, 0x00FFFFFF), ShiftLeft (Arg1, 0x18)
+ ), P80D) /* \P80D */
+ }
+
+ Store (P80D, P80H) /* \P80H */
+ }
+
+ Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model
+ {
+ Store (Arg0, GPIC) /* \GPIC */
+ }
+
+ Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep
+ {
+ Store (Zero, P80D) /* \P80D */
+ P8XH (Zero, Arg0)
+ If (LEqual (Arg0, 0x03))
+ {
+ Store (One, \_SB.PCI0.LPCB.EC0.S3LD)
+ }
+
+ If (LEqual (Arg0, 0x04))
+ {
+ Store (One, \_SB.PCI0.LPCB.EC0.S3LD)
+ \_SB.PCI0.LPCB.PHSS (0x0E)
+ }
+ }
+
+ Method (_WAK, 1, NotSerialized) // _WAK: Wake
+ {
+ P8XH (One, 0xAB)
+ If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))
+ {
+ If (And (CFGD, 0x01000000))
+ {
+ If (LAnd (And (CFGD, 0xF0), LEqual (OSYS, 0x07D1)))
+ {
+ TRAP (0x3D)
+ }
+ }
+ }
+
+ If (LEqual (RP1D, Zero))
+ {
+ Notify (\_SB.PCI0.RP01, Zero) // Bus Check
+ }
+
+ If (LEqual (RP2D, Zero))
+ {
+ Notify (\_SB.PCI0.RP02, Zero) // Bus Check
+ }
+
+ If (LEqual (RP3D, Zero))
+ {
+ Notify (\_SB.PCI0.RP03, Zero) // Bus Check
+ }
+
+ If (LEqual (RP4D, Zero))
+ {
+ Notify (\_SB.PCI0.RP04, Zero) // Bus Check
+ }
+
+ If (LEqual (RP5D, Zero))
+ {
+ Notify (\_SB.PCI0.RP05, Zero) // Bus Check
+ }
+
+ If (LEqual (RP6D, Zero))
+ {
+ Notify (\_SB.PCI0.RP06, Zero) // Bus Check
+ }
+
+ If (LEqual (Arg0, 0x03))
+ {
+ P8XH (Zero, 0x30)
+ TRAP (0x46)
+ }
+
+ If (LEqual (Arg0, 0x04))
+ {
+ P8XH (Zero, 0x40)
+ \_SB.PCI0.LPCB.PHSS (0x0F)
+ Store (WAKF, Local0)
+ Store (Zero, WAKF) /* \WAKF */
+ And (Local0, 0x05, Local0)
+ If (LEqual (Local0, One))
+ {
+ P8XH (Zero, 0x41)
+ Notify (\_SB.PWRB, 0x02) // Device Wake
+ }
+
+ If (DTSE)
+ {
+ TRAP (0x47)
+ If (LAnd (\_SB.PCI0.LPCB.ECOK (), LEqual (ECDY, Zero)))
+ {
+ If (LGreaterEqual (DTS1, DTS2))
+ {
+ Store (DTS1, \_SB.PCI0.LPCB.EC0.SKTA)
+ }
+ Else
+ {
+ Store (DTS2, \_SB.PCI0.LPCB.EC0.SKTA)
+ }
+ }
+ Else
+ {
+ \_SB.PCI0.LPCB.PHSS (0x10)
+ }
+ }
+ }
+
+ \_PR.RPPC ()
+ Return (Package (0x02)
+ {
+ Zero,
+ Zero
+ })
+ }
+
+ Method (GETB, 3, Serialized)
+ {
+ Multiply (Arg0, 0x08, Local0)
+ Multiply (Arg1, 0x08, Local1)
+ CreateField (Arg2, Local0, Local1, TBF3)
+ Return (TBF3) /* \GETB.TBF3 */
+ }
+
+ Method (PNOT, 0, Serialized)
+ {
+ If (MPEN)
+ {
+ If (And (PDC0, 0x08))
+ {
+ Notify (\_PR.CPU0, 0x80) // Performance Capability Change
+ If (And (PDC0, 0x10))
+ {
+ Sleep (0x64)
+ Notify (\_PR.CPU0, 0x81) // C-State Change
+ }
+ }
+
+ If (And (PDC1, 0x08))
+ {
+ Notify (\_PR.CPU1, 0x80) // Performance Capability Change
+ If (And (PDC1, 0x10))
+ {
+ Sleep (0x64)
+ Notify (\_PR.CPU1, 0x81) // C-State Change
+ }
+ }
+ }
+ Else
+ {
+ Notify (\_PR.CPU0, 0x80) // Performance Capability Change
+ Sleep (0x64)
+ Notify (\_PR.CPU0, 0x81) // C-State Change
+ }
+ }
+
+ Method (TRAP, 1, Serialized)
+ {
+ Store (Arg0, SMIF) /* \SMIF */
+ Store (Zero, TRP0) /* \TRP0 */
+ Return (SMIF) /* \SMIF */
+ }
+
+ Scope (_SB)
+ {
+ Method (_INI, 0, NotSerialized) // _INI: Initialize
+ {
+ Store (0x9999, MARK) /* \MARK */
+ If (DTSE)
+ {
+ TRAP (0x47)
+ ^PCI0.LPCB.PHSS (0x10)
+ }
+
+ Store (0x07D0, OSYS) /* \OSYS */
+ If (CondRefOf (_OSI, Local0))
+ {
+ If (_OSI ("Linux"))
+ {
+ Store (One, LINX) /* \LINX */
+ Store (Zero, ECDY) /* \ECDY */
+ }
+
+ If (_OSI ("Windows 2001"))
+ {
+ Store (0x07D1, OSYS) /* \OSYS */
+ }
+
+ If (_OSI ("Windows 2001 SP1"))
+ {
+ Store (0x07D1, OSYS) /* \OSYS */
+ }
+
+ If (_OSI ("Windows 2001 SP2"))
+ {
+ Store (0x07D2, OSYS) /* \OSYS */
+ }
+
+ If (_OSI ("Windows 2006"))
+ {
+ Store (0x07D6, OSYS) /* \OSYS */
+ }
+ }
+
+ If (LAnd (MPEN, LEqual (OSYS, 0x07D1)))
+ {
+ TRAP (0x3D)
+ }
+
+ TRAP (0x2B)
+ }
+ }
+
+ OperationRegion (GNVS, SystemMemory, 0xBF6E2DBC, 0x0100)
+ Field (GNVS, AnyAcc, Lock, Preserve)
+ {
+ OSYS, 16,
+ SMIF, 8,
+ PRM0, 8,
+ PRM1, 8,
+ SCIF, 8,
+ PRM2, 8,
+ PRM3, 8,
+ LCKF, 8,
+ PRM4, 8,
+ PRM5, 8,
+ P80D, 32,
+ LIDS, 8,
+ PWRS, 8,
+ DBGS, 8,
+ LINX, 8,
+ Offset (0x14),
+ ACT1, 8,
+ ACTT, 8,
+ PSVT, 8,
+ TC1V, 8,
+ TC2V, 8,
+ TSPV, 8,
+ CRTT, 8,
+ DTSE, 8,
+ DTS1, 8,
+ DTS2, 8,
+ Offset (0x28),
+ APIC, 8,
+ MPEN, 8,
+ PCP0, 8,
+ PCP1, 8,
+ PPCM, 8,
+ Offset (0x32),
+ CMAP, 8,
+ CMBP, 8,
+ LPTP, 8,
+ FDCP, 8,
+ Offset (0x3C),
+ IGDS, 8,
+ TLST, 8,
+ CADL, 8,
+ PADL, 8,
+ CSTE, 16,
+ NSTE, 16,
+ SSTE, 16,
+ NDID, 8,
+ DID1, 32,
+ DID2, 32,
+ DID3, 32,
+ DID4, 32,
+ DID5, 32,
+ Offset (0x67),
+ BLCS, 8,
+ BRTL, 8,
+ ALSE, 8,
+ ALAF, 8,
+ LLOW, 8,
+ LHIH, 8,
+ Offset (0x6E),
+ EMAE, 8,
+ EMAP, 16,
+ EMAL, 16,
+ Offset (0x74),
+ MEFE, 8,
+ Offset (0x78),
+ TPMP, 8,
+ TPME, 8,
+ Offset (0x82),
+ GTF0, 56,
+ GTF2, 56,
+ IDEM, 8,
+ GTF1, 56,
+ Offset (0xAA),
+ ASLB, 32,
+ IBTT, 8,
+ IPAT, 8,
+ ITVF, 8,
+ ITVM, 8,
+ IPSC, 8,
+ IBLC, 8,
+ IBIA, 8,
+ ISSC, 8,
+ I409, 8,
+ I509, 8,
+ I609, 8,
+ I709, 8,
+ IDMM, 8,
+ IDMS, 8,
+ IF1E, 8,
+ HVCO, 8,
+ NXD1, 32,
+ NXD2, 32,
+ MARK, 16,
+ BRAD, 8,
+ BTEN, 8,
+ VVEN, 8,
+ BGTL, 8,
+ TMEE, 1,
+ Offset (0xCD),
+ SCU0, 1,
+ SCU1, 1,
+ SCU2, 1,
+ SCU3, 1,
+ Offset (0xCE),
+ XKSP, 1,
+ XKIN, 1,
+ XKID, 1,
+ XKOK, 1,
+ Offset (0xCF),
+ BGU1, 8,
+ BST1, 8,
+ BFC1, 16,
+ WKLN, 8,
+ WAKF, 8,
+ DSMD, 8,
+ BAYS, 8,
+ HAPE, 1,
+ Offset (0xD8),
+ DTSM, 1,
+ Offset (0xD9),
+ ODT1, 8,
+ ODT2, 8,
+ DTSW, 8
+ }
+
+ Name (DSEN, One)
+ Name (ECON, Zero)
+ Name (GPIC, Zero)
+ Name (CTYP, Zero)
+ Name (L01C, Zero)
+ Name (VFN0, Zero)
+ Name (VFN1, Zero)
+ Scope (_GPE)
+ {
+ Method (_L01, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ Add (L01C, One, L01C) /* \L01C */
+ P8XH (Zero, One)
+ P8XH (One, L01C)
+ If (LAnd (LEqual (RP1D, Zero), \_SB.PCI0.RP01.HPSX))
+ {
+ Sleep (0x64)
+ If (\_SB.PCI0.RP01.PDCX)
+ {
+ Store (One, \_SB.PCI0.RP01.PDCX)
+ Store (One, \_SB.PCI0.RP01.HPSX)
+ Notify (\_SB.PCI0.RP01, Zero) // Bus Check
+ }
+ Else
+ {
+ Store (One, \_SB.PCI0.RP01.HPSX)
+ }
+ }
+
+ If (LAnd (LEqual (RP2D, Zero), \_SB.PCI0.RP02.HPSX))
+ {
+ Sleep (0x64)
+ If (\_SB.PCI0.RP02.PDCX)
+ {
+ Store (One, \_SB.PCI0.RP02.PDCX)
+ Store (One, \_SB.PCI0.RP02.HPSX)
+ Notify (\_SB.PCI0.RP02, Zero) // Bus Check
+ }
+ Else
+ {
+ Store (One, \_SB.PCI0.RP02.HPSX)
+ }
+ }
+
+ If (LAnd (LEqual (RP3D, Zero), \_SB.PCI0.RP03.HPSX))
+ {
+ Sleep (0x64)
+ If (\_SB.PCI0.RP03.PDCX)
+ {
+ Store (One, \_SB.PCI0.RP03.PDCX)
+ Store (One, \_SB.PCI0.RP03.HPSX)
+ Notify (\_SB.PCI0.RP03, Zero) // Bus Check
+ }
+ Else
+ {
+ Store (One, \_SB.PCI0.RP03.HPSX)
+ }
+ }
+
+ If (LAnd (LEqual (RP4D, Zero), \_SB.PCI0.RP04.HPSX))
+ {
+ Sleep (0x64)
+ If (\_SB.PCI0.RP04.PDCX)
+ {
+ Store (One, \_SB.PCI0.RP04.PDCX)
+ Store (One, \_SB.PCI0.RP04.HPSX)
+ Notify (\_SB.PCI0.RP04, Zero) // Bus Check
+ }
+ Else
+ {
+ Store (One, \_SB.PCI0.RP04.HPSX)
+ }
+ }
+
+ If (LAnd (LEqual (RP5D, Zero), \_SB.PCI0.RP05.HPSX))
+ {
+ Sleep (0x64)
+ If (\_SB.PCI0.RP05.PDCX)
+ {
+ Store (One, \_SB.PCI0.RP05.PDCX)
+ Store (One, \_SB.PCI0.RP05.HPSX)
+ Notify (\_SB.PCI0.RP05, Zero) // Bus Check
+ }
+ Else
+ {
+ Store (One, \_SB.PCI0.RP05.HPSX)
+ }
+ }
+
+ If (LAnd (LEqual (RP6D, Zero), \_SB.PCI0.RP06.HPSX))
+ {
+ Sleep (0x64)
+ If (\_SB.PCI0.RP06.PDCX)
+ {
+ Store (One, \_SB.PCI0.RP06.PDCX)
+ Store (One, \_SB.PCI0.RP06.HPSX)
+ Notify (\_SB.PCI0.RP06, Zero) // Bus Check
+ }
+ Else
+ {
+ Store (One, \_SB.PCI0.RP06.HPSX)
+ }
+ }
+ }
+
+ Method (_L02, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ Store (Zero, GPEC) /* \GPEC */
+ If (\_SB.PCI0.LPCB.ECOK ())
+ {
+ If (LEqual (DTSW, One))
+ {
+ If (LGreaterEqual (DTS1, DTS2))
+ {
+ Store (DTS1, \_SB.PCI0.LPCB.EC0.SKTA)
+ }
+ Else
+ {
+ Store (DTS2, \_SB.PCI0.LPCB.EC0.SKTA)
+ }
+ }
+ Else
+ {
+ If (LGreaterEqual (ODT1, ODT2))
+ {
+ Store (ODT1, \_SB.PCI0.LPCB.EC0.SKTA)
+ }
+ Else
+ {
+ Store (ODT2, \_SB.PCI0.LPCB.EC0.SKTA)
+ }
+ }
+ }
+ Else
+ {
+ \_SB.PCI0.LPCB.PHSS (0x10)
+ }
+ }
+
+ Method (_L03, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ Notify (\_SB.PCI0.USB1, 0x02) // Device Wake
+ }
+
+ Method (_L04, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ Notify (\_SB.PCI0.USB2, 0x02) // Device Wake
+ }
+
+ Method (_L05, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ Notify (\_SB.PCI0.USB5, 0x02) // Device Wake
+ }
+
+ Method (_L06, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ If (\_SB.PCI0.GFX0.GSSE)
+ {
+ \_SB.PCI0.GFX0.GSCI ()
+ }
+ Else
+ {
+ Store (One, SCIS) /* \SCIS */
+ }
+ }
+
+ Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ If (\_SB.PCI0.RP01.PSPX)
+ {
+ Store (One, \_SB.PCI0.RP01.PSPX)
+ Store (One, \_SB.PCI0.RP01.PMSX)
+ Notify (\_SB.PCI0.RP01, 0x02) // Device Wake
+ }
+
+ If (\_SB.PCI0.RP02.PSPX)
+ {
+ Store (One, \_SB.PCI0.RP02.PSPX)
+ Store (One, \_SB.PCI0.RP02.PMSX)
+ Notify (\_SB.PCI0.RP02, 0x02) // Device Wake
+ }
+
+ If (\_SB.PCI0.RP03.PSPX)
+ {
+ Store (One, \_SB.PCI0.RP03.PSPX)
+ Store (One, \_SB.PCI0.RP03.PMSX)
+ Notify (\_SB.PCI0.RP03, 0x02) // Device Wake
+ }
+
+ If (\_SB.PCI0.RP04.PSPX)
+ {
+ Store (One, \_SB.PCI0.RP04.PSPX)
+ Store (One, \_SB.PCI0.RP04.PMSX)
+ Notify (\_SB.PCI0.RP04, 0x02) // Device Wake
+ }
+
+ If (\_SB.PCI0.RP05.PSPX)
+ {
+ Store (One, \_SB.PCI0.RP05.PSPX)
+ Store (One, \_SB.PCI0.RP05.PMSX)
+ Notify (\_SB.PCI0.RP05, 0x02) // Device Wake
+ }
+
+ If (\_SB.PCI0.RP06.PSPX)
+ {
+ Store (One, \_SB.PCI0.RP06.PSPX)
+ Store (One, \_SB.PCI0.RP06.PMSX)
+ Notify (\_SB.PCI0.RP06, 0x02) // Device Wake
+ }
+ }
+
+ Method (_L0B, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ Notify (\_SB.PCI0.PCIB, 0x02) // Device Wake
+ }
+
+ Method (_L0C, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ Notify (\_SB.PCI0.USB3, 0x02) // Device Wake
+ }
+
+ Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ If (\_SB.PCI0.EHC1.PMES)
+ {
+ Store (One, \_SB.PCI0.EHC1.PMES)
+ Notify (\_SB.PCI0.EHC1, 0x02) // Device Wake
+ }
+
+ If (\_SB.PCI0.EHC2.PMES)
+ {
+ Store (One, \_SB.PCI0.EHC2.PMES)
+ Notify (\_SB.PCI0.EHC2, 0x02) // Device Wake
+ }
+
+ If (\_SB.PCI0.HDEF.PMES)
+ {
+ Store (One, \_SB.PCI0.HDEF.PMES)
+ Notify (\_SB.PCI0.HDEF, 0x02) // Device Wake
+ }
+ }
+
+ Method (_L0E, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ Notify (\_SB.PCI0.USB4, 0x02) // Device Wake
+ }
+
+ Method (_L1B, 0, NotSerialized) // _Lxx: Level-Triggered GPE
+ {
+ Not (LPOL, LPOL) /* \LPOL */
+ Notify (\_SB.LID0, 0x80) // Status Change
+ }
+ }
+
+ Scope (_PR)
+ {
+ Processor (CPU0, 0x00, 0x00001010, 0x06) {}
+ Processor (CPU1, 0x01, 0x00001010, 0x06) {}
+ Method (RPPC, 0, NotSerialized)
+ {
+ If (LEqual (OSYS, 0x07D2))
+ {
+ If (And (CFGD, One))
+ {
+ If (LGreater (^CPU0._PPC, Zero))
+ {
+ Subtract (^CPU0._PPC, One, ^CPU0._PPC) /* External reference \
*/ + PNOT ()
+ Add (^CPU0._PPC, One, ^CPU0._PPC) /* External reference */
+ PNOT ()
+ }
+ Else
+ {
+ Add (^CPU0._PPC, One, ^CPU0._PPC) /* External reference */
+ PNOT ()
+ Subtract (^CPU0._PPC, One, ^CPU0._PPC) /* External reference \
*/ + PNOT ()
+ }
+ }
+ }
+ }
+ }
+
+ Name (FWSO, "FWSO")
+ Name (_PSC, Zero) // _PSC: Power State Current
+ Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
+ {
+ Store (_PSC, Local0)
+ Store (Zero, _PSC) /* \_PSC */
+ }
+
+ Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
+ {
+ Store (0x03, _PSC) /* \_PSC */
+ }
+
+ Scope (_SB)
+ {
+ Device (AMW0)
+ {
+ Name (_HID, "pnp0c14") // _HID: Hardware ID
+ Name (_UID, Zero) // _UID: Unique ID
+ Name (_WDG, Buffer (0x3C)
+ {
+ /* 0000 */ 0xA7, 0x1D, 0x85, 0x2E, 0x53, 0xD0, 0x5F, 0x49,
+ /* 0008 */ 0x9D, 0xFA, 0x1A, 0x4A, 0xD6, 0x2E, 0x6A, 0x86,
+ /* 0010 */ 0x41, 0x43, 0x01, 0x00, 0x3B, 0x6D, 0x43, 0x71,
+ /* 0018 */ 0xDD, 0xFB, 0x72, 0x4C, 0xBC, 0xB8, 0x43, 0x5B,
+ /* 0020 */ 0xFE, 0x0D, 0x64, 0xF9, 0x42, 0x43, 0x01, 0x00,
+ /* 0028 */ 0x21, 0x12, 0x90, 0x05, 0x66, 0xD5, 0xD1, 0x11,
+ /* 0030 */ 0xB2, 0xF0, 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10,
+ /* 0038 */ 0x42, 0x41, 0x01, 0x00
+ })
+ Name (STAC, Buffer (0x04)
+ {
+ 0x01, 0x14, 0x03, 0x00
+ })
+ Method (WQAC, 1, NotSerialized)
+ {
+ Store ("MXMTCConfigData", Debug)
+ Return (STAC) /* \_SB_.AMW0.STAC */
+ }
+
+ Name (STBC, Buffer (0x04)
+ {
+ 0x01, 0x00, 0x00, 0x00
+ })
+ Method (WQBC, 1, NotSerialized)
+ {
+ Store ("Get MXMTCControlData: STBC = ", Debug)
+ Store (STBC, Debug)
+ Return (STBC) /* \_SB_.AMW0.STBC */
+ }
+
+ Method (WSBC, 2, NotSerialized)
+ {
+ Store (Arg1, STBC) /* \_SB_.AMW0.STBC */
+ Store ("Set MXMTCControlData: STBC = ", Debug)
+ Store (STBC, Debug)
+ If (LEqual (^^PCI0.LPCB.ECOK (), One))
+ {
+ Store (DerefOf (Index (STBC, One)), ^^PCI0.LPCB.EC0.SKTC) /* \
\_SB_.PCI0.LPCB.EC0_.SKTC */ + }
+ }
+
+ Name (WQBA, Buffer (0x02AE)
+ {
+ /* 0000 */ 0x46, 0x4F, 0x4D, 0x42, 0x01, 0x00, 0x00, 0x00,
+ /* 0008 */ 0x9E, 0x02, 0x00, 0x00, 0xC0, 0x0B, 0x00, 0x00,
+ /* 0010 */ 0x44, 0x53, 0x00, 0x01, 0x1A, 0x7D, 0xDA, 0x54,
+ /* 0018 */ 0x28, 0xD9, 0x85, 0x00, 0x01, 0x06, 0x18, 0x42,
+ /* 0020 */ 0x10, 0x07, 0x10, 0x0A, 0x4B, 0x61, 0x02, 0xC9,
+ /* 0028 */ 0x21, 0x52, 0x3C, 0x18, 0x94, 0x05, 0x10, 0x43,
+ /* 0030 */ 0x88, 0x57, 0x04, 0x44, 0x04, 0x84, 0xBC, 0x0A,
+ /* 0038 */ 0xB0, 0x29, 0xC0, 0x24, 0x88, 0xFA, 0xF7, 0x87,
+ /* 0040 */ 0x28, 0x09, 0x0E, 0x25, 0x04, 0x42, 0x12, 0x05,
+ /* 0048 */ 0x98, 0x17, 0xA0, 0x5B, 0x80, 0x61, 0x01, 0xB6,
+ /* 0050 */ 0x05, 0x98, 0x16, 0xE0, 0x18, 0x92, 0x4A, 0x03,
+ /* 0058 */ 0xA7, 0x04, 0x96, 0x02, 0x21, 0xA1, 0x02, 0x94,
+ /* 0060 */ 0x0B, 0xF0, 0x2D, 0x40, 0x3B, 0xA2, 0x24, 0x0B,
+ /* 0068 */ 0xB0, 0x0C, 0x23, 0x02, 0x8F, 0x82, 0xA1, 0x71,
+ /* 0070 */ 0x68, 0xEC, 0x30, 0x2C, 0x13, 0x4C, 0x83, 0x38,
+ /* 0078 */ 0x8C, 0xB2, 0x91, 0x45, 0x60, 0xDC, 0x4E, 0x05,
+ /* 0080 */ 0xC8, 0x15, 0x20, 0x4C, 0x80, 0x78, 0x54, 0x61,
+ /* 0088 */ 0x34, 0x07, 0x45, 0xE0, 0x42, 0x63, 0x64, 0x40,
+ /* 0090 */ 0xC8, 0xA3, 0x00, 0xAB, 0xA3, 0xD0, 0xA4, 0x12,
+ /* 0098 */ 0xD8, 0xBD, 0x00, 0x65, 0x02, 0x2C, 0x0A, 0x10,
+ /* 00A0 */ 0x27, 0xC0, 0x9A, 0x00, 0x63, 0x48, 0x32, 0x28,
+ /* 00A8 */ 0x40, 0x9B, 0x00, 0x5B, 0x20, 0x42, 0x0F, 0xD4,
+ /* 00B0 */ 0x19, 0x8A, 0x46, 0x70, 0x02, 0x51, 0x6A, 0x46,
+ /* 00B8 */ 0x11, 0x48, 0xAC, 0x1A, 0x01, 0x85, 0x12, 0x34,
+ /* 00C0 */ 0x46, 0xB0, 0x10, 0x81, 0xC2, 0x86, 0x37, 0x46,
+ /* 00C8 */ 0x98, 0x03, 0x88, 0xD1, 0xFE, 0x20, 0x48, 0x20,
+ /* 00D0 */ 0x05, 0xE3, 0x66, 0x91, 0x46, 0x83, 0x1A, 0x6B,
+ /* 00D8 */ 0x82, 0x63, 0xF7, 0x68, 0x4E, 0xB8, 0x73, 0x01,
+ /* 00E0 */ 0xD2, 0xE7, 0x26, 0x90, 0xA3, 0x3B, 0xB8, 0x3A,
+ /* 00E8 */ 0x07, 0x4D, 0x86, 0xC7, 0xB0, 0x1E, 0x06, 0xD8,
+ /* 00F0 */ 0x29, 0x00, 0xEF, 0x1A, 0x50, 0xD3, 0x3F, 0x78,
+ /* 00F8 */ 0x26, 0x08, 0x0E, 0x35, 0x44, 0x8F, 0x3A, 0xDC,
+ /* 0100 */ 0x09, 0x1C, 0xFB, 0x91, 0x30, 0x88, 0xB3, 0x3B,
+ /* 0108 */ 0x6E, 0xAC, 0xC3, 0xC9, 0x68, 0xD0, 0xA5, 0x0A,
+ /* 0110 */ 0x30, 0x7B, 0x00, 0xD0, 0xD0, 0x12, 0x9C, 0xF6,
+ /* 0118 */ 0x99, 0x84, 0x7E, 0x0F, 0x38, 0x9F, 0x9E, 0x21,
+ /* 0120 */ 0x89, 0xFC, 0x41, 0xA0, 0x46, 0xE6, 0xFF, 0x3F,
+ /* 0128 */ 0xB4, 0xC7, 0x78, 0x5A, 0x31, 0x43, 0x3E, 0x0B,
+ /* 0130 */ 0x1C, 0x16, 0x13, 0x0B, 0xA1, 0x4D, 0x6A, 0x3C,
+ /* 0138 */ 0x40, 0x40, 0xE1, 0xD1, 0x40, 0x08, 0x6F, 0x06,
+ /* 0140 */ 0x9E, 0xAF, 0x09, 0x46, 0x86, 0x90, 0x93, 0xF1,
+ /* 0148 */ 0xA0, 0x06, 0xE0, 0x41, 0xD7, 0x3A, 0x32, 0x8D,
+ /* 0150 */ 0x27, 0xA6, 0x21, 0xCF, 0xE8, 0x00, 0x22, 0xBF,
+ /* 0158 */ 0x32, 0x78, 0x0C, 0x41, 0x02, 0xF9, 0xC4, 0x60,
+ /* 0160 */ 0xB8, 0xC7, 0x81, 0x13, 0x78, 0x02, 0xF0, 0x59,
+ /* 0168 */ 0x40, 0x10, 0x92, 0x00, 0x21, 0x51, 0xE3, 0xA7,
+ /* 0170 */ 0x47, 0x08, 0x7E, 0x7A, 0x78, 0x93, 0x30, 0x28,
+ /* 0178 */ 0x1F, 0xD2, 0x99, 0xF9, 0x90, 0xE1, 0x11, 0xC2,
+ /* 0180 */ 0x07, 0xC4, 0x7B, 0x9F, 0x3B, 0x19, 0xC1, 0x29,
+ /* 0188 */ 0x7B, 0xA4, 0xE0, 0xB0, 0x7E, 0x0E, 0x20, 0xC0,
+ /* 0190 */ 0xAF, 0x0F, 0x8F, 0x0D, 0x09, 0x7C, 0xAE, 0x08,
+ /* 0198 */ 0x8C, 0x1D, 0xAA, 0xFD, 0x0A, 0x40, 0x08, 0x1E,
+ /* 01A0 */ 0xED, 0x51, 0xE0, 0x54, 0x23, 0x1C, 0x2D, 0x78,
+ /* 01A8 */ 0x08, 0x8A, 0x1C, 0x03, 0x4A, 0xCC, 0x18, 0x50,
+ /* 01B0 */ 0x03, 0x38, 0x85, 0xD0, 0xE7, 0x73, 0x04, 0x47,
+ /* 01B8 */ 0x14, 0x25, 0xF6, 0x21, 0x19, 0xDA, 0x08, 0xE1,
+ /* 01C0 */ 0x1F, 0x39, 0x4E, 0xC1, 0xF7, 0x8B, 0x23, 0x3D,
+ /* 01C8 */ 0xAD, 0x23, 0x78, 0x91, 0xF0, 0x08, 0x30, 0xE1,
+ /* 01D0 */ 0xCE, 0x28, 0xA8, 0x38, 0x30, 0xF4, 0xFF, 0x7F,
+ /* 01D8 */ 0x4C, 0x01, 0xDC, 0x7A, 0x3B, 0xA6, 0x80, 0x3E,
+ /* 01E0 */ 0xC0, 0x31, 0x05, 0x50, 0xFC, 0xFF, 0x3F, 0xA6,
+ /* 01E8 */ 0x00, 0x87, 0xA8, 0xC7, 0x14, 0xF4, 0x40, 0x0C,
+ /* 01F0 */ 0x7C, 0x2E, 0xA1, 0x0D, 0xFF, 0x96, 0xC1, 0x8E,
+ /* 01F8 */ 0x03, 0x87, 0x74, 0x6A, 0x8F, 0x28, 0x80, 0x29,
+ /* 0200 */ 0x79, 0x47, 0x14, 0x50, 0x8C, 0x14, 0xD6, 0xF1,
+ /* 0208 */ 0x04, 0x18, 0x05, 0x3C, 0x9B, 0xA0, 0x22, 0x1D,
+ /* 0210 */ 0x4F, 0x80, 0xCE, 0xFF, 0xFF, 0x78, 0x02, 0x58,
+ /* 0218 */ 0xB8, 0x9A, 0xBC, 0x92, 0x84, 0x7D, 0x1E, 0x78,
+ /* 0220 */ 0x1D, 0x89, 0x14, 0xE3, 0x41, 0xE2, 0xB5, 0xE4,
+ /* 0228 */ 0xC1, 0x24, 0x46, 0x98, 0x08, 0x8F, 0x27, 0x1E,
+ /* 0230 */ 0x47, 0xC0, 0xB7, 0x82, 0x28, 0x91, 0x8E, 0x3E,
+ /* 0238 */ 0xC4, 0x83, 0x49, 0x28, 0x63, 0x3E, 0xA3, 0x84,
+ /* 0240 */ 0x89, 0xF9, 0x04, 0x70, 0x22, 0xEF, 0x27, 0x46,
+ /* 0248 */ 0x0A, 0x73, 0x2A, 0x8F, 0x27, 0x2C, 0xC4, 0xF1,
+ /* 0250 */ 0x04, 0xA0, 0x85, 0xE2, 0xE3, 0x09, 0x3A, 0x2C,
+ /* 0258 */ 0x84, 0xFE, 0xFF, 0xC7, 0x13, 0xDC, 0xE1, 0xC1,
+ /* 0260 */ 0xA7, 0x0C, 0xFC, 0x85, 0x0C, 0xC6, 0xF9, 0x04,
+ /* 0268 */ 0x30, 0x24, 0xF0, 0x7C, 0x02, 0xCA, 0xDB, 0x18,
+ /* 0270 */ 0xE6, 0x80, 0x02, 0x8C, 0x14, 0xDA, 0xF4, 0xA9,
+ /* 0278 */ 0xD1, 0xA8, 0x55, 0x83, 0x32, 0x35, 0xCA, 0x34,
+ /* 0280 */ 0xA8, 0xD5, 0xA7, 0x52, 0x63, 0xC6, 0x4C, 0x9C,
+ /* 0288 */ 0x52, 0xBC, 0x6C, 0x8D, 0xDF, 0xF2, 0x9E, 0x09,
+ /* 0290 */ 0x02, 0xB1, 0x20, 0x0A, 0x81, 0x38, 0xCC, 0xF3,
+ /* 0298 */ 0x42, 0x20, 0x96, 0xA2, 0x01, 0x84, 0x85, 0x06,
+ /* 02A0 */ 0xA1, 0x42, 0xA9, 0x05, 0xE2, 0x98, 0x20, 0x34,
+ /* 02A8 */ 0x92, 0x0A, 0x10, 0xF6, 0xFF, 0x07
+ })
+ }
+
+ Device (LID0)
+ {
+ Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID
+ Method (_LID, 0, NotSerialized) // _LID: Lid Status
+ {
+ Return (LPOL) /* \LPOL */
+ }
+ }
+
+ Device (PWRB)
+ {
+ Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: \
Hardware ID + }
+
+ Device (PCI0)
+ {
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
+ {
+ Return (0x02)
+ }
+
+ Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
+ {
+ Return (0x02)
+ }
+
+ Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware \
ID + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
+ Device (MCHC)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ OperationRegion (HBUS, PCI_Config, 0x40, 0xC0)
+ Field (HBUS, DWordAcc, NoLock, Preserve)
+ {
+ EPEN, 1,
+ , 11,
+ EPBR, 20,
+ Offset (0x08),
+ MHEN, 1,
+ , 13,
+ MHBR, 18,
+ Offset (0x20),
+ PXEN, 1,
+ PXSZ, 2,
+ , 23,
+ PXBR, 6,
+ Offset (0x28),
+ DIEN, 1,
+ , 11,
+ DIBR, 20,
+ Offset (0x30),
+ IPEN, 1,
+ , 11,
+ IPBR, 20,
+ Offset (0x50),
+ , 4,
+ PM0H, 2,
+ Offset (0x51),
+ PM1L, 2,
+ , 2,
+ PM1H, 2,
+ Offset (0x52),
+ PM2L, 2,
+ , 2,
+ PM2H, 2,
+ Offset (0x53),
+ PM3L, 2,
+ , 2,
+ PM3H, 2,
+ Offset (0x54),
+ PM4L, 2,
+ , 2,
+ PM4H, 2,
+ Offset (0x55),
+ PM5L, 2,
+ , 2,
+ PM5H, 2,
+ Offset (0x56),
+ PM6L, 2,
+ , 2,
+ PM6H, 2,
+ Offset (0x57),
+ , 7,
+ HENA, 1,
+ Offset (0x62),
+ TUUD, 16,
+ Offset (0x70),
+ , 4,
+ TLUD, 12
+ }
+ }
+
+ Name (BUF0, ResourceTemplate ()
+ {
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, // Granularity
+ 0x0000, // Range Minimum
+ 0x00FF, // Range Maximum
+ 0x0000, // Translation Offset
+ 0x0100, // Length
+ ,, )
+ DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, \
EntireRange, + 0x00000000, // Granularity
+ 0x00000000, // Range Minimum
+ 0x00000CF7, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00000CF8, // Length
+ ,, , TypeStatic)
+ IO (Decode16,
+ 0x0CF8, // Range Minimum
+ 0x0CF8, // Range Maximum
+ 0x01, // Alignment
+ 0x08, // Length
+ )
+ DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, \
EntireRange, + 0x00000000, // Granularity
+ 0x00000D00, // Range Minimum
+ 0x0000FFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x0000F300, // Length
+ ,, , TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000A0000, // Range Minimum
+ 0x000BFFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00020000, // Length
+ ,, , AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000C0000, // Range Minimum
+ 0x000C3FFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y00, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000C4000, // Range Minimum
+ 0x000C7FFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y01, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000C8000, // Range Minimum
+ 0x000CBFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y02, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000CC000, // Range Minimum
+ 0x000CFFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y03, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000D0000, // Range Minimum
+ 0x000D3FFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y04, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000D4000, // Range Minimum
+ 0x000D7FFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y05, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000D8000, // Range Minimum
+ 0x000DBFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y06, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000DC000, // Range Minimum
+ 0x000DFFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y07, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000E0000, // Range Minimum
+ 0x000E3FFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y08, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000E4000, // Range Minimum
+ 0x000E7FFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y09, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000E8000, // Range Minimum
+ 0x000EBFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y0A, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000EC000, // Range Minimum
+ 0x000EFFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00004000, // Length
+ ,, _Y0B, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x000F0000, // Range Minimum
+ 0x000FFFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00010000, // Length
+ ,, _Y0C, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0x00000000, // Range Minimum
+ 0xDFFFFFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00000000, // Length
+ ,, _Y0D, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0xF0000000, // Range Minimum
+ 0xFEBFFFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x0EC00000, // Length
+ ,, _Y0E, AddressRangeMemory, TypeStatic)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, \
Cacheable, ReadWrite, + 0x00000000, // Granularity
+ 0xFED40000, // Range Minimum
+ 0xFED44FFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x00000000, // Length
+ ,, , AddressRangeMemory, TypeStatic)
+ })
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ If (^MCHC.PM1L)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y00._LEN, C0LN) // _LEN: \
Length + Store (Zero, C0LN) /* \_SB_.PCI0._CRS.C0LN */
+ }
+
+ If (LEqual (^MCHC.PM1L, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y00._RW, C0RW) // _RW_: \
Read-Write Status + Store (Zero, C0RW) /* \_SB_.PCI0._CRS.C0RW */
+ }
+
+ If (^MCHC.PM1H)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C4LN) // _LEN: \
Length + Store (Zero, C4LN) /* \_SB_.PCI0._CRS.C4LN */
+ }
+
+ If (LEqual (^MCHC.PM1H, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C4RW) // _RW_: \
Read-Write Status + Store (Zero, C4RW) /* \_SB_.PCI0._CRS.C4RW */
+ }
+
+ If (^MCHC.PM2L)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C8LN) // _LEN: \
Length + Store (Zero, C8LN) /* \_SB_.PCI0._CRS.C8LN */
+ }
+
+ If (LEqual (^MCHC.PM2L, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C8RW) // _RW_: \
Read-Write Status + Store (Zero, C8RW) /* \_SB_.PCI0._CRS.C8RW */
+ }
+
+ If (^MCHC.PM2H)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, CCLN) // _LEN: \
Length + Store (Zero, CCLN) /* \_SB_.PCI0._CRS.CCLN */
+ }
+
+ If (LEqual (^MCHC.PM2H, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y03._RW, CCRW) // _RW_: \
Read-Write Status + Store (Zero, CCRW) /* \_SB_.PCI0._CRS.CCRW */
+ }
+
+ If (^MCHC.PM3L)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, D0LN) // _LEN: \
Length + Store (Zero, D0LN) /* \_SB_.PCI0._CRS.D0LN */
+ }
+
+ If (LEqual (^MCHC.PM3L, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y04._RW, D0RW) // _RW_: \
Read-Write Status + Store (Zero, D0RW) /* \_SB_.PCI0._CRS.D0RW */
+ }
+
+ If (^MCHC.PM3H)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D4LN) // _LEN: \
Length + Store (Zero, D4LN) /* \_SB_.PCI0._CRS.D4LN */
+ }
+
+ If (LEqual (^MCHC.PM3H, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D4RW) // _RW_: \
Read-Write Status + Store (Zero, D4RW) /* \_SB_.PCI0._CRS.D4RW */
+ }
+
+ If (^MCHC.PM4L)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D8LN) // _LEN: \
Length + Store (Zero, D8LN) /* \_SB_.PCI0._CRS.D8LN */
+ }
+
+ If (LEqual (^MCHC.PM4L, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D8RW) // _RW_: \
Read-Write Status + Store (Zero, D8RW) /* \_SB_.PCI0._CRS.D8RW */
+ }
+
+ If (^MCHC.PM4H)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, DCLN) // _LEN: \
Length + Store (Zero, DCLN) /* \_SB_.PCI0._CRS.DCLN */
+ }
+
+ If (LEqual (^MCHC.PM4H, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y07._RW, DCRW) // _RW_: \
Read-Write Status + Store (Zero, DCRW) /* \_SB_.PCI0._CRS.DCRW */
+ }
+
+ If (^MCHC.PM5L)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, E0LN) // _LEN: \
Length + Store (Zero, E0LN) /* \_SB_.PCI0._CRS.E0LN */
+ }
+
+ If (LEqual (^MCHC.PM5L, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y08._RW, E0RW) // _RW_: \
Read-Write Status + Store (Zero, E0RW) /* \_SB_.PCI0._CRS.E0RW */
+ }
+
+ If (^MCHC.PM5H)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E4LN) // _LEN: \
Length + Store (Zero, E4LN) /* \_SB_.PCI0._CRS.E4LN */
+ }
+
+ If (LEqual (^MCHC.PM5H, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E4RW) // _RW_: \
Read-Write Status + Store (Zero, E4RW) /* \_SB_.PCI0._CRS.E4RW */
+ }
+
+ If (^MCHC.PM6L)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E8LN) // _LEN: \
Length + Store (Zero, E8LN) /* \_SB_.PCI0._CRS.E8LN */
+ }
+
+ If (LEqual (^MCHC.PM6L, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E8RW) // _RW_: \
Read-Write Status + Store (Zero, E8RW) /* \_SB_.PCI0._CRS.E8RW */
+ }
+
+ If (^MCHC.PM6H)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, ECLN) // _LEN: \
Length + Store (Zero, ECLN) /* \_SB_.PCI0._CRS.ECLN */
+ }
+
+ If (LEqual (^MCHC.PM6H, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, ECRW) // _RW_: \
Read-Write Status + Store (Zero, ECRW) /* \_SB_.PCI0._CRS.ECRW */
+ }
+
+ If (^MCHC.PM0H)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, F0LN) // _LEN: \
Length + Store (Zero, F0LN) /* \_SB_.PCI0._CRS.F0LN */
+ }
+
+ If (LEqual (^MCHC.PM0H, One))
+ {
+ CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, F0RW) // _RW_: \
Read-Write Status + Store (Zero, F0RW) /* \_SB_.PCI0._CRS.F0RW */
+ }
+
+ CreateDWordField (BUF0, \_SB.PCI0._Y0D._MIN, M1MN) // _MIN: Minimum \
Base Address + CreateDWordField (BUF0, \_SB.PCI0._Y0D._MAX, M1MX) // \
_MAX: Maximum Base Address + CreateDWordField (BUF0, \
\_SB.PCI0._Y0D._LEN, M1LN) // _LEN: Length + CreateDWordField (BUF0, \
\_SB.PCI0._Y0E._MIN, M2MN) // _MIN: Minimum Base Address + \
CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M2MX) // _MAX: Maximum Base Address + \
CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M2LN) // _LEN: Length + \
ShiftLeft (^MCHC.PXBR, 0x1A, M1MX) /* \_SB_.PCI0._CRS.M1MX */ + \
ShiftRight (0x10000000, ^MCHC.PXSZ, Local0) + Add (M1MX, Local0, M2MN) \
/* \_SB_.PCI0._CRS.M2MN */ + Add (Subtract (M2MX, M2MN), One, M2LN) /* \
\_SB_.PCI0._CRS.M2LN */ + Subtract (M1MX, One, M1MX) /* \
\_SB_.PCI0._CRS.M1MX */ + ShiftLeft (^MCHC.TLUD, 0x14, M1MN) /* \
\_SB_.PCI0._CRS.M1MN */ + Add (Subtract (M1MX, M1MN), One, M1LN) /* \
\_SB_.PCI0._CRS.M1LN */ + Return (BUF0) /* \_SB_.PCI0.BUF0 */
+ }
+
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ If (GPIC)
+ {
+ Return (Package (0x13)
+ {
+ Package (0x04)
+ {
+ 0x0001FFFF,
+ Zero,
+ Zero,
+ 0x10
+ },
+
+ Package (0x04)
+ {
+ 0x0002FFFF,
+ Zero,
+ Zero,
+ 0x10
+ },
+
+ Package (0x04)
+ {
+ 0x0007FFFF,
+ Zero,
+ Zero,
+ 0x10
+ },
+
+ Package (0x04)
+ {
+ 0x0019FFFF,
+ Zero,
+ Zero,
+ 0x14
+ },
+
+ Package (0x04)
+ {
+ 0x001AFFFF,
+ Zero,
+ Zero,
+ 0x10
+ },
+
+ Package (0x04)
+ {
+ 0x001AFFFF,
+ One,
+ Zero,
+ 0x15
+ },
+
+ Package (0x04)
+ {
+ 0x001AFFFF,
+ 0x02,
+ Zero,
+ 0x12
+ },
+
+ Package (0x04)
+ {
+ 0x001BFFFF,
+ Zero,
+ Zero,
+ 0x16
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ Zero,
+ Zero,
+ 0x11
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ One,
+ Zero,
+ 0x10
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ 0x02,
+ Zero,
+ 0x12
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ 0x03,
+ Zero,
+ 0x13
+ },
+
+ Package (0x04)
+ {
+ 0x001DFFFF,
+ Zero,
+ Zero,
+ 0x17
+ },
+
+ Package (0x04)
+ {
+ 0x001DFFFF,
+ One,
+ Zero,
+ 0x13
+ },
+
+ Package (0x04)
+ {
+ 0x001DFFFF,
+ 0x02,
+ Zero,
+ 0x12
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ Zero,
+ Zero,
+ 0x13
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ One,
+ Zero,
+ 0x13
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ 0x02,
+ Zero,
+ 0x13
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ 0x03,
+ Zero,
+ 0x10
+ }
+ })
+ }
+ Else
+ {
+ Return (Package (0x13)
+ {
+ Package (0x04)
+ {
+ 0x0001FFFF,
+ Zero,
+ ^LPCB.LNKA,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0002FFFF,
+ Zero,
+ ^LPCB.LNKA,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0007FFFF,
+ Zero,
+ ^LPCB.LNKA,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0019FFFF,
+ Zero,
+ ^LPCB.LNKE,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001AFFFF,
+ Zero,
+ ^LPCB.LNKA,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001AFFFF,
+ One,
+ ^LPCB.LNKF,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001AFFFF,
+ 0x02,
+ ^LPCB.LNKC,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001BFFFF,
+ Zero,
+ ^LPCB.LNKG,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ Zero,
+ ^LPCB.LNKB,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ One,
+ ^LPCB.LNKA,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ 0x02,
+ ^LPCB.LNKC,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ 0x03,
+ ^LPCB.LNKD,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001DFFFF,
+ Zero,
+ ^LPCB.LNKH,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001DFFFF,
+ One,
+ ^LPCB.LNKD,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001DFFFF,
+ 0x02,
+ ^LPCB.LNKC,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ Zero,
+ ^LPCB.LNKD,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ One,
+ ^LPCB.LNKD,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ 0x02,
+ ^LPCB.LNKD,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ 0x03,
+ ^LPCB.LNKA,
+ Zero
+ }
+ })
+ }
+ }
+
+ Device (PDRC)
+ {
+ Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // \
_HID: Hardware ID + Name (_UID, One) // _UID: Unique ID
+ Name (BUF0, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite,
+ 0x00000000, // Address Base
+ 0x00004000, // Address Length
+ _Y0F)
+ Memory32Fixed (ReadWrite,
+ 0x00000000, // Address Base
+ 0x00004000, // Address Length
+ _Y10)
+ Memory32Fixed (ReadWrite,
+ 0x00000000, // Address Base
+ 0x00001000, // Address Length
+ _Y11)
+ Memory32Fixed (ReadWrite,
+ 0x00000000, // Address Base
+ 0x00001000, // Address Length
+ _Y12)
+ Memory32Fixed (ReadWrite,
+ 0x00000000, // Address Base
+ 0x00000000, // Address Length
+ _Y13)
+ Memory32Fixed (ReadWrite,
+ 0xFED20000, // Address Base
+ 0x00020000, // Address Length
+ )
+ Memory32Fixed (ReadWrite,
+ 0xFED40000, // Address Base
+ 0x00005000, // Address Length
+ )
+ Memory32Fixed (ReadWrite,
+ 0xFED45000, // Address Base
+ 0x0004B000, // Address Length
+ )
+ })
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y0F._BAS, RBR0) // \
_BAS: Base Address + ShiftLeft (^^LPCB.RCBA, 0x0E, RBR0) /* \
\_SB_.PCI0.PDRC._CRS.RBR0 */ + CreateDWordField (BUF0, \
\_SB.PCI0.PDRC._Y10._BAS, MBR0) // _BAS: Base Address + ShiftLeft \
(^^MCHC.MHBR, 0x0E, MBR0) /* \_SB_.PCI0.PDRC._CRS.MBR0 */ + \
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y11._BAS, DBR0) // _BAS: Base Address + \
ShiftLeft (^^MCHC.DIBR, 0x0C, DBR0) /* \_SB_.PCI0.PDRC._CRS.DBR0 */ + \
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y12._BAS, EBR0) // _BAS: Base Address + \
ShiftLeft (^^MCHC.EPBR, 0x0C, EBR0) /* \_SB_.PCI0.PDRC._CRS.EBR0 */ + \
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y13._BAS, XBR0) // _BAS: Base Address + \
ShiftLeft (^^MCHC.PXBR, 0x1A, XBR0) /* \_SB_.PCI0.PDRC._CRS.XBR0 */ + \
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y13._LEN, XSZ0) // _LEN: Length + \
ShiftRight (0x10000000, ^^MCHC.PXSZ, XSZ0) /* \_SB_.PCI0.PDRC._CRS.XSZ0 */ + \
Return (BUF0) /* \_SB_.PCI0.PDRC.BUF0 */ + }
+ }
+
+ Device (PEGP)
+ {
+ Name (_ADR, 0x00010000) // _ADR: Address
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ If (GPIC)
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ Zero,
+ 0x10
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ Zero,
+ 0x11
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ Zero,
+ 0x12
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ Zero,
+ 0x13
+ }
+ })
+ }
+ Else
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ ^^LPCB.LNKA,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ ^^LPCB.LNKB,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ ^^LPCB.LNKC,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ ^^LPCB.LNKD,
+ Zero
+ }
+ })
+ }
+ }
+
+ Device (VGA)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Name (SWIT, One)
+ Name (CRTA, One)
+ Name (LCDA, One)
+ Name (TVAA, One)
+ Name (VLDF, One)
+ OperationRegion (VIDS, PCI_Config, Zero, 0xC8)
+ Field (VIDS, DWordAcc, NoLock, Preserve)
+ {
+ VDID, 32
+ }
+
+ Method (_STA, 0, NotSerialized) // _STA: Status
+ {
+ Return (0x0F)
+ }
+
+ Name (_PSC, Zero) // _PSC: Power State Current
+ Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
+ {
+ Store (Zero, _PSC) /* \_SB_.PCI0.PEGP.VGA_._PSC */
+ }
+
+ Method (_PS1, 0, NotSerialized) // _PS1: Power State 1
+ {
+ Store (One, _PSC) /* \_SB_.PCI0.PEGP.VGA_._PSC */
+ }
+
+ Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
+ {
+ Store (0x03, _PSC) /* \_SB_.PCI0.PEGP.VGA_._PSC */
+ }
+
+ Method (_DOS, 1, NotSerialized) // _DOS: Disable Output \
Switching + {
+ Store (And (Arg0, 0x03), SWIT) /* \_SB_.PCI0.PEGP.VGA_.SWIT \
*/ + }
+
+ Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices
+ {
+ Return (Package (0x03)
+ {
+ 0x00010100,
+ 0x00010110,
+ 0x0200
+ })
+ }
+
+ Device (CRT)
+ {
+ Method (_ADR, 0, NotSerialized) // _ADR: Address
+ {
+ Return (0x0100)
+ }
+
+ Method (_DCS, 0, NotSerialized) // _DCS: Display Current \
Status + {
+ ^^^^LPCB.PHSS (0x0C)
+ Store (CADL, Local0)
+ Store (CSTE, Local1)
+ And (Local0, 0x02, Local0)
+ And (Local1, 0x02, Local1)
+ If (Local0)
+ {
+ Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
+ }
+ Else
+ {
+ Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
+ }
+
+ If (CRTA)
+ {
+ If (LEqual (Local1, 0x02))
+ {
+ Return (0x1F)
+ }
+ Else
+ {
+ Return (0x1D)
+ }
+ }
+ Else
+ {
+ If (LEqual (Local1, 0x02))
+ {
+ Return (0x0F)
+ }
+ Else
+ {
+ Return (0x0D)
+ }
+ }
+ }
+
+ Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics \
State + {
+ If (CRTA)
+ {
+ Return (One)
+ }
+ Else
+ {
+ Return (Zero)
+ }
+ }
+
+ Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
+ {
+ }
+ }
+
+ Device (LCD)
+ {
+ Method (_ADR, 0, NotSerialized) // _ADR: Address
+ {
+ Return (0x0110)
+ }
+
+ Method (_DCS, 0, NotSerialized) // _DCS: Display Current \
Status + {
+ ^^^^LPCB.PHSS (0x0C)
+ Store (CADL, Local0)
+ Store (CSTE, Local1)
+ And (Local0, One, Local0)
+ And (Local1, One, Local1)
+ If (Local0)
+ {
+ Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
+ }
+ Else
+ {
+ Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
+ }
+
+ If (LCDA)
+ {
+ If (LEqual (Local1, One))
+ {
+ Return (0x1F)
+ }
+ Else
+ {
+ Return (0x1D)
+ }
+ }
+ Else
+ {
+ If (LEqual (Local1, One))
+ {
+ Return (0x0F)
+ }
+ Else
+ {
+ Return (0x0D)
+ }
+ }
+ }
+
+ Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics \
State + {
+ If (LCDA)
+ {
+ Return (One)
+ }
+ Else
+ {
+ Return (Zero)
+ }
+ }
+
+ Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
+ {
+ }
+
+ Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control \
Levels + {
+ Return (Package (0x0A)
+ {
+ 0x46,
+ 0x28,
+ Zero,
+ 0x0A,
+ 0x14,
+ 0x1E,
+ 0x28,
+ 0x32,
+ 0x3C,
+ 0x46
+ })
+ }
+
+ Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control \
Method + {
+ Divide (Arg0, 0x0A, Local0, Local1)
+ Store (Local1, ^^^^LPCB.EC0.BRTS) /* \
\_SB_.PCI0.LPCB.EC0_.BRTS */ + }
+
+ Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query \
Current + {
+ Multiply (^^^^LPCB.EC0.BRTS, 0x0A, Local0)
+ Return (Local0)
+ }
+ }
+
+ Device (TV)
+ {
+ Method (_ADR, 0, NotSerialized) // _ADR: Address
+ {
+ Return (0x0200)
+ }
+
+ Method (_DCS, 0, NotSerialized) // _DCS: Display Current \
Status + {
+ ^^^^LPCB.PHSS (0x0C)
+ Store (CADL, Local0)
+ Store (CSTE, Local1)
+ And (Local0, 0x04, Local0)
+ And (Local1, 0x04, Local1)
+ If (Local0)
+ {
+ Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
+ }
+ Else
+ {
+ Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
+ }
+
+ If (TVAA)
+ {
+ If (LEqual (Local1, 0x04))
+ {
+ Return (0x1F)
+ }
+ Else
+ {
+ Return (0x1D)
+ }
+ }
+ Else
+ {
+ If (LEqual (Local1, 0x04))
+ {
+ Return (0x0F)
+ }
+ Else
+ {
+ Return (0x0D)
+ }
+ }
+ }
+
+ Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics \
State + {
+ If (TVAA)
+ {
+ Return (One)
+ }
+ Else
+ {
+ Return (Zero)
+ }
+ }
+
+ Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
+ {
+ }
+ }
+
+ Method (DSSW, 0, NotSerialized)
+ {
+ If (LEqual (SWIT, Zero))
+ {
+ ^^^LPCB.PHSS (0x0C)
+ Store (CADL, Local0)
+ Store (CSTE, Local1)
+ If (LGreater (Local1, One))
+ {
+ And (Local0, Local1, VLDF) /* \
\_SB_.PCI0.PEGP.VGA_.VLDF */ + And (VLDF, 0xFE, VLDF) \
/* \_SB_.PCI0.PEGP.VGA_.VLDF */ + }
+
+ If (VLDF)
+ {
+ If (LEqual (Local0, 0x09))
+ {
+ If (LEqual (Local1, 0x08))
+ {
+ STBL (0x02)
+ }
+
+ If (LEqual (Local1, One))
+ {
+ STBL (0x03)
+ }
+
+ If (LEqual (Local1, 0x09))
+ {
+ STBL (One)
+ }
+ }
+
+ If (LEqual (Local0, 0x0A))
+ {
+ If (LEqual (Local1, 0x08))
+ {
+ STBL (0x05)
+ }
+
+ If (LEqual (Local1, 0x02))
+ {
+ STBL (One)
+ }
+
+ If (LEqual (Local1, 0x0A))
+ {
+ STBL (0x04)
+ }
+ }
+
+ If (LEqual (Local0, 0x0B))
+ {
+ If (LEqual (Local1, 0x08))
+ {
+ STBL (0x02)
+ }
+
+ If (LEqual (Local1, 0x09))
+ {
+ STBL (0x05)
+ }
+
+ If (LEqual (Local1, One))
+ {
+ STBL (0x03)
+ }
+
+ If (LEqual (Local1, 0x0A))
+ {
+ STBL (0x04)
+ }
+
+ If (LEqual (Local1, 0x02))
+ {
+ STBL (One)
+ }
+
+ If (LEqual (Local1, 0x0B))
+ {
+ STBL (One)
+ }
+ }
+ }
+ Else
+ {
+ Store (One, VLDF) /* \_SB_.PCI0.PEGP.VGA_.VLDF */
+ STBL (One)
+ }
+ }
+ Else
+ {
+ If (LEqual (SWIT, One))
+ {
+ ^^^LPCB.PHSS (One)
+ }
+ }
+ }
+
+ Method (STBL, 1, NotSerialized)
+ {
+ If (LEqual (Arg0, One))
+ {
+ Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
+ Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
+ Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
+ }
+
+ If (LEqual (Arg0, 0x02))
+ {
+ Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
+ Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
+ Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
+ }
+
+ If (LEqual (Arg0, 0x03))
+ {
+ Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
+ Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
+ Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
+ }
+
+ If (LEqual (Arg0, 0x04))
+ {
+ Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
+ Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
+ Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
+ }
+
+ If (LEqual (Arg0, 0x05))
+ {
+ Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
+ Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
+ Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
+ }
+
+ If (LEqual (Arg0, 0x06))
+ {
+ Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
+ Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
+ Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
+ }
+
+ If (LEqual (Arg0, 0x07))
+ {
+ Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
+ Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
+ Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
+ }
+
+ Notify (VGA, 0x80) // Status Change
+ }
+ }
+ }
+
+ Device (GFX0)
+ {
+ Name (_ADR, 0x00020000) // _ADR: Address
+ Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching
+ {
+ Store (And (Arg0, 0x07), DSEN) /* \DSEN */
+ }
+
+ Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices
+ {
+ Store (Zero, NDID) /* \NDID */
+ If (LNotEqual (DIDL, Zero))
+ {
+ Store (SDDL (DID1), DID1) /* \DID1 */
+ }
+
+ If (LNotEqual (DDL2, Zero))
+ {
+ Store (SDDL (DID2), DID2) /* \DID2 */
+ }
+
+ If (LNotEqual (DDL3, Zero))
+ {
+ Store (SDDL (DID3), DID3) /* \DID3 */
+ }
+
+ If (LNotEqual (DDL4, Zero))
+ {
+ Store (SDDL (DID4), DID4) /* \DID4 */
+ }
+
+ If (LNotEqual (DDL5, Zero))
+ {
+ Store (SDDL (DID5), DID5) /* \DID5 */
+ }
+
+ If (LEqual (NDID, One))
+ {
+ Name (TMP1, Package (0x01)
+ {
+ 0xFFFFFFFF
+ })
+ Store (Or (0x00010000, DID1), Index (TMP1, Zero))
+ Return (TMP1) /* \_SB_.PCI0.GFX0._DOD.TMP1 */
+ }
+
+ If (LEqual (NDID, 0x02))
+ {
+ Name (TMP2, Package (0x02)
+ {
+ 0xFFFFFFFF,
+ 0xFFFFFFFF
+ })
+ Store (Or (0x00010000, DID1), Index (TMP2, Zero))
+ Store (Or (0x00010000, DID2), Index (TMP2, One))
+ Return (TMP2) /* \_SB_.PCI0.GFX0._DOD.TMP2 */
+ }
+
+ If (LEqual (NDID, 0x03))
+ {
+ Name (TMP3, Package (0x03)
+ {
+ 0xFFFFFFFF,
+ 0xFFFFFFFF,
+ 0xFFFFFFFF
+ })
+ Store (Or (0x00010000, DID1), Index (TMP3, Zero))
+ Store (Or (0x00010000, DID2), Index (TMP3, One))
+ Store (Or (0x00010000, DID3), Index (TMP3, 0x02))
+ Return (TMP3) /* \_SB_.PCI0.GFX0._DOD.TMP3 */
+ }
+
+ If (LEqual (NDID, 0x04))
+ {
+ Name (TMP4, Package (0x04)
+ {
+ 0xFFFFFFFF,
+ 0xFFFFFFFF,
+ 0xFFFFFFFF,
+ 0xFFFFFFFF
+ })
+ Store (Or (0x00010000, DID1), Index (TMP4, Zero))
+ Store (Or (0x00010000, DID2), Index (TMP4, One))
+ Store (Or (0x00010000, DID3), Index (TMP4, 0x02))
+ Store (Or (0x00010000, DID4), Index (TMP4, 0x03))
+ Return (TMP4) /* \_SB_.PCI0.GFX0._DOD.TMP4 */
+ }
+
+ If (LGreater (NDID, 0x04))
+ {
+ Name (TMP5, Package (0x05)
+ {
+ 0xFFFFFFFF,
+ 0xFFFFFFFF,
+ 0xFFFFFFFF,
+ 0xFFFFFFFF,
+ 0xFFFFFFFF
+ })
+ Store (Or (0x00010000, DID1), Index (TMP5, Zero))
+ Store (Or (0x00010000, DID2), Index (TMP5, One))
+ Store (Or (0x00010000, DID3), Index (TMP5, 0x02))
+ Store (Or (0x00010000, DID4), Index (TMP5, 0x03))
+ Store (Or (0x00010000, DID4), Index (TMP5, 0x04))
+ Return (TMP5) /* \_SB_.PCI0.GFX0._DOD.TMP5 */
+ }
+
+ Return (Package (0x01)
+ {
+ 0x0400
+ })
+ }
+
+ Device (DD01)
+ {
+ Method (_ADR, 0, Serialized) // _ADR: Address
+ {
+ If (LEqual (DID1, Zero))
+ {
+ Return (One)
+ }
+ Else
+ {
+ Return (And (0xFFFF, DID1))
+ }
+ }
+
+ Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
+ {
+ Return (CDDS (DID1))
+ }
+
+ Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
+ {
+ Return (NDDS (DID1))
+ }
+
+ Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
+ {
+ If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
+ {
+ Store (NSTE, CSTE) /* \CSTE */
+ }
+ }
+ }
+
+ Device (DD02)
+ {
+ Method (_ADR, 0, Serialized) // _ADR: Address
+ {
+ If (LEqual (DID2, Zero))
+ {
+ Return (0x02)
+ }
+ Else
+ {
+ Return (And (0xFFFF, DID2))
+ }
+ }
+
+ Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
+ {
+ Return (CDDS (DID2))
+ }
+
+ Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
+ {
+ Return (NDDS (DID2))
+ }
+
+ Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
+ {
+ If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
+ {
+ Store (NSTE, CSTE) /* \CSTE */
+ }
+ }
+ }
+
+ Device (DD03)
+ {
+ Method (_ADR, 0, Serialized) // _ADR: Address
+ {
+ If (LEqual (DID3, Zero))
+ {
+ Return (0x03)
+ }
+ Else
+ {
+ Return (And (0xFFFF, DID3))
+ }
+ }
+
+ Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
+ {
+ If (LEqual (DID3, Zero))
+ {
+ Return (0x0B)
+ }
+ Else
+ {
+ Return (CDDS (DID3))
+ }
+ }
+
+ Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
+ {
+ Return (NDDS (DID3))
+ }
+
+ Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
+ {
+ If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
+ {
+ Store (NSTE, CSTE) /* \CSTE */
+ }
+ }
+ }
+
+ Device (DD04)
+ {
+ Method (_ADR, 0, Serialized) // _ADR: Address
+ {
+ If (LEqual (DID4, Zero))
+ {
+ Return (0x04)
+ }
+ Else
+ {
+ Return (And (0xFFFF, DID4))
+ }
+ }
+
+ Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
+ {
+ If (LEqual (DID4, Zero))
+ {
+ Return (0x0B)
+ }
+ Else
+ {
+ Return (CDDS (DID4))
+ }
+ }
+
+ Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
+ {
+ Return (NDDS (DID4))
+ }
+
+ Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
+ {
+ If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
+ {
+ Store (NSTE, CSTE) /* \CSTE */
+ }
+ }
+ }
+
+ Device (DD05)
+ {
+ Method (_ADR, 0, Serialized) // _ADR: Address
+ {
+ If (LEqual (DID5, Zero))
+ {
+ Return (0x05)
+ }
+ Else
+ {
+ Return (And (0xFFFF, DID5))
+ }
+ }
+
+ Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
+ {
+ If (LEqual (DID5, Zero))
+ {
+ Return (0x0B)
+ }
+ Else
+ {
+ Return (CDDS (DID5))
+ }
+ }
+
+ Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
+ {
+ Return (NDDS (DID5))
+ }
+
+ Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
+ {
+ If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
+ {
+ Store (NSTE, CSTE) /* \CSTE */
+ }
+ }
+ }
+
+ Method (SDDL, 1, NotSerialized)
+ {
+ Increment (NDID)
+ Store (And (Arg0, 0x0F0F), Local0)
+ Or (0x80000000, Local0, Local1)
+ If (LEqual (DIDL, Local0))
+ {
+ Return (Local1)
+ }
+
+ If (LEqual (DDL2, Local0))
+ {
+ Return (Local1)
+ }
+
+ If (LEqual (DDL3, Local0))
+ {
+ Return (Local1)
+ }
+
+ If (LEqual (DDL4, Local0))
+ {
+ Return (Local1)
+ }
+
+ If (LEqual (DDL5, Local0))
+ {
+ Return (Local1)
+ }
+
+ If (LEqual (DDL6, Local0))
+ {
+ Return (Local1)
+ }
+
+ If (LEqual (DDL7, Local0))
+ {
+ Return (Local1)
+ }
+
+ If (LEqual (DDL8, Local0))
+ {
+ Return (Local1)
+ }
+
+ Return (Zero)
+ }
+
+ Method (CDDS, 1, NotSerialized)
+ {
+ If (LEqual (CADL, And (Arg0, 0x0F0F)))
+ {
+ Return (0x1F)
+ }
+
+ If (LEqual (CAL2, And (Arg0, 0x0F0F)))
+ {
+ Return (0x1F)
+ }
+
+ If (LEqual (CAL3, And (Arg0, 0x0F0F)))
+ {
+ Return (0x1F)
+ }
+
+ If (LEqual (CAL4, And (Arg0, 0x0F0F)))
+ {
+ Return (0x1F)
+ }
+
+ If (LEqual (CAL5, And (Arg0, 0x0F0F)))
+ {
+ Return (0x1F)
+ }
+
+ If (LEqual (CAL6, And (Arg0, 0x0F0F)))
+ {
+ Return (0x1F)
+ }
+
+ If (LEqual (CAL7, And (Arg0, 0x0F0F)))
+ {
+ Return (0x1F)
+ }
+
+ If (LEqual (CAL8, And (Arg0, 0x0F0F)))
+ {
+ Return (0x1F)
+ }
+
+ Return (0x1D)
+ }
+
+ Method (NDDS, 1, NotSerialized)
+ {
+ If (LEqual (NADL, And (Arg0, 0x0F0F)))
+ {
+ Return (One)
+ }
+
+ If (LEqual (NDL2, And (Arg0, 0x0F0F)))
+ {
+ Return (One)
+ }
+
+ If (LEqual (NDL3, And (Arg0, 0x0F0F)))
+ {
+ Return (One)
+ }
+
+ If (LEqual (NDL4, And (Arg0, 0x0F0F)))
+ {
+ Return (One)
+ }
+
+ If (LEqual (NDL5, And (Arg0, 0x0F0F)))
+ {
+ Return (One)
+ }
+
+ If (LEqual (NDL6, And (Arg0, 0x0F0F)))
+ {
+ Return (One)
+ }
+
+ If (LEqual (NDL7, And (Arg0, 0x0F0F)))
+ {
+ Return (One)
+ }
+
+ If (LEqual (NDL8, And (Arg0, 0x0F0F)))
+ {
+ Return (One)
+ }
+
+ Return (Zero)
+ }
+
+ Method (BRTN, 1, Serialized)
+ {
+ If (LEqual (And (DID1, 0x0F00), 0x0400))
+ {
+ Notify (DD01, Arg0)
+ }
+
+ If (LEqual (And (DID2, 0x0F00), 0x0400))
+ {
+ Notify (DD02, Arg0)
+ }
+
+ If (LEqual (And (DID3, 0x0F00), 0x0400))
+ {
+ Notify (DD03, Arg0)
+ }
+
+ If (LEqual (And (DID4, 0x0F00), 0x0400))
+ {
+ Notify (DD04, Arg0)
+ }
+
+ If (LEqual (And (DID5, 0x0F00), 0x0400))
+ {
+ Notify (DD05, Arg0)
+ }
+ }
+
+ Scope (^^PCI0)
+ {
+ OperationRegion (MCHP, PCI_Config, 0x40, 0xC0)
+ Field (MCHP, AnyAcc, NoLock, Preserve)
+ {
+ Offset (0x60),
+ TASM, 10,
+ Offset (0x62)
+ }
+ }
+
+ OperationRegion (IGDP, PCI_Config, 0x40, 0xC0)
+ Field (IGDP, AnyAcc, NoLock, Preserve)
+ {
+ Offset (0x12),
+ , 1,
+ GIVD, 1,
+ , 2,
+ GUMA, 3,
+ Offset (0x14),
+ , 4,
+ GMFN, 1,
+ Offset (0x18),
+ Offset (0xA4),
+ ASLE, 8,
+ Offset (0xA8),
+ GSSE, 1,
+ GSSB, 14,
+ GSES, 1,
+ Offset (0xB0),
+ Offset (0xB1),
+ CDVL, 5,
+ Offset (0xB2),
+ Offset (0xB5),
+ LBPC, 8,
+ Offset (0xBC),
+ ASLS, 32
+ }
+
+ OperationRegion (IGDM, SystemMemory, ASLB, 0x2000)
+ Field (IGDM, AnyAcc, NoLock, Preserve)
+ {
+ SIGN, 128,
+ SIZE, 32,
+ OVER, 32,
+ SVER, 256,
+ VVER, 128,
+ GVER, 128,
+ MBOX, 32,
+ Offset (0x100),
+ DRDY, 32,
+ CSTS, 32,
+ CEVT, 32,
+ Offset (0x120),
+ DIDL, 32,
+ DDL2, 32,
+ DDL3, 32,
+ DDL4, 32,
+ DDL5, 32,
+ DDL6, 32,
+ DDL7, 32,
+ DDL8, 32,
+ CPDL, 32,
+ CPL2, 32,
+ CPL3, 32,
+ CPL4, 32,
+ CPL5, 32,
+ CPL6, 32,
+ CPL7, 32,
+ CPL8, 32,
+ CADL, 32,
+ CAL2, 32,
+ CAL3, 32,
+ CAL4, 32,
+ CAL5, 32,
+ CAL6, 32,
+ CAL7, 32,
+ CAL8, 32,
+ NADL, 32,
+ NDL2, 32,
+ NDL3, 32,
+ NDL4, 32,
+ NDL5, 32,
+ NDL6, 32,
+ NDL7, 32,
+ NDL8, 32,
+ ASLP, 32,
+ TIDX, 32,
+ CHPD, 32,
+ CLID, 32,
+ CDCK, 32,
+ SXSW, 32,
+ EVTS, 32,
+ CNOT, 32,
+ NRDY, 32,
+ Offset (0x200),
+ SCIE, 1,
+ GEFC, 4,
+ GXFC, 3,
+ GESF, 8,
+ Offset (0x204),
+ PARM, 32,
+ DSLP, 32,
+ Offset (0x300),
+ ARDY, 32,
+ ASLC, 32,
+ TCHE, 32,
+ ALSI, 32,
+ BCLP, 32,
+ PFIT, 32,
+ CBLV, 32,
+ BCLM, 320,
+ CPFM, 32,
+ Offset (0x400),
+ GVD1, 57344
+ }
+
+ Name (DBTB, Package (0x15)
+ {
+ Zero,
+ 0x07,
+ 0x38,
+ 0x01C0,
+ 0x0E00,
+ 0x3F,
+ 0x01C7,
+ 0x0E07,
+ 0x01F8,
+ 0x0E38,
+ 0x0FC0,
+ Zero,
+ Zero,
+ Zero,
+ Zero,
+ Zero,
+ 0x7000,
+ 0x7007,
+ 0x7038,
+ 0x71C0,
+ 0x7E00
+ })
+ Name (CDCT, Package (0x03)
+ {
+ Package (0x03)
+ {
+ 0xC8,
+ 0x0140,
+ 0x0190
+ },
+
+ Package (0x03)
+ {
+ 0xC8,
+ 0x014D,
+ 0x0190
+ },
+
+ Package (0x03)
+ {
+ 0xDE,
+ 0x014D,
+ 0x017D
+ }
+ })
+ Name (SUCC, One)
+ Name (NVLD, 0x02)
+ Name (CRIT, 0x04)
+ Name (NCRT, 0x06)
+ Method (GSCI, 0, Serialized)
+ {
+ Method (GBDA, 0, Serialized)
+ {
+ If (LEqual (GESF, Zero))
+ {
+ Store (0x0279, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, One))
+ {
+ Store (0x0240, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x04))
+ {
+ And (PARM, 0xEFFF0000, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ And (PARM, ShiftLeft (DerefOf (Index (DBTB, IBTT)), \
0x10), + PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Or (IBTT, PARM, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x05))
+ {
+ Store (IPSC, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Or (PARM, ShiftLeft (IPAT, 0x08), PARM) /* \
\_SB_.PCI0.GFX0.PARM */ + Add (PARM, 0x0100, PARM) /* \
\_SB_.PCI0.GFX0.PARM */ + Or (PARM, ShiftLeft (LIDS, \
0x10), PARM) /* \_SB_.PCI0.GFX0.PARM */ + Add (PARM, \
0x00010000, PARM) /* \_SB_.PCI0.GFX0.PARM */ + Or (PARM, \
ShiftLeft (IBIA, 0x14), PARM) /* \_SB_.PCI0.GFX0.PARM */ + \
Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */ + Return \
(SUCC) /* \_SB_.PCI0.GFX0.SUCC */ + }
+
+ If (LEqual (GESF, 0x06))
+ {
+ Store (ITVF, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Or (PARM, ShiftLeft (ITVM, 0x04), PARM) /* \
\_SB_.PCI0.GFX0.PARM */ + Store (Zero, GESF) /* \
\_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \
\_SB_.PCI0.GFX0.SUCC */ + }
+
+ If (LEqual (GESF, 0x07))
+ {
+ Store (GIVD, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ XOr (PARM, One, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Or (PARM, ShiftLeft (GMFN, One), PARM) /* \
\_SB_.PCI0.GFX0.PARM */ + Or (PARM, 0x1000, PARM) /* \
\_SB_.PCI0.GFX0.PARM */ + If (IDMM)
+ {
+ Or (PARM, ShiftLeft (IDMS, 0x11), PARM) /* \
\_SB_.PCI0.GFX0.PARM */ + }
+ Else
+ {
+ Or (PARM, ShiftLeft (IDMS, 0x0D), PARM) /* \
\_SB_.PCI0.GFX0.PARM */ + }
+
+ Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, \
HVCO)), Subtract ( + CDVL, One))), 0x15), PARM, PARM) \
/* \_SB_.PCI0.GFX0.PARM */ + Store (One, GESF) /* \
\_SB_.PCI0.GFX0.GESF */ + Return (SUCC) /* \
\_SB_.PCI0.GFX0.SUCC */ + }
+
+ If (LEqual (GESF, 0x0A))
+ {
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ If (ISSC)
+ {
+ Or (PARM, 0x03, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ }
+
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */
+ }
+
+ Method (SBCB, 0, Serialized)
+ {
+ If (LEqual (GESF, Zero))
+ {
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Store (0xF77D, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, One))
+ {
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x03))
+ {
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x04))
+ {
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x05))
+ {
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x06))
+ {
+ Store (And (PARM, 0x0F), ITVF) /* \ITVF */
+ Store (ShiftRight (And (PARM, 0xF0), 0x04), ITVM) /* \
\ITVM */ + Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x07))
+ {
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x08))
+ {
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x09))
+ {
+ And (PARM, 0xFF, IBTT) /* \IBTT */
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x0A))
+ {
+ And (PARM, 0xFF, IPSC) /* \IPSC */
+ If (And (ShiftRight (PARM, 0x08), 0xFF))
+ {
+ And (ShiftRight (PARM, 0x08), 0xFF, IPAT) /* \IPAT \
*/ + Decrement (IPAT)
+ }
+
+ And (ShiftRight (PARM, 0x14), 0x07, IBIA) /* \IBIA */
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x0B))
+ {
+ And (ShiftRight (PARM, One), One, IF1E) /* \IF1E */
+ If (And (PARM, 0x0001E000))
+ {
+ And (ShiftRight (PARM, 0x0D), 0x0F, IDMS) /* \IDMS \
*/ + Store (Zero, IDMM) /* \IDMM */
+ }
+ Else
+ {
+ And (ShiftRight (PARM, 0x11), 0x0F, IDMS) /* \IDMS \
*/ + Store (One, IDMM) /* \IDMM */
+ }
+
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x10))
+ {
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x11))
+ {
+ Or (PARM, 0x0100, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x12))
+ {
+ If (And (PARM, One))
+ {
+ If (LEqual (ShiftRight (PARM, One), One))
+ {
+ Store (One, ISSC) /* \ISSC */
+ }
+ Else
+ {
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */
+ }
+ }
+ Else
+ {
+ Store (Zero, ISSC) /* \ISSC */
+ }
+
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GESF, 0x13))
+ {
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
+ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
+ }
+
+ If (LEqual (GEFC, 0x04))
+ {
+ Store (GBDA (), GXFC) /* \_SB_.PCI0.GFX0.GXFC */
+ }
+
+ If (LEqual (GEFC, 0x06))
+ {
+ Store (SBCB (), GXFC) /* \_SB_.PCI0.GFX0.GXFC */
+ }
+
+ Store (Zero, GEFC) /* \_SB_.PCI0.GFX0.GEFC */
+ Store (One, SCIS) /* \SCIS */
+ Store (Zero, GSSE) /* \_SB_.PCI0.GFX0.GSSE */
+ Store (Zero, SCIE) /* \_SB_.PCI0.GFX0.SCIE */
+ Return (Zero)
+ }
+
+ Method (PDRD, 0, NotSerialized)
+ {
+ If (LNot (DRDY))
+ {
+ Sleep (ASLP)
+ }
+
+ Return (LNot (DRDY))
+ }
+
+ Method (PSTS, 0, NotSerialized)
+ {
+ If (LGreater (CSTS, 0x02))
+ {
+ Sleep (ASLP)
+ }
+
+ Return (LEqual (CSTS, 0x03))
+ }
+
+ Method (GNOT, 2, NotSerialized)
+ {
+ If (PDRD ())
+ {
+ Return (One)
+ }
+
+ If (PSTS ())
+ {
+ Return (One)
+ }
+
+ Store (Arg0, CEVT) /* \_SB_.PCI0.GFX0.CEVT */
+ Store (0x03, CSTS) /* \_SB_.PCI0.GFX0.CSTS */
+ If (LAnd (LEqual (CHPD, Zero), LEqual (Arg1, Zero)))
+ {
+ If (LOr (LGreater (OSYS, 0x07D0), LLess (OSYS, 0x07D6)))
+ {
+ Notify (PCI0, Arg1)
+ }
+ Else
+ {
+ Notify (GFX0, Arg1)
+ }
+ }
+
+ Notify (GFX0, 0x80) // Status Change
+ If (LNot (PSTS ()))
+ {
+ Store (Zero, CEVT) /* \_SB_.PCI0.GFX0.CEVT */
+ }
+
+ Return (Zero)
+ }
+
+ Method (GHDS, 1, NotSerialized)
+ {
+ Store (Arg0, TIDX) /* \_SB_.PCI0.GFX0.TIDX */
+ Return (GNOT (One, Zero))
+ }
+
+ Method (GLID, 1, NotSerialized)
+ {
+ Store (Arg0, CLID) /* \_SB_.PCI0.GFX0.CLID */
+ Return (GNOT (0x02, Zero))
+ }
+
+ Method (GDCK, 1, NotSerialized)
+ {
+ Store (Arg0, CDCK) /* \_SB_.PCI0.GFX0.CDCK */
+ Return (GNOT (0x04, 0x80))
+ }
+
+ Method (PARD, 0, NotSerialized)
+ {
+ If (LNot (ARDY))
+ {
+ Sleep (ASLP)
+ }
+
+ Return (LNot (ARDY))
+ }
+
+ Method (AINT, 2, NotSerialized)
+ {
+ If (LNot (And (TCHE, ShiftLeft (One, Arg0))))
+ {
+ Return (One)
+ }
+
+ If (PARD ())
+ {
+ Return (One)
+ }
+
+ If (LEqual (Arg0, 0x02))
+ {
+ If (CPFM)
+ {
+ If (LEqual (CPFM, One))
+ {
+ Store (0x06, PFIT) /* \_SB_.PCI0.GFX0.PFIT */
+ }
+
+ If (LEqual (CPFM, 0x06))
+ {
+ Store (0x08, PFIT) /* \_SB_.PCI0.GFX0.PFIT */
+ }
+
+ If (LEqual (CPFM, 0x08))
+ {
+ Store (One, PFIT) /* \_SB_.PCI0.GFX0.PFIT */
+ }
+ }
+ Else
+ {
+ XOr (PFIT, 0x07, PFIT) /* \_SB_.PCI0.GFX0.PFIT */
+ }
+
+ Or (PFIT, 0x80000000, PFIT) /* \_SB_.PCI0.GFX0.PFIT */
+ Store (0x04, ASLC) /* \_SB_.PCI0.GFX0.ASLC */
+ }
+ Else
+ {
+ If (LEqual (Arg0, One))
+ {
+ Store (Divide (Multiply (Arg1, 0xFF), 0x64, ), BCLP) /* \
\_SB_.PCI0.GFX0.BCLP */ + Or (BCLP, 0x80000000, BCLP) /* \
\_SB_.PCI0.GFX0.BCLP */ + Store (0x02, ASLC) /* \
\_SB_.PCI0.GFX0.ASLC */ + }
+ Else
+ {
+ If (LEqual (Arg0, Zero))
+ {
+ Store (Arg1, ALSI) /* \_SB_.PCI0.GFX0.ALSI */
+ Store (One, ASLC) /* \_SB_.PCI0.GFX0.ASLC */
+ }
+ Else
+ {
+ Return (One)
+ }
+ }
+ }
+
+ Store (Zero, LBPC) /* \_SB_.PCI0.GFX0.LBPC */
+ Return (Zero)
+ }
+ }
+
+ Scope (\)
+ {
+ OperationRegion (IO_T, SystemIO, 0x0800, 0x10)
+ Field (IO_T, ByteAcc, NoLock, Preserve)
+ {
+ Offset (0x08),
+ TRP0, 8
+ }
+
+ OperationRegion (PMIO, SystemIO, 0x1000, 0x80)
+ Field (PMIO, ByteAcc, NoLock, Preserve)
+ {
+ Offset (0x2A),
+ Offset (0x2B),
+ , 2,
+ ACPW, 1,
+ Offset (0x42),
+ , 1,
+ GPEC, 1,
+ Offset (0x64),
+ , 9,
+ SCIS, 1,
+ Offset (0x66)
+ }
+
+ OperationRegion (GPIO, SystemIO, 0x1180, 0x3C)
+ Field (GPIO, ByteAcc, NoLock, Preserve)
+ {
+ GU00, 8,
+ GU01, 8,
+ GU02, 8,
+ GU03, 8,
+ GIO0, 8,
+ GIO1, 8,
+ GIO2, 8,
+ GIO3, 8,
+ Offset (0x0C),
+ GL00, 8,
+ GL01, 8,
+ GL02, 8,
+ , 3,
+ GP27, 1,
+ GP28, 1,
+ Offset (0x10),
+ Offset (0x18),
+ GB00, 8,
+ GB01, 8,
+ GB02, 8,
+ GB03, 8,
+ Offset (0x2C),
+ GIV0, 8,
+ , 3,
+ LPOL, 1,
+ Offset (0x2E),
+ GIV2, 8,
+ GIV3, 8,
+ GU04, 8,
+ GU05, 8,
+ GU06, 8,
+ GU07, 8,
+ GIO4, 8,
+ GIO5, 8,
+ GIO6, 8,
+ GIO7, 8,
+ , 5,
+ GP37, 1,
+ Offset (0x39),
+ GL05, 8,
+ GL06, 8,
+ GL07, 8
+ }
+
+ OperationRegion (RCRB, SystemMemory, 0xFED1C000, 0x4000)
+ Field (RCRB, DWordAcc, Lock, Preserve)
+ {
+ Offset (0x1000),
+ Offset (0x3000),
+ Offset (0x3404),
+ HPAS, 2,
+ , 5,
+ HPAE, 1,
+ Offset (0x3418),
+ , 1,
+ PATD, 1,
+ SATD, 1,
+ SMBD, 1,
+ HDAD, 1,
+ Offset (0x341A),
+ RP1D, 1,
+ RP2D, 1,
+ RP3D, 1,
+ RP4D, 1,
+ RP5D, 1,
+ RP6D, 1
+ }
+
+ Name (_S0, Package (0x03) // _S0_: S0 System State
+ {
+ Zero,
+ Zero,
+ Zero
+ })
+ Name (_S3, Package (0x03) // _S3_: S3 System State
+ {
+ 0x05,
+ 0x05,
+ Zero
+ })
+ Name (_S4, Package (0x03) // _S4_: S4 System State
+ {
+ 0x06,
+ 0x06,
+ Zero
+ })
+ Name (_S5, Package (0x03) // _S5_: S5 System State
+ {
+ 0x07,
+ 0x07,
+ Zero
+ })
+ Method (GETP, 1, Serialized)
+ {
+ If (LEqual (And (Arg0, 0x09), Zero))
+ {
+ Return (0xFFFFFFFF)
+ }
+
+ If (LEqual (And (Arg0, 0x09), 0x08))
+ {
+ Return (0x0384)
+ }
+
+ ShiftRight (And (Arg0, 0x0300), 0x08, Local0)
+ ShiftRight (And (Arg0, 0x3000), 0x0C, Local1)
+ Return (Multiply (0x1E, Subtract (0x09, Add (Local0, Local1))
+ ))
+ }
+
+ Method (GDMA, 5, Serialized)
+ {
+ If (Arg0)
+ {
+ If (LAnd (Arg1, Arg4))
+ {
+ Return (0x14)
+ }
+
+ If (LAnd (Arg2, Arg4))
+ {
+ Return (Multiply (Subtract (0x04, Arg3), 0x0F))
+ }
+
+ Return (Multiply (Subtract (0x04, Arg3), 0x1E))
+ }
+
+ Return (0xFFFFFFFF)
+ }
+
+ Method (GETT, 1, Serialized)
+ {
+ Return (Multiply (0x1E, Subtract (0x09, Add (And (ShiftRight \
(Arg0, 0x02 + ), 0x03), And (Arg0, 0x03)))))
+ }
+
+ Method (GETF, 3, Serialized)
+ {
+ Name (TMPF, Zero)
+ If (Arg0)
+ {
+ Or (TMPF, One, TMPF) /* \GETF.TMPF */
+ }
+
+ If (And (Arg2, 0x02))
+ {
+ Or (TMPF, 0x02, TMPF) /* \GETF.TMPF */
+ }
+
+ If (Arg1)
+ {
+ Or (TMPF, 0x04, TMPF) /* \GETF.TMPF */
+ }
+
+ If (And (Arg2, 0x20))
+ {
+ Or (TMPF, 0x08, TMPF) /* \GETF.TMPF */
+ }
+
+ If (And (Arg2, 0x4000))
+ {
+ Or (TMPF, 0x10, TMPF) /* \GETF.TMPF */
+ }
+
+ Return (TMPF) /* \GETF.TMPF */
+ }
+
+ Method (SETP, 3, Serialized)
+ {
+ If (LGreater (Arg0, 0xF0))
+ {
+ Return (0x08)
+ }
+ Else
+ {
+ If (And (Arg1, 0x02))
+ {
+ If (LAnd (LLessEqual (Arg0, 0x78), And (Arg2, 0x02)))
+ {
+ Return (0x2301)
+ }
+
+ If (LAnd (LLessEqual (Arg0, 0xB4), And (Arg2, One)))
+ {
+ Return (0x2101)
+ }
+ }
+
+ Return (0x1001)
+ }
+ }
+
+ Method (SDMA, 1, Serialized)
+ {
+ If (LLessEqual (Arg0, 0x14))
+ {
+ Return (One)
+ }
+
+ If (LLessEqual (Arg0, 0x1E))
+ {
+ Return (0x02)
+ }
+
+ If (LLessEqual (Arg0, 0x2D))
+ {
+ Return (One)
+ }
+
+ If (LLessEqual (Arg0, 0x3C))
+ {
+ Return (0x02)
+ }
+
+ If (LLessEqual (Arg0, 0x5A))
+ {
+ Return (One)
+ }
+
+ Return (Zero)
+ }
+
+ Method (SETT, 3, Serialized)
+ {
+ If (And (Arg1, 0x02))
+ {
+ If (LAnd (LLessEqual (Arg0, 0x78), And (Arg2, 0x02)))
+ {
+ Return (0x0B)
+ }
+
+ If (LAnd (LLessEqual (Arg0, 0xB4), And (Arg2, One)))
+ {
+ Return (0x09)
+ }
+ }
+
+ Return (0x04)
+ }
+ }
+
+ Device (HDEF)
+ {
+ Name (_ADR, 0x001B0000) // _ADR: Address
+ OperationRegion (HDAR, PCI_Config, 0x4C, 0x10)
+ Field (HDAR, WordAcc, NoLock, Preserve)
+ {
+ DCKA, 1,
+ Offset (0x01),
+ DCKM, 1,
+ , 6,
+ DCKS, 1,
+ Offset (0x08),
+ , 15,
+ PMES, 1
+ }
+
+ Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
+ {
+ 0x0D,
+ 0x03
+ })
+ }
+
+ Device (RP01)
+ {
+ Name (_ADR, 0x001C0000) // _ADR: Address
+ OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
+ Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
+ {
+ Offset (0x12),
+ , 13,
+ LASX, 1,
+ Offset (0x1A),
+ ABPX, 1,
+ , 2,
+ PDCX, 1,
+ , 2,
+ PDSX, 1,
+ Offset (0x1B),
+ LSCX, 1,
+ Offset (0x20),
+ Offset (0x22),
+ PSPX, 1,
+ Offset (0x9C),
+ , 30,
+ HPSX, 1,
+ PMSX, 1
+ }
+
+ Device (PXSX)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ }
+
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ If (GPIC)
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ Zero,
+ 0x10
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ Zero,
+ 0x11
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ Zero,
+ 0x12
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ Zero,
+ 0x13
+ }
+ })
+ }
+ Else
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ ^^LPCB.LNKA,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ ^^LPCB.LNKB,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ ^^LPCB.LNKC,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ ^^LPCB.LNKD,
+ Zero
+ }
+ })
+ }
+ }
+ }
+
+ Device (RP02)
+ {
+ Name (_ADR, 0x001C0001) // _ADR: Address
+ OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
+ Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
+ {
+ Offset (0x12),
+ , 13,
+ LASX, 1,
+ Offset (0x1A),
+ ABPX, 1,
+ , 2,
+ PDCX, 1,
+ , 2,
+ PDSX, 1,
+ Offset (0x1B),
+ LSCX, 1,
+ Offset (0x20),
+ Offset (0x22),
+ PSPX, 1,
+ Offset (0x9C),
+ , 30,
+ HPSX, 1,
+ PMSX, 1
+ }
+
+ Device (PXSX)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ }
+
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ If (GPIC)
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ Zero,
+ 0x11
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ Zero,
+ 0x12
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ Zero,
+ 0x13
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ Zero,
+ 0x10
+ }
+ })
+ }
+ Else
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ ^^LPCB.LNKB,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ ^^LPCB.LNKC,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ ^^LPCB.LNKD,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ ^^LPCB.LNKA,
+ Zero
+ }
+ })
+ }
+ }
+ }
+
+ Device (RP03)
+ {
+ Name (_ADR, 0x001C0002) // _ADR: Address
+ OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
+ Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
+ {
+ Offset (0x12),
+ , 13,
+ LASX, 1,
+ Offset (0x1A),
+ ABPX, 1,
+ , 2,
+ PDCX, 1,
+ , 2,
+ PDSX, 1,
+ Offset (0x1B),
+ LSCX, 1,
+ Offset (0x20),
+ Offset (0x22),
+ PSPX, 1,
+ Offset (0x9C),
+ , 30,
+ HPSX, 1,
+ PMSX, 1
+ }
+
+ Device (PXSX)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ }
+
+ Name (PXSX._RMV, One) // _RMV: Removal Status
+ Name (PXSX._PRW, Package (0x02) // _PRW: Power Resources for Wake
+ {
+ 0x09,
+ 0x03
+ })
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ If (GPIC)
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ Zero,
+ 0x12
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ Zero,
+ 0x13
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ Zero,
+ 0x10
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ Zero,
+ 0x11
+ }
+ })
+ }
+ Else
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ ^^LPCB.LNKC,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ ^^LPCB.LNKD,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ ^^LPCB.LNKA,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ ^^LPCB.LNKB,
+ Zero
+ }
+ })
+ }
+ }
+ }
+
+ Device (RP04)
+ {
+ Name (_ADR, 0x001C0003) // _ADR: Address
+ OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
+ Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
+ {
+ Offset (0x12),
+ , 13,
+ LASX, 1,
+ Offset (0x1A),
+ ABPX, 1,
+ , 2,
+ PDCX, 1,
+ , 2,
+ PDSX, 1,
+ Offset (0x1B),
+ LSCX, 1,
+ Offset (0x20),
+ Offset (0x22),
+ PSPX, 1,
+ Offset (0x9C),
+ , 30,
+ HPSX, 1,
+ PMSX, 1
+ }
+
+ Device (PXSX)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for \
Wake + {
+ If (WKLN)
+ {
+ Return (Package (0x02)
+ {
+ 0x09,
+ 0x03
+ })
+ }
+ Else
+ {
+ Return (Package (0x02)
+ {
+ 0x09,
+ Zero
+ })
+ }
+ }
+ }
+
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ If (GPIC)
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ Zero,
+ 0x13
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ Zero,
+ 0x10
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ Zero,
+ 0x11
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ Zero,
+ 0x12
+ }
+ })
+ }
+ Else
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ ^^LPCB.LNKD,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ ^^LPCB.LNKA,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ ^^LPCB.LNKB,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ ^^LPCB.LNKC,
+ Zero
+ }
+ })
+ }
+ }
+ }
+
+ Device (RP05)
+ {
+ Name (_ADR, 0x001C0004) // _ADR: Address
+ OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
+ Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
+ {
+ Offset (0x12),
+ , 13,
+ LASX, 1,
+ Offset (0x1A),
+ ABPX, 1,
+ , 2,
+ PDCX, 1,
+ , 2,
+ PDSX, 1,
+ Offset (0x1B),
+ LSCX, 1,
+ Offset (0x20),
+ Offset (0x22),
+ PSPX, 1,
+ Offset (0x9C),
+ , 30,
+ HPSX, 1,
+ PMSX, 1
+ }
+
+ Device (PXSX)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ }
+
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ If (GPIC)
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ Zero,
+ 0x10
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ Zero,
+ 0x11
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ Zero,
+ 0x12
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ Zero,
+ 0x13
+ }
+ })
+ }
+ Else
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ ^^LPCB.LNKA,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ ^^LPCB.LNKB,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ ^^LPCB.LNKC,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ ^^LPCB.LNKD,
+ Zero
+ }
+ })
+ }
+ }
+ }
+
+ Device (RP06)
+ {
+ Name (_ADR, 0x001C0005) // _ADR: Address
+ OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
+ Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
+ {
+ Offset (0x12),
+ , 13,
+ LASX, 1,
+ Offset (0x1A),
+ ABPX, 1,
+ , 2,
+ PDCX, 1,
+ , 2,
+ PDSX, 1,
+ Offset (0x1B),
+ LSCX, 1,
+ Offset (0x20),
+ Offset (0x22),
+ PSPX, 1,
+ Offset (0x9C),
+ , 30,
+ HPSX, 1,
+ PMSX, 1
+ }
+
+ Device (PXSX)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ }
+
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ If (GPIC)
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ Zero,
+ 0x11
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ Zero,
+ 0x12
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ Zero,
+ 0x13
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ Zero,
+ 0x10
+ }
+ })
+ }
+ Else
+ {
+ Return (Package (0x04)
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ ^^LPCB.LNKB,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ ^^LPCB.LNKC,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ ^^LPCB.LNKD,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ ^^LPCB.LNKA,
+ Zero
+ }
+ })
+ }
+ }
+ }
+
+ Device (USB1)
+ {
+ Name (_ADR, 0x001D0000) // _ADR: Address
+ OperationRegion (U1CS, PCI_Config, 0xC4, 0x04)
+ Field (U1CS, DWordAcc, NoLock, Preserve)
+ {
+ U1EN, 2
+ }
+
+ Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
+ {
+ 0x03,
+ 0x03
+ })
+ Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
+ {
+ If (Arg0)
+ {
+ Store (One, ACPW) /* \ACPW */
+ If (ACPW)
+ {
+ Store (0x03, U1EN) /* \_SB_.PCI0.USB1.U1EN */
+ }
+ }
+ Else
+ {
+ Store (Zero, U1EN) /* \_SB_.PCI0.USB1.U1EN */
+ }
+ }
+
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
+ {
+ Return (0x02)
+ }
+
+ Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
+ {
+ Return (0x02)
+ }
+ }
+
+ Device (USB2)
+ {
+ Name (_ADR, 0x001D0001) // _ADR: Address
+ OperationRegion (U2CS, PCI_Config, 0xC4, 0x04)
+ Field (U2CS, DWordAcc, NoLock, Preserve)
+ {
+ U2EN, 2
+ }
+
+ Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
+ {
+ 0x04,
+ 0x03
+ })
+ Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
+ {
+ If (Arg0)
+ {
+ Store (One, ACPW) /* \ACPW */
+ If (ACPW)
+ {
+ Store (One, U2EN) /* \_SB_.PCI0.USB2.U2EN */
+ }
+ }
+ Else
+ {
+ Store (Zero, U2EN) /* \_SB_.PCI0.USB2.U2EN */
+ }
+ }
+
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
+ {
+ Return (0x02)
+ }
+
+ Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
+ {
+ Return (0x02)
+ }
+ }
+
+ Device (USB3)
+ {
+ Name (_ADR, 0x001D0002) // _ADR: Address
+ OperationRegion (U2CS, PCI_Config, 0xC4, 0x04)
+ Field (U2CS, DWordAcc, NoLock, Preserve)
+ {
+ U3EN, 2
+ }
+
+ Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
+ {
+ 0x0C,
+ 0x03
+ })
+ Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
+ {
+ If (Arg0)
+ {
+ Store (One, ACPW) /* \ACPW */
+ If (ACPW)
+ {
+ Store (0x03, U3EN) /* \_SB_.PCI0.USB3.U3EN */
+ }
+ }
+ Else
+ {
+ Store (Zero, U3EN) /* \_SB_.PCI0.USB3.U3EN */
+ }
+ }
+
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
+ {
+ Return (0x02)
+ }
+
+ Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
+ {
+ Return (0x02)
+ }
+ }
+
+ Device (USB4)
+ {
+ Name (_ADR, 0x001A0000) // _ADR: Address
+ OperationRegion (U4CS, PCI_Config, 0xC4, 0x04)
+ Field (U4CS, DWordAcc, NoLock, Preserve)
+ {
+ U4EN, 2
+ }
+
+ Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
+ {
+ 0x0E,
+ 0x03
+ })
+ Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
+ {
+ If (Arg0)
+ {
+ Store (One, ACPW) /* \ACPW */
+ If (ACPW)
+ {
+ Store (0x03, U4EN) /* \_SB_.PCI0.USB4.U4EN */
+ }
+ }
+ Else
+ {
+ Store (Zero, U4EN) /* \_SB_.PCI0.USB4.U4EN */
+ }
+ }
+
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
+ {
+ Return (0x02)
+ }
+
+ Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
+ {
+ Return (0x02)
+ }
+ }
+
+ Device (USB5)
+ {
+ Name (_ADR, 0x001A0001) // _ADR: Address
+ OperationRegion (U5CS, PCI_Config, 0xC4, 0x04)
+ Field (U5CS, DWordAcc, NoLock, Preserve)
+ {
+ U5EN, 2
+ }
+
+ Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
+ {
+ If (Arg0)
+ {
+ Store (One, ACPW) /* \ACPW */
+ If (ACPW)
+ {
+ Store (0x03, U5EN) /* \_SB_.PCI0.USB5.U5EN */
+ }
+ }
+ Else
+ {
+ Store (Zero, U5EN) /* \_SB_.PCI0.USB5.U5EN */
+ }
+ }
+
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
+ {
+ Return (0x02)
+ }
+
+ Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
+ {
+ Return (0x02)
+ }
+ }
+
+ Device (EHC1)
+ {
+ Name (_ADR, 0x001D0007) // _ADR: Address
+ OperationRegion (U7CS, PCI_Config, 0x54, 0x04)
+ Field (U7CS, DWordAcc, NoLock, Preserve)
+ {
+ , 15,
+ PMES, 1
+ }
+
+ Device (HUB7)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Device (PRT1)
+ {
+ Name (_ADR, One) // _ADR: Address
+ }
+
+ Device (PRT2)
+ {
+ Name (_ADR, 0x02) // _ADR: Address
+ }
+
+ Device (PRT3)
+ {
+ Name (_ADR, 0x03) // _ADR: Address
+ }
+
+ Device (PRT4)
+ {
+ Name (_ADR, 0x04) // _ADR: Address
+ }
+
+ Device (PRT5)
+ {
+ Name (_ADR, 0x05) // _ADR: Address
+ }
+
+ Device (PRT6)
+ {
+ Name (_ADR, 0x06) // _ADR: Address
+ }
+ }
+
+ Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
+ {
+ 0x0D,
+ 0x03
+ })
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
+ {
+ Return (0x02)
+ }
+
+ Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
+ {
+ Return (0x02)
+ }
+ }
+
+ Device (EHC2)
+ {
+ Name (_ADR, 0x001A0007) // _ADR: Address
+ OperationRegion (UFCS, PCI_Config, 0x54, 0x04)
+ Field (UFCS, DWordAcc, NoLock, Preserve)
+ {
+ , 15,
+ PMES, 1
+ }
+
+ Device (HUB7)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Device (PRT1)
+ {
+ Name (_ADR, One) // _ADR: Address
+ }
+
+ Device (PRT2)
+ {
+ Name (_ADR, 0x02) // _ADR: Address
+ }
+
+ Device (PRT3)
+ {
+ Name (_ADR, 0x03) // _ADR: Address
+ }
+
+ Device (PRT4)
+ {
+ Name (_ADR, 0x04) // _ADR: Address
+ }
+ }
+
+ Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
+ {
+ 0x0D,
+ 0x03
+ })
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
+ {
+ Return (0x02)
+ }
+
+ Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
+ {
+ Return (0x02)
+ }
+ }
+
+ Device (PCIB)
+ {
+ Name (_ADR, 0x001E0000) // _ADR: Address
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ If (GPIC)
+ {
+ Return (Package (0x02)
+ {
+ Package (0x04)
+ {
+ 0x0006FFFF,
+ Zero,
+ Zero,
+ 0x16
+ },
+
+ Package (0x04)
+ {
+ 0x0006FFFF,
+ One,
+ Zero,
+ 0x17
+ }
+ })
+ }
+ Else
+ {
+ Return (Package (0x02)
+ {
+ Package (0x04)
+ {
+ 0x0006FFFF,
+ Zero,
+ ^^LPCB.LNKG,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0006FFFF,
+ One,
+ ^^LPCB.LNKH,
+ Zero
+ }
+ })
+ }
+ }
+ }
+
+ Device (LPCB)
+ {
+ Name (_ADR, 0x001F0000) // _ADR: Address
+ OperationRegion (LPC0, PCI_Config, 0x40, 0xC0)
+ Field (LPC0, AnyAcc, NoLock, Preserve)
+ {
+ Offset (0x20),
+ PARC, 8,
+ PBRC, 8,
+ PCRC, 8,
+ PDRC, 8,
+ Offset (0x28),
+ PERC, 8,
+ PFRC, 8,
+ PGRC, 8,
+ PHRC, 8,
+ Offset (0x40),
+ CMAR, 3,
+ , 1,
+ CMBR, 3,
+ Offset (0x41),
+ LPTR, 2,
+ Offset (0x42),
+ CMAD, 1,
+ CMBD, 1,
+ LPTD, 1,
+ FDDD, 1,
+ Offset (0x48),
+ IOR2, 16,
+ , 2,
+ LGRM, 6,
+ Offset (0xB0),
+ RAEN, 1,
+ , 13,
+ RCBA, 18
+ }
+
+ OperationRegion (SMI0, SystemIO, 0x0000FE00, 0x00000002)
+ Field (SMI0, AnyAcc, NoLock, Preserve)
+ {
+ SMIC, 8
+ }
+
+ OperationRegion (SMI1, SystemMemory, 0xBF6E2EBD, 0x00000090)
+ Field (SMI1, AnyAcc, NoLock, Preserve)
+ {
+ BCMD, 8,
+ DID, 32,
+ INFO, 1024
+ }
+
+ Field (SMI1, AnyAcc, NoLock, Preserve)
+ {
+ AccessAs (ByteAcc, 0x00),
+ Offset (0x05),
+ INF, 8,
+ INF1, 32
+ }
+
+ Mutex (PSMX, 0x00)
+ Method (PHSS, 1, NotSerialized)
+ {
+ Acquire (PSMX, 0xFFFF)
+ Store (0x80, BCMD) /* \_SB_.PCI0.LPCB.BCMD */
+ Store (Arg0, DID) /* \_SB_.PCI0.LPCB.DID_ */
+ Store (Zero, SMIC) /* \_SB_.PCI0.LPCB.SMIC */
+ Release (PSMX)
+ }
+
+ Device (LNKA)
+ {
+ Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID
+ Method (_DIS, 0, Serialized) // _DIS: Disable Device
+ {
+ Store (0x80, PARC) /* \_SB_.PCI0.LPCB.PARC */
+ }
+
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings + {
+ IRQ (Level, ActiveLow, Shared, )
+ {1,3,4,5,6,7,10,12,14,15}
+ })
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ Name (RTLA, ResourceTemplate ()
+ {
+ IRQ (Level, ActiveLow, Shared, )
+ {}
+ })
+ CreateWordField (RTLA, One, IRQ0)
+ Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKA._CRS.IRQ0 */
+ ShiftLeft (One, And (PARC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKA._CRS.IRQ0 */ + Return (RTLA) /* \
\_SB_.PCI0.LPCB.LNKA._CRS.RTLA */ + }
+
+ Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
+ {
+ CreateWordField (Arg0, One, IRQ0)
+ FindSetRightBit (IRQ0, Local0)
+ Decrement (Local0)
+ Store (Local0, PARC) /* \_SB_.PCI0.LPCB.PARC */
+ }
+
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ If (And (PARC, 0x80))
+ {
+ Return (0x09)
+ }
+ Else
+ {
+ Return (0x0B)
+ }
+ }
+ }
+
+ Device (LNKB)
+ {
+ Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID
+ Method (_DIS, 0, Serialized) // _DIS: Disable Device
+ {
+ Store (0x80, PBRC) /* \_SB_.PCI0.LPCB.PBRC */
+ }
+
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings + {
+ IRQ (Level, ActiveLow, Shared, )
+ {1,3,4,5,6,7,11,12,14,15}
+ })
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ Name (RTLB, ResourceTemplate ()
+ {
+ IRQ (Level, ActiveLow, Shared, )
+ {}
+ })
+ CreateWordField (RTLB, One, IRQ0)
+ Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKB._CRS.IRQ0 */
+ ShiftLeft (One, And (PBRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKB._CRS.IRQ0 */ + Return (RTLB) /* \
\_SB_.PCI0.LPCB.LNKB._CRS.RTLB */ + }
+
+ Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
+ {
+ CreateWordField (Arg0, One, IRQ0)
+ FindSetRightBit (IRQ0, Local0)
+ Decrement (Local0)
+ Store (Local0, PBRC) /* \_SB_.PCI0.LPCB.PBRC */
+ }
+
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ If (And (PBRC, 0x80))
+ {
+ Return (0x09)
+ }
+ Else
+ {
+ Return (0x0B)
+ }
+ }
+ }
+
+ Device (LNKC)
+ {
+ Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID
+ Method (_DIS, 0, Serialized) // _DIS: Disable Device
+ {
+ Store (0x80, PCRC) /* \_SB_.PCI0.LPCB.PCRC */
+ }
+
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings + {
+ IRQ (Level, ActiveLow, Shared, )
+ {1,3,4,5,6,7,10,12,14,15}
+ })
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ Name (RTLC, ResourceTemplate ()
+ {
+ IRQ (Level, ActiveLow, Shared, )
+ {}
+ })
+ CreateWordField (RTLC, One, IRQ0)
+ Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKC._CRS.IRQ0 */
+ ShiftLeft (One, And (PCRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKC._CRS.IRQ0 */ + Return (RTLC) /* \
\_SB_.PCI0.LPCB.LNKC._CRS.RTLC */ + }
+
+ Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
+ {
+ CreateWordField (Arg0, One, IRQ0)
+ FindSetRightBit (IRQ0, Local0)
+ Decrement (Local0)
+ Store (Local0, PCRC) /* \_SB_.PCI0.LPCB.PCRC */
+ }
+
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ If (And (PCRC, 0x80))
+ {
+ Return (0x09)
+ }
+ Else
+ {
+ Return (0x0B)
+ }
+ }
+ }
+
+ Device (LNKD)
+ {
+ Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID
+ Method (_DIS, 0, Serialized) // _DIS: Disable Device
+ {
+ Store (0x80, PDRC) /* \_SB_.PCI0.LPCB.PDRC */
+ }
+
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings + {
+ IRQ (Level, ActiveLow, Shared, )
+ {1,3,4,5,6,7,11,12,14,15}
+ })
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ Name (RTLD, ResourceTemplate ()
+ {
+ IRQ (Level, ActiveLow, Shared, )
+ {}
+ })
+ CreateWordField (RTLD, One, IRQ0)
+ Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKD._CRS.IRQ0 */
+ ShiftLeft (One, And (PDRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKD._CRS.IRQ0 */ + Return (RTLD) /* \
\_SB_.PCI0.LPCB.LNKD._CRS.RTLD */ + }
+
+ Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
+ {
+ CreateWordField (Arg0, One, IRQ0)
+ FindSetRightBit (IRQ0, Local0)
+ Decrement (Local0)
+ Store (Local0, PDRC) /* \_SB_.PCI0.LPCB.PDRC */
+ }
+
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ If (And (PDRC, 0x80))
+ {
+ Return (0x09)
+ }
+ Else
+ {
+ Return (0x0B)
+ }
+ }
+ }
+
+ Device (LNKE)
+ {
+ Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID
+ Method (_DIS, 0, Serialized) // _DIS: Disable Device
+ {
+ Store (0x80, PERC) /* \_SB_.PCI0.LPCB.PERC */
+ }
+
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings + {
+ IRQ (Level, ActiveLow, Shared, )
+ {1,3,4,5,6,7,10,12,14,15}
+ })
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ Name (RTLE, ResourceTemplate ()
+ {
+ IRQ (Level, ActiveLow, Shared, )
+ {}
+ })
+ CreateWordField (RTLE, One, IRQ0)
+ Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKE._CRS.IRQ0 */
+ ShiftLeft (One, And (PERC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKE._CRS.IRQ0 */ + Return (RTLE) /* \
\_SB_.PCI0.LPCB.LNKE._CRS.RTLE */ + }
+
+ Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
+ {
+ CreateWordField (Arg0, One, IRQ0)
+ FindSetRightBit (IRQ0, Local0)
+ Decrement (Local0)
+ Store (Local0, PERC) /* \_SB_.PCI0.LPCB.PERC */
+ }
+
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ If (And (PERC, 0x80))
+ {
+ Return (0x09)
+ }
+ Else
+ {
+ Return (0x0B)
+ }
+ }
+ }
+
+ Device (LNKF)
+ {
+ Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID
+ Method (_DIS, 0, Serialized) // _DIS: Disable Device
+ {
+ Store (0x80, PFRC) /* \_SB_.PCI0.LPCB.PFRC */
+ }
+
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings + {
+ IRQ (Level, ActiveLow, Shared, )
+ {1,3,4,5,6,7,11,12,14,15}
+ })
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ Name (RTLF, ResourceTemplate ()
+ {
+ IRQ (Level, ActiveLow, Shared, )
+ {}
+ })
+ CreateWordField (RTLF, One, IRQ0)
+ Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKF._CRS.IRQ0 */
+ ShiftLeft (One, And (PFRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKF._CRS.IRQ0 */ + Return (RTLF) /* \
\_SB_.PCI0.LPCB.LNKF._CRS.RTLF */ + }
+
+ Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
+ {
+ CreateWordField (Arg0, One, IRQ0)
+ FindSetRightBit (IRQ0, Local0)
+ Decrement (Local0)
+ Store (Local0, PFRC) /* \_SB_.PCI0.LPCB.PFRC */
+ }
+
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ If (And (PFRC, 0x80))
+ {
+ Return (0x09)
+ }
+ Else
+ {
+ Return (0x0B)
+ }
+ }
+ }
+
+ Device (LNKG)
+ {
+ Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID
+ Method (_DIS, 0, Serialized) // _DIS: Disable Device
+ {
+ Store (0x80, PGRC) /* \_SB_.PCI0.LPCB.PGRC */
+ }
+
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings + {
+ IRQ (Level, ActiveLow, Shared, )
+ {1,3,4,5,6,7,10,12,14,15}
+ })
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ Name (RTLG, ResourceTemplate ()
+ {
+ IRQ (Level, ActiveLow, Shared, )
+ {}
+ })
+ CreateWordField (RTLG, One, IRQ0)
+ Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKG._CRS.IRQ0 */
+ ShiftLeft (One, And (PGRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKG._CRS.IRQ0 */ + Return (RTLG) /* \
\_SB_.PCI0.LPCB.LNKG._CRS.RTLG */ + }
+
+ Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
+ {
+ CreateWordField (Arg0, One, IRQ0)
+ FindSetRightBit (IRQ0, Local0)
+ Decrement (Local0)
+ Store (Local0, PGRC) /* \_SB_.PCI0.LPCB.PGRC */
+ }
+
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ If (And (PGRC, 0x80))
+ {
+ Return (0x09)
+ }
+ Else
+ {
+ Return (0x0B)
+ }
+ }
+ }
+
+ Device (LNKH)
+ {
+ Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) \
// _HID: Hardware ID + Name (_UID, 0x08) // _UID: Unique ID
+ Method (_DIS, 0, Serialized) // _DIS: Disable Device
+ {
+ Store (0x80, PHRC) /* \_SB_.PCI0.LPCB.PHRC */
+ }
+
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource \
Settings + {
+ IRQ (Level, ActiveLow, Shared, )
+ {1,3,4,5,6,7,11,12,14,15}
+ })
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ Name (RTLH, ResourceTemplate ()
+ {
+ IRQ (Level, ActiveLow, Shared, )
+ {}
+ })
+ CreateWordField (RTLH, One, IRQ0)
+ Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKH._CRS.IRQ0 */
+ ShiftLeft (One, And (PHRC, 0x0F), IRQ0) /* \
\_SB_.PCI0.LPCB.LNKH._CRS.IRQ0 */ + Return (RTLH) /* \
\_SB_.PCI0.LPCB.LNKH._CRS.RTLH */ + }
+
+ Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
+ {
+ CreateWordField (Arg0, One, IRQ0)
+ FindSetRightBit (IRQ0, Local0)
+ Decrement (Local0)
+ Store (Local0, PHRC) /* \_SB_.PCI0.LPCB.PHRC */
+ }
+
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ If (And (PHRC, 0x80))
+ {
+ Return (0x09)
+ }
+ Else
+ {
+ Return (0x0B)
+ }
+ }
+ }
+
+ Device (DMAC)
+ {
+ Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) \
// _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: \
Current Resource Settings + {
+ IO (Decode16,
+ 0x0000, // Range Minimum
+ 0x0000, // Range Maximum
+ 0x01, // Alignment
+ 0x20, // Length
+ )
+ IO (Decode16,
+ 0x0081, // Range Minimum
+ 0x0081, // Range Maximum
+ 0x01, // Alignment
+ 0x11, // Length
+ )
+ IO (Decode16,
+ 0x0093, // Range Minimum
+ 0x0093, // Range Maximum
+ 0x01, // Alignment
+ 0x0D, // Length
+ )
+ IO (Decode16,
+ 0x00C0, // Range Minimum
+ 0x00C0, // Range Maximum
+ 0x01, // Alignment
+ 0x20, // Length
+ )
+ DMA (Compatibility, NotBusMaster, Transfer8_16, )
+ {4}
+ })
+ }
+
+ Device (FWHD)
+ {
+ Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub \
Device */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () \
// _CRS: Current Resource Settings + {
+ Memory32Fixed (ReadOnly,
+ 0xFF000000, // Address Base
+ 0x01000000, // Address Length
+ )
+ })
+ }
+
+ Device (HPET)
+ {
+ Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // \
_HID: Hardware ID + Name (_CID, EisaId ("PNP0C01") /* System Board \
*/) // _CID: Compatible ID + Name (BUF0, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadOnly,
+ 0xFED00000, // Address Base
+ 0x00000400, // Address Length
+ _Y14)
+ })
+ Method (_STA, 0, NotSerialized) // _STA: Status
+ {
+ If (LGreaterEqual (OSYS, 0x07D1))
+ {
+ If (HPAE)
+ {
+ Return (0x0F)
+ }
+ }
+ Else
+ {
+ If (HPAE)
+ {
+ Return (0x0B)
+ }
+ }
+
+ Return (Zero)
+ }
+
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
+ {
+ If (HPAE)
+ {
+ CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y14._BAS, \
HPT0) // _BAS: Base Address + If (LEqual (HPAS, One))
+ {
+ Store (0xFED01000, HPT0) /* \
\_SB_.PCI0.LPCB.HPET._CRS.HPT0 */ + }
+
+ If (LEqual (HPAS, 0x02))
+ {
+ Store (0xFED02000, HPT0) /* \
\_SB_.PCI0.LPCB.HPET._CRS.HPT0 */ + }
+
+ If (LEqual (HPAS, 0x03))
+ {
+ Store (0xFED03000, HPT0) /* \
\_SB_.PCI0.LPCB.HPET._CRS.HPT0 */ + }
+ }
+
+ Return (BUF0) /* \_SB_.PCI0.LPCB.HPET.BUF0 */
+ }
+ }
+
+ Device (IPIC)
+ {
+ Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable \
Interrupt Controller */) // _HID: Hardware ID + Name (_CRS, \
ResourceTemplate () // _CRS: Current Resource Settings + {
+ IO (Decode16,
+ 0x0020, // Range Minimum
+ 0x0020, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x0024, // Range Minimum
+ 0x0024, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x0028, // Range Minimum
+ 0x0028, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x002C, // Range Minimum
+ 0x002C, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x0030, // Range Minimum
+ 0x0030, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x0034, // Range Minimum
+ 0x0034, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x0038, // Range Minimum
+ 0x0038, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x003C, // Range Minimum
+ 0x003C, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x00A0, // Range Minimum
+ 0x00A0, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x00A4, // Range Minimum
+ 0x00A4, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x00A8, // Range Minimum
+ 0x00A8, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x00AC, // Range Minimum
+ 0x00AC, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x00B0, // Range Minimum
+ 0x00B0, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x00B4, // Range Minimum
+ 0x00B4, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x00B8, // Range Minimum
+ 0x00B8, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x00BC, // Range Minimum
+ 0x00BC, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x04D0, // Range Minimum
+ 0x04D0, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IRQNoFlags ()
+ {2}
+ })
+ }
+
+ Device (MATH)
+ {
+ Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point \
Processing Unit */) // _HID: Hardware ID + Name (_CRS, \
ResourceTemplate () // _CRS: Current Resource Settings + {
+ IO (Decode16,
+ 0x00F0, // Range Minimum
+ 0x00F0, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ IRQNoFlags ()
+ {13}
+ })
+ }
+
+ Device (LDRC)
+ {
+ Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) \
// _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings + {
+ IO (Decode16,
+ 0x002E, // Range Minimum
+ 0x002E, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x004E, // Range Minimum
+ 0x004E, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x0061, // Range Minimum
+ 0x0061, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ IO (Decode16,
+ 0x0063, // Range Minimum
+ 0x0063, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ IO (Decode16,
+ 0x0065, // Range Minimum
+ 0x0065, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ IO (Decode16,
+ 0x0067, // Range Minimum
+ 0x0067, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ IO (Decode16,
+ 0x0080, // Range Minimum
+ 0x0080, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ IO (Decode16,
+ 0x0092, // Range Minimum
+ 0x0092, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ IO (Decode16,
+ 0x00B2, // Range Minimum
+ 0x00B2, // Range Maximum
+ 0x01, // Alignment
+ 0x02, // Length
+ )
+ IO (Decode16,
+ 0x0680, // Range Minimum
+ 0x0680, // Range Maximum
+ 0x01, // Alignment
+ 0x20, // Length
+ )
+ IO (Decode16,
+ 0x0800, // Range Minimum
+ 0x0800, // Range Maximum
+ 0x01, // Alignment
+ 0x10, // Length
+ )
+ IO (Decode16,
+ 0x1000, // Range Minimum
+ 0x1000, // Range Maximum
+ 0x01, // Alignment
+ 0x80, // Length
+ )
+ IO (Decode16,
+ 0x1180, // Range Minimum
+ 0x1180, // Range Maximum
+ 0x01, // Alignment
+ 0x40, // Length
+ )
+ IO (Decode16,
+ 0xFE00, // Range Minimum
+ 0xFE00, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ IO (Decode16,
+ 0xFF00, // Range Minimum
+ 0xFF00, // Range Maximum
+ 0x01, // Alignment
+ 0x80, // Length
+ )
+ })
+ }
+
+ Device (RTC)
+ {
+ Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // \
_HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: \
Current Resource Settings + {
+ IO (Decode16,
+ 0x0070, // Range Minimum
+ 0x0070, // Range Maximum
+ 0x01, // Alignment
+ 0x08, // Length
+ )
+ IRQNoFlags ()
+ {8}
+ })
+ }
+
+ Device (TIMR)
+ {
+ Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // \
_HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: \
Current Resource Settings + {
+ IO (Decode16,
+ 0x0040, // Range Minimum
+ 0x0040, // Range Maximum
+ 0x01, // Alignment
+ 0x04, // Length
+ )
+ IO (Decode16,
+ 0x0050, // Range Minimum
+ 0x0050, // Range Maximum
+ 0x10, // Alignment
+ 0x04, // Length
+ )
+ IRQNoFlags ()
+ {0}
+ })
+ }
+
+ Device (ACAD)
+ {
+ Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: \
Hardware ID + Name (_PCL, Package (0x01) // _PCL: Power Consumer \
List + {
+ _SB
+ })
+ Method (_PSR, 0, NotSerialized) // _PSR: Power Source
+ {
+ Store (One, ACPW) /* \ACPW */
+ Return (ACPW) /* \ACPW */
+ }
+ }
+
+ Method (ECOK, 0, NotSerialized)
+ {
+ If (LEqual (^EC0.Z009, One))
+ {
+ Return (One)
+ }
+ Else
+ {
+ Return (Zero)
+ }
+ }
+
+ Device (EC0)
+ {
+ Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) \
// _HID: Hardware ID + Name (_GPE, 0x1C) // _GPE: General Purpose \
Events + Name (Z009, Zero)
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings + {
+ IO (Decode16,
+ 0x0062, // Range Minimum
+ 0x0062, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ IO (Decode16,
+ 0x0066, // Range Minimum
+ 0x0066, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ })
+ Method (_REG, 2, NotSerialized) // _REG: Region Availability
+ {
+ If (LEqual (Arg0, 0x03))
+ {
+ Store (Arg1, Z009) /* \_SB_.PCI0.LPCB.EC0_.Z009 */
+ If (CondRefOf (_OSI, Local0))
+ {
+ Store (Zero, BTDS) /* \_SB_.PCI0.LPCB.EC0_.BTDS */
+ If (_OSI ("Windows 2006"))
+ {
+ Store (One, BTDS) /* \_SB_.PCI0.LPCB.EC0_.BTDS \
*/ + }
+ }
+ }
+ }
+
+ OperationRegion (ERAM, EmbeddedControl, Zero, 0xFF)
+ Field (ERAM, ByteAcc, Lock, Preserve)
+ {
+ Offset (0x60),
+ SMPR, 8,
+ SMST, 8,
+ SMAD, 8,
+ SMCM, 8,
+ SMD0, 256,
+ BCNT, 8,
+ SMAA, 24,
+ Offset (0x90),
+ CHGM, 16,
+ CHGS, 16,
+ ENID, 8,
+ ENIB, 8,
+ ENDD, 8,
+ CHGV, 8,
+ CHGA, 16,
+ BAL0, 1,
+ BAL1, 1,
+ BAL2, 1,
+ BAL3, 1,
+ BBC0, 1,
+ BBC1, 1,
+ BBC2, 1,
+ BBC3, 1,
+ Offset (0x9C),
+ PHDD, 1,
+ IFDD, 1,
+ IODD, 1,
+ SHDD, 1,
+ S120, 1,
+ EFDD, 1,
+ CRTD, 1,
+ SPWR, 1,
+ SBTN, 1,
+ VIDO, 1,
+ VOLD, 1,
+ VOLU, 1,
+ MUTE, 1,
+ CONT, 1,
+ BRGT, 1,
+ HBTN, 1,
+ S4ST, 1,
+ SKEY, 1,
+ BKEY, 1,
+ TOUP, 1,
+ FNBN, 1,
+ LIDF, 1,
+ DIGM, 1,
+ UWAK, 1,
+ Offset (0xA0),
+ DKSP, 1,
+ DKIN, 1,
+ DKID, 1,
+ DKOK, 1,
+ Offset (0xA1),
+ DKPW, 1,
+ Offset (0xA2),
+ BTNS, 8,
+ S1LD, 1,
+ S3LD, 1,
+ VGAQ, 1,
+ PCMQ, 1,
+ PCMR, 1,
+ ADPT, 1,
+ SLLS, 1,
+ SYS7, 1,
+ PWAK, 1,
+ MWAK, 1,
+ LWAK, 1,
+ Offset (0xA5),
+ Offset (0xAA),
+ TCNL, 8,
+ TMPI, 8,
+ TMSD, 8,
+ FASN, 4,
+ FASU, 4,
+ PCVL, 4,
+ , 2,
+ SWTO, 1,
+ HWTO, 1,
+ MODE, 1,
+ FANS, 2,
+ INIT, 1,
+ FAN1, 1,
+ FAN2, 1,
+ FANT, 1,
+ SKNM, 1,
+ CTMP, 8,
+ LIDE, 1,
+ PMEE, 1,
+ PWBE, 1,
+ RNGE, 1,
+ BTWE, 1,
+ DCKE, 1,
+ Offset (0xB2),
+ SKTX, 8,
+ SKTB, 8,
+ SKTC, 8,
+ SKTA, 8,
+ Offset (0xB7),
+ HAPL, 2,
+ HAPR, 1,
+ Offset (0xB8),
+ BTDT, 1,
+ BTPW, 1,
+ BTDS, 1,
+ BTPS, 1,
+ BTSW, 1,
+ BTWK, 1,
+ BTLD, 1,
+ Offset (0xB9),
+ BRTS, 8,
+ CNTS, 8,
+ WLAT, 1,
+ BTAT, 1,
+ WLEX, 1,
+ BTEX, 1,
+ KLSW, 1,
+ WLOK, 1,
+ Offset (0xBC),
+ PTID, 8,
+ CPUT, 8,
+ EPKT, 8,
+ GHID, 8,
+ , 4,
+ BMF0, 3,
+ BTY0, 1,
+ BST0, 8,
+ BRC0, 16,
+ BSN0, 16,
+ BPV0, 16,
+ BDV0, 16,
+ BDC0, 16,
+ BFC0, 16,
+ GAU0, 8,
+ CYC0, 8,
+ BPC0, 16,
+ BAC0, 16,
+ BAT0, 8,
+ BTW0, 16,
+ BDN0, 8,
+ Offset (0xE0),
+ , 4,
+ BMF1, 3,
+ BTY1, 1,
+ BST1, 8,
+ BRC1, 16,
+ BSN1, 16,
+ BPV1, 16,
+ BDV1, 16,
+ BDC1, 16,
+ BFC1, 16,
+ GAU1, 8,
+ CYC1, 8,
+ BPC1, 16,
+ BAC1, 16,
+ BAT1, 8,
+ BTW1, 16
+ }
+
+ Method (_Q11, 0, NotSerialized) // _Qxx: EC Query
+ {
+ Store (0x87, P80H) /* \P80H */
+ If (IGDS)
+ {
+ ^^^GFX0.BRTN (0x87)
+ }
+ Else
+ {
+ Notify (^^^PEGP.VGA.LCD, 0x87) // Device-Specific
+ }
+ }
+
+ Method (_Q12, 0, NotSerialized) // _Qxx: EC Query
+ {
+ Store (0x86, P80H) /* \P80H */
+ If (IGDS)
+ {
+ ^^^GFX0.BRTN (0x86)
+ }
+ Else
+ {
+ Notify (^^^PEGP.VGA.LCD, 0x86) // Device-Specific
+ }
+ }
+
+ Method (_Q1C, 0, NotSerialized) // _Qxx: EC Query
+ {
+ Store ("=====QUERY_1C=====", Debug)
+ If (VIDO)
+ {
+ If (IGDS)
+ {
+ ^^^GFX0.GHDS (Zero)
+ }
+ Else
+ {
+ ^^^PEGP.VGA.DSSW ()
+ }
+
+ Store (Zero, VIDO) /* \_SB_.PCI0.LPCB.EC0_.VIDO */
+ }
+ }
+
+ Method (_Q1D, 0, NotSerialized) // _Qxx: EC Query
+ {
+ Store ("=====QUERY_1D=====", Debug)
+ PCLK ()
+ }
+
+ Method (_Q1E, 0, NotSerialized) // _Qxx: EC Query
+ {
+ Store ("=====QUERY_1E=====", Debug)
+ PCLK ()
+ }
+
+ Method (_Q25, 0, NotSerialized) // _Qxx: EC Query
+ {
+ Store ("=====QUERY_25=====", Debug)
+ Sleep (0x03E8)
+ Notify (^^BAT1, 0x81) // Information Change
+ Sleep (0x03E8)
+ Notify (^^BAT1, 0x80) // Status Change
+ }
+
+ Method (_Q34, 0, NotSerialized) // _Qxx: EC Query
+ {
+ Store ("=====QUERY_34=====", Debug)
+ If (BKEY)
+ {
+ PHSS (0x71)
+ Store (Zero, BKEY) /* \_SB_.PCI0.LPCB.EC0_.BKEY */
+ }
+ }
+
+ Method (_Q37, 0, NotSerialized) // _Qxx: EC Query
+ {
+ Store ("=====QUERY_37=====", Debug)
+ Notify (ACAD, 0x80) // Status Change
+ Sleep (0x03E8)
+ Notify (^^BAT1, 0x80) // Status Change
+ }
+
+ Method (_Q38, 0, NotSerialized) // _Qxx: EC Query
+ {
+ Store ("=====QUERY_38=====", Debug)
+ Notify (ACAD, 0x80) // Status Change
+ Sleep (0x03E8)
+ Notify (^^BAT1, 0x80) // Status Change
+ }
+
+ Method (_Q2D, 0, NotSerialized) // _Qxx: EC Query
+ {
+ Store ("=====QUERY_2D=====", Debug)
+ Store (Zero, DTSM) /* \DTSM */
+ TRAP (0x46)
+ }
+
+ Method (_Q2E, 0, NotSerialized) // _Qxx: EC Query
+ {
+ Store ("=====QUERY_2E=====", Debug)
+ Store (One, DTSM) /* \DTSM */
+ TRAP (0x46)
+ }
+
+ OperationRegion (CCLK, SystemIO, 0x1010, 0x04)
+ Field (CCLK, DWordAcc, NoLock, Preserve)
+ {
+ , 1,
+ DUTY, 3,
+ THEN, 1,
+ Offset (0x01),
+ FTT, 1,
+ , 8,
+ TSTS, 1
+ }
+
+ OperationRegion (ECRM, EmbeddedControl, Zero, 0xFF)
+ Field (ECRM, ByteAcc, Lock, Preserve)
+ {
+ Offset (0x94),
+ ERIB, 16,
+ ERBD, 8,
+ Offset (0xAC),
+ SDTM, 8,
+ FSSN, 4,
+ FANU, 4,
+ PTVL, 3,
+ , 4,
+ TTHR, 1,
+ Offset (0xBC),
+ PJID, 8,
+ Offset (0xBE),
+ Offset (0xF9),
+ RFRD, 16
+ }
+
+ Mutex (FAMX, 0x00)
+ Method (FANG, 1, NotSerialized)
+ {
+ Acquire (FAMX, 0xFFFF)
+ Store (Arg0, ERIB) /* \_SB_.PCI0.LPCB.EC0_.ERIB */
+ Store (ERBD, Local0)
+ Release (FAMX)
+ Return (Local0)
+ }
+
+ Method (FANW, 2, NotSerialized)
+ {
+ Acquire (FAMX, 0xFFFF)
+ Store (Arg0, ERIB) /* \_SB_.PCI0.LPCB.EC0_.ERIB */
+ Store (Arg1, ERBD) /* \_SB_.PCI0.LPCB.EC0_.ERBD */
+ Release (FAMX)
+ Return (Arg1)
+ }
+
+ Method (TUVR, 1, NotSerialized)
+ {
+ Return (0x03)
+ }
+
+ Method (THRO, 1, NotSerialized)
+ {
+ If (LEqual (Arg0, Zero))
+ {
+ Return (THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
+ }
+ Else
+ {
+ If (LEqual (Arg0, One))
+ {
+ Return (DUTY) /* \_SB_.PCI0.LPCB.EC0_.DUTY */
+ }
+ Else
+ {
+ If (LEqual (Arg0, 0x02))
+ {
+ Return (TTHR) /* \_SB_.PCI0.LPCB.EC0_.TTHR */
+ }
+ Else
+ {
+ Return (0xFF)
+ }
+ }
+ }
+ }
+
+ Method (CLCK, 1, NotSerialized)
+ {
+ If (LEqual (Arg0, Zero))
+ {
+ Store (Zero, THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
+ Store (Zero, FTT) /* \_SB_.PCI0.LPCB.EC0_.FTT_ */
+ }
+ Else
+ {
+ Store (Arg0, DUTY) /* \_SB_.PCI0.LPCB.EC0_.DUTY */
+ Store (One, THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
+ }
+
+ Return (THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
+ }
+
+ Method (PCLK, 0, NotSerialized)
+ {
+ Store (PTVL, Local0)
+ If (LEqual (Local0, Zero))
+ {
+ Store (Zero, THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
+ Store (Zero, FTT) /* \_SB_.PCI0.LPCB.EC0_.FTT_ */
+ }
+ Else
+ {
+ Decrement (Local0)
+ Store (Not (Local0), Local1)
+ And (Local1, 0x07, Local1)
+ Store (Local1, DUTY) /* \_SB_.PCI0.LPCB.EC0_.DUTY */
+ Store (One, THEN) /* \_SB_.PCI0.LPCB.EC0_.THEN */
+ }
+ }
+ }
+
+ Device (BAT1)
+ {
+ Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // \
_HID: Hardware ID + Name (_UID, One) // _UID: Unique ID
+ Name (_PCL, Package (0x01) // _PCL: Power Consumer List
+ {
+ _SB
+ })
+ Method (_STA, 0, NotSerialized) // _STA: Status
+ {
+ If (LAnd (ECOK (), LEqual (ECDY, Zero)))
+ {
+ If (^^EC0.BAL0)
+ {
+ Sleep (0x14)
+ Return (0x1F)
+ }
+ Else
+ {
+ Sleep (0x14)
+ Return (0x0F)
+ }
+ }
+ Else
+ {
+ Sleep (0x14)
+ Return (0x1F)
+ }
+ }
+
+ Method (_BIF, 0, NotSerialized) // _BIF: Battery Information
+ {
+ Name (STAT, Package (0x0D)
+ {
+ One,
+ 0x0FA0,
+ 0x0FA0,
+ One,
+ 0x2B5C,
+ 0x01A4,
+ 0x9C,
+ 0x0108,
+ 0x0EC4,
+ "PA3465U ",
+ "3658Q",
+ "Li-Ion",
+ "COMPAL "
+ })
+ If (LAnd (ECOK (), LEqual (ECDY, Zero)))
+ {
+ Store (^^EC0.BDN0, Local0)
+ If (LEqual (Local0, 0x08))
+ {
+ Store (0xB4, Index (STAT, 0x06))
+ Store ("PA3457U ", Index (STAT, 0x09))
+ }
+
+ If (LEqual (Local0, 0x20))
+ {
+ Store (0x0102, Index (STAT, 0x06))
+ Store ("PA3457U ", Index (STAT, 0x09))
+ }
+
+ Sleep (0x14)
+ Store (^^EC0.BDC0, BFC1) /* \BFC1 */
+ Sleep (0x14)
+ }
+ Else
+ {
+ Store ("Li-Ion", Index (STAT, 0x0B))
+ }
+
+ If (BFC1)
+ {
+ Divide (BFC1, 0x64, Local0, Local1)
+ Multiply (Local1, 0x64, Local1)
+ Store (Local1, BFC1) /* \BFC1 */
+ Store (Local1, Index (STAT, One))
+ Store (Local1, Index (STAT, 0x02))
+ }
+
+ Return (STAT) /* \_SB_.PCI0.LPCB.BAT1._BIF.STAT */
+ }
+
+ Method (_BST, 0, NotSerialized) // _BST: Battery Status
+ {
+ Name (PBST, Package (0x04)
+ {
+ Zero,
+ 0xFFFFFFFF,
+ 0xFFFFFFFF,
+ 0x2B5C
+ })
+ Store (0x2B5C, Local3)
+ If (LAnd (ECOK (), LEqual (ECDY, Zero)))
+ {
+ Sleep (0x14)
+ Store (^^EC0.BST0, BST1) /* \BST1 */
+ Sleep (0x14)
+ Store (^^EC0.GAU0, BGU1) /* \BGU1 */
+ Sleep (0x14)
+ }
+
+ If (BFC1)
+ {
+ Multiply (BGU1, BFC1, Local2)
+ Divide (Local2, 0x64, Local4, Local2)
+ }
+ Else
+ {
+ Multiply (BGU1, 0x28, Local2)
+ }
+
+ Store (BST1, Index (PBST, Zero))
+ Store (Zero, Index (PBST, One))
+ Store (Local2, Index (PBST, 0x02))
+ Store (Local3, Index (PBST, 0x03))
+ If (LGreater (ECDY, Zero))
+ {
+ Decrement (ECDY)
+ If (LEqual (ECDY, Zero))
+ {
+ Notify (BAT1, 0x80) // Status Change
+ }
+ }
+
+ Return (PBST) /* \_SB_.PCI0.LPCB.BAT1._BST.PBST */
+ }
+ }
+
+ Device (PS2K)
+ {
+ Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard \
(101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_CRS, \
ResourceTemplate () // _CRS: Current Resource Settings + {
+ IO (Decode16,
+ 0x0060, // Range Minimum
+ 0x0060, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ IO (Decode16,
+ 0x0064, // Range Minimum
+ 0x0064, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ IRQ (Edge, ActiveHigh, Exclusive, )
+ {1}
+ })
+ }
+
+ Device (PS2M)
+ {
+ Name (_HID, EisaId ("PNP0F13")) // _HID: Hardware ID
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource \
Settings + {
+ IRQ (Edge, ActiveHigh, Exclusive, )
+ {12}
+ })
+ }
+ }
+
+ Device (PATA)
+ {
+ Name (_ADR, 0x001F0001) // _ADR: Address
+ OperationRegion (PACS, PCI_Config, 0x40, 0xC0)
+ Field (PACS, DWordAcc, NoLock, Preserve)
+ {
+ PRIT, 16,
+ Offset (0x04),
+ PSIT, 4,
+ Offset (0x08),
+ SYNC, 4,
+ Offset (0x0A),
+ SDT0, 2,
+ , 2,
+ SDT1, 2,
+ Offset (0x14),
+ ICR0, 4,
+ ICR1, 4,
+ ICR2, 4,
+ ICR3, 4,
+ ICR4, 4,
+ ICR5, 4
+ }
+
+ Device (PRID)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode
+ {
+ Name (PBUF, Buffer (0x14)
+ {
+ /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \
0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \
0x00, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0x00
+ })
+ CreateDWordField (PBUF, Zero, PIO0)
+ CreateDWordField (PBUF, 0x04, DMA0)
+ CreateDWordField (PBUF, 0x08, PIO1)
+ CreateDWordField (PBUF, 0x0C, DMA1)
+ CreateDWordField (PBUF, 0x10, FLAG)
+ Store (GETP (PRIT), PIO0) /* \_SB_.PCI0.PATA.PRID._GTM.PIO0 \
*/ + Store (GDMA (And (SYNC, One), And (ICR3, One),
+ And (ICR0, One), SDT0, And (ICR1, One)), DMA0) /* \
\_SB_.PCI0.PATA.PRID._GTM.DMA0 */ + If (LEqual (DMA0, \
0xFFFFFFFF)) + {
+ Store (PIO0, DMA0) /* \_SB_.PCI0.PATA.PRID._GTM.DMA0 */
+ }
+
+ If (And (PRIT, 0x4000))
+ {
+ If (LEqual (And (PRIT, 0x90), 0x80))
+ {
+ Store (0x0384, PIO1) /* \
\_SB_.PCI0.PATA.PRID._GTM.PIO1 */ + }
+ Else
+ {
+ Store (GETT (PSIT), PIO1) /* \
\_SB_.PCI0.PATA.PRID._GTM.PIO1 */ + }
+ }
+ Else
+ {
+ Store (0xFFFFFFFF, PIO1) /* \
\_SB_.PCI0.PATA.PRID._GTM.PIO1 */ + }
+
+ Store (GDMA (And (SYNC, 0x02), And (ICR3, 0x02),
+ And (ICR0, 0x02), SDT1, And (ICR1, 0x02)), DMA1) /* \
\_SB_.PCI0.PATA.PRID._GTM.DMA1 */ + If (LEqual (DMA1, \
0xFFFFFFFF)) + {
+ Store (PIO1, DMA1) /* \_SB_.PCI0.PATA.PRID._GTM.DMA1 */
+ }
+
+ Store (GETF (And (SYNC, One), And (SYNC, 0x02),
+ PRIT), FLAG) /* \_SB_.PCI0.PATA.PRID._GTM.FLAG */
+ If (And (LEqual (PIO0, 0xFFFFFFFF), LEqual (DMA0, \
0xFFFFFFFF))) + {
+ Store (0x78, PIO0) /* \_SB_.PCI0.PATA.PRID._GTM.PIO0 */
+ Store (0x14, DMA0) /* \_SB_.PCI0.PATA.PRID._GTM.DMA0 */
+ Store (0x03, FLAG) /* \_SB_.PCI0.PATA.PRID._GTM.FLAG */
+ }
+
+ Return (PBUF) /* \_SB_.PCI0.PATA.PRID._GTM.PBUF */
+ }
+
+ Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode
+ {
+ CreateDWordField (Arg0, Zero, PIO0)
+ CreateDWordField (Arg0, 0x04, DMA0)
+ CreateDWordField (Arg0, 0x08, PIO1)
+ CreateDWordField (Arg0, 0x0C, DMA1)
+ CreateDWordField (Arg0, 0x10, FLAG)
+ If (LEqual (SizeOf (Arg1), 0x0200))
+ {
+ And (PRIT, 0xC0F0, PRIT) /* \_SB_.PCI0.PATA.PRIT */
+ And (SYNC, 0x02, SYNC) /* \_SB_.PCI0.PATA.SYNC */
+ Store (Zero, SDT0) /* \_SB_.PCI0.PATA.SDT0 */
+ And (ICR0, 0x02, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
+ And (ICR1, 0x02, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
+ And (ICR3, 0x02, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
+ And (ICR5, 0x02, ICR5) /* \_SB_.PCI0.PATA.ICR5 */
+ CreateWordField (Arg1, 0x62, W490)
+ CreateWordField (Arg1, 0x6A, W530)
+ CreateWordField (Arg1, 0x7E, W630)
+ CreateWordField (Arg1, 0x80, W640)
+ CreateWordField (Arg1, 0xB0, W880)
+ CreateWordField (Arg1, 0xBA, W930)
+ Or (PRIT, 0x8004, PRIT) /* \_SB_.PCI0.PATA.PRIT */
+ If (LAnd (And (FLAG, 0x02), And (W490, 0x0800)))
+ {
+ Or (PRIT, 0x02, PRIT) /* \_SB_.PCI0.PATA.PRIT */
+ }
+
+ Or (PRIT, SETP (PIO0, W530, W640), PRIT) /* \
\_SB_.PCI0.PATA.PRIT */ + If (And (FLAG, One))
+ {
+ Or (SYNC, One, SYNC) /* \_SB_.PCI0.PATA.SYNC */
+ Store (SDMA (DMA0), SDT0) /* \_SB_.PCI0.PATA.SDT0 */
+ If (LLess (DMA0, 0x1E))
+ {
+ Or (ICR3, One, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
+ }
+
+ If (LLess (DMA0, 0x3C))
+ {
+ Or (ICR0, One, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
+ }
+
+ If (And (W930, 0x2000))
+ {
+ Or (ICR1, One, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
+ }
+ }
+ }
+
+ If (LEqual (SizeOf (Arg2), 0x0200))
+ {
+ And (PRIT, 0xBF0F, PRIT) /* \_SB_.PCI0.PATA.PRIT */
+ Store (Zero, PSIT) /* \_SB_.PCI0.PATA.PSIT */
+ And (SYNC, One, SYNC) /* \_SB_.PCI0.PATA.SYNC */
+ Store (Zero, SDT1) /* \_SB_.PCI0.PATA.SDT1 */
+ And (ICR0, One, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
+ And (ICR1, One, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
+ And (ICR3, One, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
+ And (ICR5, One, ICR5) /* \_SB_.PCI0.PATA.ICR5 */
+ CreateWordField (Arg2, 0x62, W491)
+ CreateWordField (Arg2, 0x6A, W531)
+ CreateWordField (Arg2, 0x7E, W631)
+ CreateWordField (Arg2, 0x80, W641)
+ CreateWordField (Arg2, 0xB0, W881)
+ CreateWordField (Arg2, 0xBA, W931)
+ Or (PRIT, 0x8040, PRIT) /* \_SB_.PCI0.PATA.PRIT */
+ If (LAnd (And (FLAG, 0x08), And (W491, 0x0800)))
+ {
+ Or (PRIT, 0x20, PRIT) /* \_SB_.PCI0.PATA.PRIT */
+ }
+
+ If (And (FLAG, 0x10))
+ {
+ Or (PRIT, 0x4000, PRIT) /* \_SB_.PCI0.PATA.PRIT */
+ If (LGreater (PIO1, 0xF0))
+ {
+ Or (PRIT, 0x80, PRIT) /* \_SB_.PCI0.PATA.PRIT */
+ }
+ Else
+ {
+ Or (PRIT, 0x10, PRIT) /* \_SB_.PCI0.PATA.PRIT */
+ Store (SETT (PIO1, W531, W641), PSIT) /* \
\_SB_.PCI0.PATA.PSIT */ + }
+ }
+
+ If (And (FLAG, 0x04))
+ {
+ Or (SYNC, 0x02, SYNC) /* \_SB_.PCI0.PATA.SYNC */
+ Store (SDMA (DMA1), SDT1) /* \_SB_.PCI0.PATA.SDT1 */
+ If (LLess (DMA1, 0x1E))
+ {
+ Or (ICR3, 0x02, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
+ }
+
+ If (LLess (DMA1, 0x3C))
+ {
+ Or (ICR0, 0x02, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
+ }
+
+ If (And (W931, 0x2000))
+ {
+ Or (ICR1, 0x02, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
+ }
+ }
+ }
+ }
+
+ Device (P_D0)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
+ {
+ Name (PIB0, Buffer (0x0E)
+ {
+ /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, \
0xEF, 0x03, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, \
0xA0, 0xEF + })
+ CreateByteField (PIB0, One, PMD0)
+ CreateByteField (PIB0, 0x08, DMD0)
+ If (And (PRIT, 0x02))
+ {
+ If (LEqual (And (PRIT, 0x09), 0x08))
+ {
+ Store (0x08, PMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */ + }
+ Else
+ {
+ Store (0x0A, PMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */ + \
ShiftRight (And (PRIT, 0x0300), 0x08, Local0) + \
ShiftRight (And (PRIT, 0x3000), 0x0C, Local1) + \
Add (Local0, Local1, Local2) + If (LEqual (0x03, \
Local2)) + {
+ Store (0x0B, PMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */ + }
+
+ If (LEqual (0x05, Local2))
+ {
+ Store (0x0C, PMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */ + }
+ }
+ }
+ Else
+ {
+ Store (One, PMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */ + }
+
+ If (And (SYNC, One))
+ {
+ Store (Or (SDT0, 0x40), DMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */ + If (And \
(ICR1, One)) + {
+ If (And (ICR0, One))
+ {
+ Add (DMD0, 0x02, DMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */ + }
+
+ If (And (ICR3, One))
+ {
+ Store (0x45, DMD0) /* \
\_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */ + }
+ }
+ }
+ Else
+ {
+ Or (Subtract (And (PMD0, 0x07), 0x02), 0x20, DMD0) \
/* \_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */ + }
+
+ Return (PIB0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.PIB0 */
+ }
+ }
+
+ Device (P_D1)
+ {
+ Name (_ADR, One) // _ADR: Address
+ Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
+ {
+ Name (PIB1, Buffer (0x0E)
+ {
+ /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, \
0xEF, 0x03, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, \
0xB0, 0xEF + })
+ CreateByteField (PIB1, One, PMD1)
+ CreateByteField (PIB1, 0x08, DMD1)
+ If (And (PRIT, 0x20))
+ {
+ If (LEqual (And (PRIT, 0x90), 0x80))
+ {
+ Store (0x08, PMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */ + }
+ Else
+ {
+ Add (And (PSIT, 0x03), ShiftRight (And (PSIT, \
0x0C), + 0x02), Local0)
+ If (LEqual (0x05, Local0))
+ {
+ Store (0x0C, PMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */ + }
+ Else
+ {
+ If (LEqual (0x03, Local0))
+ {
+ Store (0x0B, PMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */ + }
+ Else
+ {
+ Store (0x0A, PMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */ + }
+ }
+ }
+ }
+ Else
+ {
+ Store (One, PMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */ + }
+
+ If (And (SYNC, 0x02))
+ {
+ Store (Or (SDT1, 0x40), DMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */ + If (And \
(ICR1, 0x02)) + {
+ If (And (ICR0, 0x02))
+ {
+ Add (DMD1, 0x02, DMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */ + }
+
+ If (And (ICR3, 0x02))
+ {
+ Store (0x45, DMD1) /* \
\_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */ + }
+ }
+ }
+ Else
+ {
+ Or (Subtract (And (PMD1, 0x07), 0x02), 0x20, DMD1) \
/* \_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */ + }
+
+ Return (PIB1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.PIB1 */
+ }
+ }
+ }
+ }
+
+ Device (SATA)
+ {
+ Name (_ADR, 0x001F0002) // _ADR: Address
+ OperationRegion (SACS, PCI_Config, 0x40, 0xC0)
+ Field (SACS, DWordAcc, NoLock, Preserve)
+ {
+ PRIT, 16,
+ SECT, 16,
+ PSIT, 4,
+ SSIT, 4,
+ Offset (0x08),
+ SYNC, 4,
+ Offset (0x0A),
+ SDT0, 2,
+ , 2,
+ SDT1, 2,
+ Offset (0x0B),
+ SDT2, 2,
+ , 2,
+ SDT3, 2,
+ Offset (0x14),
+ ICR0, 4,
+ ICR1, 4,
+ ICR2, 4,
+ ICR3, 4,
+ ICR4, 4,
+ ICR5, 4,
+ Offset (0x50),
+ MAPV, 2
+ }
+ }
+
+ Device (SBUS)
+ {
+ Name (_ADR, 0x001F0003) // _ADR: Address
+ OperationRegion (SMBP, PCI_Config, 0x40, 0xC0)
+ Field (SMBP, DWordAcc, NoLock, Preserve)
+ {
+ , 2,
+ I2CE, 1
+ }
+
+ OperationRegion (SMBI, SystemIO, 0x1C20, 0x10)
+ Field (SMBI, ByteAcc, NoLock, Preserve)
+ {
+ HSTS, 8,
+ Offset (0x02),
+ HCON, 8,
+ HCOM, 8,
+ TXSA, 8,
+ DAT0, 8,
+ DAT1, 8,
+ HBDR, 8,
+ PECR, 8,
+ RXSA, 8,
+ SDAT, 16
+ }
+
+ Method (SSXB, 2, Serialized)
+ {
+ If (STRT ())
+ {
+ Return (Zero)
+ }
+
+ Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
+ Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
+ Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
+ Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
+ If (COMP ())
+ {
+ Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Return (One)
+ }
+
+ Return (Zero)
+ }
+
+ Method (SRXB, 1, Serialized)
+ {
+ If (STRT ())
+ {
+ Return (0xFFFF)
+ }
+
+ Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
+ Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
+ Store (0x44, HCON) /* \_SB_.PCI0.SBUS.HCON */
+ If (COMP ())
+ {
+ Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
+ }
+
+ Return (0xFFFF)
+ }
+
+ Method (SWRB, 3, Serialized)
+ {
+ If (STRT ())
+ {
+ Return (Zero)
+ }
+
+ Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
+ Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
+ Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
+ Store (Arg2, DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
+ Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
+ If (COMP ())
+ {
+ Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Return (One)
+ }
+
+ Return (Zero)
+ }
+
+ Method (SRDB, 2, Serialized)
+ {
+ If (STRT ())
+ {
+ Return (0xFFFF)
+ }
+
+ Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
+ Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
+ Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
+ Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
+ If (COMP ())
+ {
+ Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
+ }
+
+ Return (0xFFFF)
+ }
+
+ Method (SWRW, 3, Serialized)
+ {
+ If (STRT ())
+ {
+ Return (Zero)
+ }
+
+ Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
+ Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
+ Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
+ And (Arg2, 0xFF, DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
+ And (ShiftRight (Arg2, 0x08), 0xFF, DAT1) /* \
\_SB_.PCI0.SBUS.DAT1 */ + Store (0x4C, HCON) /* \
\_SB_.PCI0.SBUS.HCON */ + If (COMP ())
+ {
+ Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Return (One)
+ }
+
+ Return (Zero)
+ }
+
+ Method (SRDW, 2, Serialized)
+ {
+ If (STRT ())
+ {
+ Return (0xFFFF)
+ }
+
+ Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
+ Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
+ Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
+ Store (0x4C, HCON) /* \_SB_.PCI0.SBUS.HCON */
+ If (COMP ())
+ {
+ Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Return (Or (ShiftLeft (DAT1, 0x08), DAT0))
+ }
+
+ Return (0xFFFFFFFF)
+ }
+
+ Method (SBLW, 4, Serialized)
+ {
+ If (STRT ())
+ {
+ Return (Zero)
+ }
+
+ Store (Arg3, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
+ Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
+ Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
+ Store (SizeOf (Arg2), DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
+ Store (Zero, Local1)
+ Store (DerefOf (Index (Arg2, Zero)), HBDR) /* \
\_SB_.PCI0.SBUS.HBDR */ + Store (0x54, HCON) /* \
\_SB_.PCI0.SBUS.HCON */ + While (LGreater (SizeOf (Arg2), Local1))
+ {
+ Store (0x0FA0, Local0)
+ While (LAnd (LNot (And (HSTS, 0x80)), Local0))
+ {
+ Decrement (Local0)
+ Stall (0x32)
+ }
+
+ If (LNot (Local0))
+ {
+ KILL ()
+ Return (Zero)
+ }
+
+ Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Increment (Local1)
+ If (LGreater (SizeOf (Arg2), Local1))
+ {
+ Store (DerefOf (Index (Arg2, Local1)), HBDR) /* \
\_SB_.PCI0.SBUS.HBDR */ + }
+ }
+
+ If (COMP ())
+ {
+ Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Return (One)
+ }
+
+ Return (Zero)
+ }
+
+ Method (SBLR, 3, Serialized)
+ {
+ Name (TBUF, Buffer (0x0100) {})
+ If (STRT ())
+ {
+ Return (Zero)
+ }
+
+ Store (Arg2, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
+ Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
+ Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
+ Store (0x54, HCON) /* \_SB_.PCI0.SBUS.HCON */
+ Store (0x0FA0, Local0)
+ While (LAnd (LNot (And (HSTS, 0x80)), Local0))
+ {
+ Decrement (Local0)
+ Stall (0x32)
+ }
+
+ If (LNot (Local0))
+ {
+ KILL ()
+ Return (Zero)
+ }
+
+ Store (DAT0, Index (TBUF, Zero))
+ Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Store (One, Local1)
+ While (LLess (Local1, DerefOf (Index (TBUF, Zero))))
+ {
+ Store (0x0FA0, Local0)
+ While (LAnd (LNot (And (HSTS, 0x80)), Local0))
+ {
+ Decrement (Local0)
+ Stall (0x32)
+ }
+
+ If (LNot (Local0))
+ {
+ KILL ()
+ Return (Zero)
+ }
+
+ Store (HBDR, Index (TBUF, Local1))
+ Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Increment (Local1)
+ }
+
+ If (COMP ())
+ {
+ Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ Return (TBUF) /* \_SB_.PCI0.SBUS.SBLR.TBUF */
+ }
+
+ Return (Zero)
+ }
+
+ Method (STRT, 0, Serialized)
+ {
+ Store (0xC8, Local0)
+ While (Local0)
+ {
+ If (And (HSTS, 0x40))
+ {
+ Decrement (Local0)
+ Sleep (One)
+ If (LEqual (Local0, Zero))
+ {
+ Return (One)
+ }
+ }
+ Else
+ {
+ Store (Zero, Local0)
+ }
+ }
+
+ Store (0x0FA0, Local0)
+ While (Local0)
+ {
+ If (And (HSTS, One))
+ {
+ Decrement (Local0)
+ Stall (0x32)
+ If (LEqual (Local0, Zero))
+ {
+ KILL ()
+ }
+ }
+ Else
+ {
+ Return (Zero)
+ }
+ }
+
+ Return (One)
+ }
+
+ Method (COMP, 0, Serialized)
+ {
+ Store (0x0FA0, Local0)
+ While (Local0)
+ {
+ If (And (HSTS, 0x02))
+ {
+ Return (One)
+ }
+ Else
+ {
+ Decrement (Local0)
+ Stall (0x32)
+ If (LEqual (Local0, Zero))
+ {
+ KILL ()
+ }
+ }
+ }
+
+ Return (Zero)
+ }
+
+ Method (KILL, 0, Serialized)
+ {
+ Or (HCON, 0x02, HCON) /* \_SB_.PCI0.SBUS.HCON */
+ Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
+ }
+ }
+ }
+ }
+}
+
diff --git a/fwts-test/disassemble-0001/SSDT0.dsl.original \
b/fwts-test/disassemble-0001/SSDT0.dsl.original deleted file mode 100644
index c182da1..0000000
--- a/fwts-test/disassemble-0001/SSDT0.dsl.original
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * Intel ACPI Component Architecture
- * AML Disassembler version 20140325-64 [Mar 25 2014]
- * Copyright (c) 2000 - 2014 Intel Corporation
- *
- * Disassembly of /tmp/fwts_iasl_27987_SSDT.dat, Tue Mar 25 20:18:15 2014
- *
- * Original Table Header:
- * Signature "SSDT"
- * Length 0x000002AD (685)
- * Revision 0x01
- * Checksum 0x59
- * OEM ID "SataRe"
- * OEM Table ID "SataAhci"
- * OEM Revision 0x00001000 (4096)
- * Compiler ID "INTL"
- * Compiler Version 0x20050624 (537200164)
- */
-DefinitionBlock ("/tmp/fwts_iasl_27987_SSDT.aml", "SSDT", 1, "SataRe", "SataAhci", \
0x00001000)
-{
-
- External (_SB_.PCI0.SATA, DeviceObj)
- External (GTF0, IntObj)
- External (GTF1, IntObj)
- External (GTF2, IntObj)
-
- Scope (\_SB.PCI0.SATA)
- {
- Device (PRT0)
- {
- Name (_ADR, 0xFFFF) // _ADR: Address
- Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data
- {
- Name (GBU0, Buffer (0x07)
- {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x00
- })
- CreateByteField (GBU0, 0x00, GB00)
- CreateByteField (GBU0, 0x01, GB01)
- CreateByteField (GBU0, 0x02, GB02)
- CreateByteField (GBU0, 0x03, GB03)
- CreateByteField (GBU0, 0x04, GB04)
- CreateByteField (GBU0, 0x05, GB05)
- CreateByteField (GBU0, 0x06, GB06)
- If (LEqual (SizeOf (Arg0), 0x0200))
- {
- CreateWordField (Arg0, 0x9C, W780)
- If (And (W780, 0x08))
- {
- Store (0x10, GB00) /* \_SB_.PCI0.SATA.PRT0._SDD.GB00 */
- Store (0x03, GB01) /* \_SB_.PCI0.SATA.PRT0._SDD.GB01 */
- Store (0xEF, GB06) /* \_SB_.PCI0.SATA.PRT0._SDD.GB06 */
- }
- Else
- {
- Store (0x90, GB00) /* \_SB_.PCI0.SATA.PRT0._SDD.GB00 */
- Store (0x03, GB01) /* \_SB_.PCI0.SATA.PRT0._SDD.GB01 */
- Store (0xEF, GB06) /* \_SB_.PCI0.SATA.PRT0._SDD.GB06 */
- }
- }
-
- Store (GBU0, GTF0) /* External reference */
- }
-
- Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
- {
- Return (GTF0) /* External reference */
- }
- }
-
- Device (PRT1)
- {
- Name (_ADR, 0x0001FFFF) // _ADR: Address
- Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data
- {
- Name (GBU1, Buffer (0x07)
- {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x00
- })
- CreateByteField (GBU1, 0x00, GB10)
- CreateByteField (GBU1, 0x01, GB11)
- CreateByteField (GBU1, 0x02, GB12)
- CreateByteField (GBU1, 0x03, GB13)
- CreateByteField (GBU1, 0x04, GB14)
- CreateByteField (GBU1, 0x05, GB15)
- CreateByteField (GBU1, 0x06, GB16)
- If (LEqual (SizeOf (Arg0), 0x0200))
- {
- CreateWordField (Arg0, 0x9C, W781)
- If (And (W781, 0x08))
- {
- Store (0x10, GB10) /* \_SB_.PCI0.SATA.PRT1._SDD.GB10 */
- Store (0x03, GB11) /* \_SB_.PCI0.SATA.PRT1._SDD.GB11 */
- Store (0xEF, GB16) /* \_SB_.PCI0.SATA.PRT1._SDD.GB16 */
- }
- Else
- {
- Store (0x90, GB10) /* \_SB_.PCI0.SATA.PRT1._SDD.GB10 */
- Store (0x03, GB11) /* \_SB_.PCI0.SATA.PRT1._SDD.GB11 */
- Store (0xEF, GB16) /* \_SB_.PCI0.SATA.PRT1._SDD.GB16 */
- }
- }
-
- Store (GBU1, GTF1) /* External reference */
- }
-
- Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
- {
- Return (GTF1) /* External reference */
- }
- }
-
- Device (PRT2)
- {
- Name (_ADR, 0x0002FFFF) // _ADR: Address
- Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data
- {
- Name (GBU2, Buffer (0x07)
- {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x00
- })
- CreateByteField (GBU2, 0x00, GB20)
- CreateByteField (GBU2, 0x01, GB21)
- CreateByteField (GBU2, 0x02, GB22)
- CreateByteField (GBU2, 0x03, GB23)
- CreateByteField (GBU2, 0x04, GB24)
- CreateByteField (GBU2, 0x05, GB25)
- CreateByteField (GBU2, 0x06, GB26)
- If (LEqual (SizeOf (Arg0), 0x0200))
- {
- CreateWordField (Arg0, 0x9C, W782)
- If (And (W782, 0x08))
- {
- Store (0x10, GB20) /* \_SB_.PCI0.SATA.PRT2._SDD.GB20 */
- Store (0x03, GB21) /* \_SB_.PCI0.SATA.PRT2._SDD.GB21 */
- Store (0xEF, GB26) /* \_SB_.PCI0.SATA.PRT2._SDD.GB26 */
- }
- Else
- {
- Store (0x90, GB20) /* \_SB_.PCI0.SATA.PRT2._SDD.GB20 */
- Store (0x03, GB21) /* \_SB_.PCI0.SATA.PRT2._SDD.GB21 */
- Store (0xEF, GB26) /* \_SB_.PCI0.SATA.PRT2._SDD.GB26 */
- }
- }
-
- Store (GBU2, GTF2) /* External reference */
- }
-
- Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
- {
- Return (GTF2) /* External reference */
- }
- }
- }
-}
-
diff --git a/fwts-test/disassemble-0001/SSDT1.dsl.original \
b/fwts-test/disassemble-0001/SSDT1.dsl.original index 7339993..eeb5758 100644
--- a/fwts-test/disassemble-0001/SSDT1.dsl.original
+++ b/fwts-test/disassemble-0001/SSDT1.dsl.original
@@ -1,56 +1,155 @@
/*
* Intel ACPI Component Architecture
- * AML Disassembler version 20140325-64 [Mar 25 2014]
+ * AML Disassembler version 20140325-64 [May 29 2014]
* Copyright (c) 2000 - 2014 Intel Corporation
*
- * Disassembly of /tmp/fwts_iasl_27987_SSDT.dat, Tue Mar 25 20:18:15 2014
+ * Disassembly of /tmp/fwts_tmp_table_16317_SSDT_0.dsl, Thu May 29 08:43:23 2014
*
* Original Table Header:
* Signature "SSDT"
- * Length 0x000000A3 (163)
+ * Length 0x000002AD (685)
* Revision 0x01
- * Checksum 0xED
- * OEM ID "BrtRef"
- * OEM Table ID "DD01BRT"
+ * Checksum 0x59
+ * OEM ID "SataRe"
+ * OEM Table ID "SataAhci"
* OEM Revision 0x00001000 (4096)
* Compiler ID "INTL"
* Compiler Version 0x20050624 (537200164)
*/
-DefinitionBlock ("/tmp/fwts_iasl_27987_SSDT.aml", "SSDT", 1, "BrtRef", "DD01BRT", \
0x00001000) +DefinitionBlock ("/tmp/fwts_tmp_table_16317_SSDT_0.aml", "SSDT", 1, \
"SataRe", "SataAhci", 0x00001000) {
- External (_SB_.PCI0.GFX0.DD03, DeviceObj)
- External (_SB_.PCI0.LPCB.EC0_.BRTS, UnknownObj)
+ External (_SB_.PCI0.SATA, DeviceObj)
+ External (GTF0, FieldUnitObj)
+ External (GTF1, FieldUnitObj)
+ External (GTF2, FieldUnitObj)
- Scope (\_SB.PCI0.GFX0.DD03)
+ Scope (\_SB.PCI0.SATA)
{
- Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels
+ Device (PRT0)
{
- Return (Package (0x0A)
+ Name (_ADR, 0xFFFF) // _ADR: Address
+ Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data
{
- 0x46,
- 0x28,
- 0x00,
- 0x0A,
- 0x14,
- 0x1E,
- 0x28,
- 0x32,
- 0x3C,
- 0x46
- })
+ Name (GBU0, Buffer (0x07)
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x00
+ })
+ CreateByteField (GBU0, 0x00, GB00)
+ CreateByteField (GBU0, 0x01, GB01)
+ CreateByteField (GBU0, 0x02, GB02)
+ CreateByteField (GBU0, 0x03, GB03)
+ CreateByteField (GBU0, 0x04, GB04)
+ CreateByteField (GBU0, 0x05, GB05)
+ CreateByteField (GBU0, 0x06, GB06)
+ If (LEqual (SizeOf (Arg0), 0x0200))
+ {
+ CreateWordField (Arg0, 0x9C, W780)
+ If (And (W780, 0x08))
+ {
+ Store (0x10, GB00) /* \_SB_.PCI0.SATA.PRT0._SDD.GB00 */
+ Store (0x03, GB01) /* \_SB_.PCI0.SATA.PRT0._SDD.GB01 */
+ Store (0xEF, GB06) /* \_SB_.PCI0.SATA.PRT0._SDD.GB06 */
+ }
+ Else
+ {
+ Store (0x90, GB00) /* \_SB_.PCI0.SATA.PRT0._SDD.GB00 */
+ Store (0x03, GB01) /* \_SB_.PCI0.SATA.PRT0._SDD.GB01 */
+ Store (0xEF, GB06) /* \_SB_.PCI0.SATA.PRT0._SDD.GB06 */
+ }
+ }
+
+ Store (GBU0, GTF0) /* \GTF0 */
+ }
+
+ Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
+ {
+ Return (GTF0) /* \GTF0 */
+ }
}
- Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method
+ Device (PRT1)
{
- Divide (Arg0, 0x0A, Local0, Local1)
- Store (Local1, \_SB.PCI0.LPCB.EC0.BRTS) /* External reference */
+ Name (_ADR, 0x0001FFFF) // _ADR: Address
+ Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data
+ {
+ Name (GBU1, Buffer (0x07)
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x00
+ })
+ CreateByteField (GBU1, 0x00, GB10)
+ CreateByteField (GBU1, 0x01, GB11)
+ CreateByteField (GBU1, 0x02, GB12)
+ CreateByteField (GBU1, 0x03, GB13)
+ CreateByteField (GBU1, 0x04, GB14)
+ CreateByteField (GBU1, 0x05, GB15)
+ CreateByteField (GBU1, 0x06, GB16)
+ If (LEqual (SizeOf (Arg0), 0x0200))
+ {
+ CreateWordField (Arg0, 0x9C, W781)
+ If (And (W781, 0x08))
+ {
+ Store (0x10, GB10) /* \_SB_.PCI0.SATA.PRT1._SDD.GB10 */
+ Store (0x03, GB11) /* \_SB_.PCI0.SATA.PRT1._SDD.GB11 */
+ Store (0xEF, GB16) /* \_SB_.PCI0.SATA.PRT1._SDD.GB16 */
+ }
+ Else
+ {
+ Store (0x90, GB10) /* \_SB_.PCI0.SATA.PRT1._SDD.GB10 */
+ Store (0x03, GB11) /* \_SB_.PCI0.SATA.PRT1._SDD.GB11 */
+ Store (0xEF, GB16) /* \_SB_.PCI0.SATA.PRT1._SDD.GB16 */
+ }
+ }
+
+ Store (GBU1, GTF1) /* \GTF1 */
+ }
+
+ Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
+ {
+ Return (GTF1) /* \GTF1 */
+ }
}
- Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query Current
+ Device (PRT2)
{
- Multiply (\_SB.PCI0.LPCB.EC0.BRTS, 0x0A, Local0)
- Return (Local0)
+ Name (_ADR, 0x0002FFFF) // _ADR: Address
+ Method (_SDD, 1, NotSerialized) // _SDD: Set Device Data
+ {
+ Name (GBU2, Buffer (0x07)
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x00
+ })
+ CreateByteField (GBU2, 0x00, GB20)
+ CreateByteField (GBU2, 0x01, GB21)
+ CreateByteField (GBU2, 0x02, GB22)
+ CreateByteField (GBU2, 0x03, GB23)
+ CreateByteField (GBU2, 0x04, GB24)
+ CreateByteField (GBU2, 0x05, GB25)
+ CreateByteField (GBU2, 0x06, GB26)
+ If (LEqual (SizeOf (Arg0), 0x0200))
+ {
+ CreateWordField (Arg0, 0x9C, W782)
+ If (And (W782, 0x08))
+ {
+ Store (0x10, GB20) /* \_SB_.PCI0.SATA.PRT2._SDD.GB20 */
+ Store (0x03, GB21) /* \_SB_.PCI0.SATA.PRT2._SDD.GB21 */
+ Store (0xEF, GB26) /* \_SB_.PCI0.SATA.PRT2._SDD.GB26 */
+ }
+ Else
+ {
+ Store (0x90, GB20) /* \_SB_.PCI0.SATA.PRT2._SDD.GB20 */
+ Store (0x03, GB21) /* \_SB_.PCI0.SATA.PRT2._SDD.GB21 */
+ Store (0xEF, GB26) /* \_SB_.PCI0.SATA.PRT2._SDD.GB26 */
+ }
+ }
+
+ Store (GBU2, GTF2) /* \GTF2 */
+ }
+
+ Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
+ {
+ Return (GTF2) /* \GTF2 */
+ }
}
}
}
diff --git a/fwts-test/disassemble-0001/SSDT2.dsl.original \
b/fwts-test/disassemble-0001/SSDT2.dsl.original index ab98570..c554aae 100644
--- a/fwts-test/disassemble-0001/SSDT2.dsl.original
+++ b/fwts-test/disassemble-0001/SSDT2.dsl.original
@@ -1,288 +1,56 @@
/*
* Intel ACPI Component Architecture
- * AML Disassembler version 20140325-64 [Mar 25 2014]
+ * AML Disassembler version 20140325-64 [May 29 2014]
* Copyright (c) 2000 - 2014 Intel Corporation
*
- * Disassembly of /tmp/fwts_iasl_27987_SSDT.dat, Tue Mar 25 20:18:15 2014
+ * Disassembly of /tmp/fwts_tmp_table_16317_SSDT_1.dsl, Thu May 29 08:43:23 2014
*
* Original Table Header:
* Signature "SSDT"
- * Length 0x0000025F (607)
+ * Length 0x000000A3 (163)
* Revision 0x01
- * Checksum 0xC8
- * OEM ID "PmRef"
- * OEM Table ID "Cpu0Tst"
- * OEM Revision 0x00003000 (12288)
+ * Checksum 0xED
+ * OEM ID "BrtRef"
+ * OEM Table ID "DD01BRT"
+ * OEM Revision 0x00001000 (4096)
* Compiler ID "INTL"
* Compiler Version 0x20050624 (537200164)
*/
-DefinitionBlock ("/tmp/fwts_iasl_27987_SSDT.aml", "SSDT", 1, "PmRef", "Cpu0Tst", \
0x00003000) +DefinitionBlock ("/tmp/fwts_tmp_table_16317_SSDT_1.aml", "SSDT", 1, \
"BrtRef", "DD01BRT", 0x00001000) {
- External (_PR_.CPU0, DeviceObj)
- External (_PSS, IntObj)
- External (CFGD, UnknownObj)
- External (PDC0, UnknownObj)
+ External (_SB_.PCI0.GFX0.DD03, DeviceObj)
+ External (_SB_.PCI0.LPCB.EC0_.BRTS, FieldUnitObj)
- Scope (\_PR.CPU0)
+ Scope (\_SB.PCI0.GFX0.DD03)
{
- Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities
- Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control
+ Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels
{
- If (And (PDC0, 0x04))
+ Return (Package (0x0A)
{
- Return (Package (0x02)
- {
- ResourceTemplate ()
- {
- Register (FFixedHW,
- 0x00, // Bit Width
- 0x00, // Bit Offset
- 0x0000000000000000, // Address
- ,)
- },
-
- ResourceTemplate ()
- {
- Register (FFixedHW,
- 0x00, // Bit Width
- 0x00, // Bit Offset
- 0x0000000000000000, // Address
- ,)
- }
- })
- }
-
- Return (Package (0x02)
- {
- ResourceTemplate ()
- {
- Register (SystemIO,
- 0x04, // Bit Width
- 0x01, // Bit Offset
- 0x0000000000001010, // Address
- ,)
- },
-
- ResourceTemplate ()
- {
- Register (SystemIO,
- 0x04, // Bit Width
- 0x01, // Bit Offset
- 0x0000000000001010, // Address
- ,)
- }
- })
- }
-
- Name (TSSI, Package (0x08)
- {
- Package (0x05)
- {
- 0x64,
- 0x03E8,
- 0x00,
- 0x00,
- 0x00
- },
-
- Package (0x05)
- {
- 0x58,
- 0x036B,
- 0x00,
- 0x0F,
- 0x00
- },
-
- Package (0x05)
- {
- 0x4B,
- 0x02EE,
- 0x00,
- 0x0E,
- 0x00
- },
-
- Package (0x05)
- {
- 0x3F,
- 0x0271,
- 0x00,
- 0x0D,
- 0x00
- },
-
- Package (0x05)
- {
- 0x32,
- 0x01F4,
- 0x00,
- 0x0C,
- 0x00
- },
-
- Package (0x05)
- {
- 0x26,
- 0x0177,
- 0x00,
- 0x0B,
- 0x00
- },
-
- Package (0x05)
- {
- 0x19,
- 0xFA,
+ 0x46,
+ 0x28,
0x00,
0x0A,
- 0x00
- },
-
- Package (0x05)
- {
- 0x0D,
- 0x7D,
- 0x00,
- 0x09,
- 0x00
- }
- })
- Name (TSSM, Package (0x08)
- {
- Package (0x05)
- {
- 0x64,
- 0x03E8,
- 0x00,
- 0x00,
- 0x00
- },
-
- Package (0x05)
- {
- 0x58,
- 0x036B,
- 0x00,
+ 0x14,
0x1E,
- 0x00
- },
-
- Package (0x05)
- {
- 0x4B,
- 0x02EE,
- 0x00,
- 0x1C,
- 0x00
- },
-
- Package (0x05)
- {
- 0x3F,
- 0x0271,
- 0x00,
- 0x1A,
- 0x00
- },
-
- Package (0x05)
- {
+ 0x28,
0x32,
- 0x01F4,
- 0x00,
- 0x18,
- 0x00
- },
-
- Package (0x05)
- {
- 0x26,
- 0x0177,
- 0x00,
- 0x16,
- 0x00
- },
-
- Package (0x05)
- {
- 0x19,
- 0xFA,
- 0x00,
- 0x14,
- 0x00
- },
+ 0x3C,
+ 0x46
+ })
+ }
- Package (0x05)
- {
- 0x0D,
- 0x7D,
- 0x00,
- 0x12,
- 0x00
- }
- })
- Name (TSSF, 0x00)
- Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States
+ Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method
{
- If (LAnd (LNot (TSSF), CondRefOf (_PSS)))
- {
- Store (_PSS, Local0)
- Store (SizeOf (Local0), Local1)
- Decrement (Local1)
- Store (DerefOf (Index (DerefOf (Index (Local0, Local1)), 0x01)),
- Local2)
- Store (0x00, Local3)
- While (LLess (Local3, SizeOf (TSSI)))
- {
- Store (Divide (Multiply (Local2, Subtract (0x08, Local3)), 0x08, \
- ), Local4)
- Store (Local4, Index (DerefOf (Index (TSSI, Local3)), 0x01))
- Store (Local4, Index (DerefOf (Index (TSSM, Local3)), 0x01))
- Increment (Local3)
- }
-
- Store (Ones, TSSF) /* \_PR_.CPU0.TSSF */
- }
-
- If (And (PDC0, 0x04))
- {
- Return (TSSM) /* \_PR_.CPU0.TSSM */
- }
-
- Return (TSSI) /* \_PR_.CPU0.TSSI */
+ Divide (Arg0, 0x0A, Local0, Local1)
+ Store (Local1, \_SB.PCI0.LPCB.EC0.BRTS)
}
- Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies
+ Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query Current
{
- If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x04
- ))))
- {
- Return (Package (0x01)
- {
- Package (0x05)
- {
- 0x05,
- 0x00,
- 0x00,
- 0xFD,
- 0x02
- }
- })
- }
-
- Return (Package (0x01)
- {
- Package (0x05)
- {
- 0x05,
- 0x00,
- 0x00,
- 0xFC,
- 0x01
- }
- })
+ Multiply (\_SB.PCI0.LPCB.EC0.BRTS, 0x0A, Local0)
+ Return (Local0)
}
}
}
diff --git a/fwts-test/disassemble-0001/SSDT3.dsl.original \
b/fwts-test/disassemble-0001/SSDT3.dsl.original index 0136b66..cc15632 100644
--- a/fwts-test/disassemble-0001/SSDT3.dsl.original
+++ b/fwts-test/disassemble-0001/SSDT3.dsl.original
@@ -1,46 +1,262 @@
/*
* Intel ACPI Component Architecture
- * AML Disassembler version 20140325-64 [Mar 25 2014]
+ * AML Disassembler version 20140325-64 [May 29 2014]
* Copyright (c) 2000 - 2014 Intel Corporation
*
- * Disassembly of /tmp/fwts_iasl_27987_SSDT.dat, Tue Mar 25 20:18:15 2014
+ * Disassembly of /tmp/fwts_tmp_table_16317_SSDT_2.dsl, Thu May 29 08:43:23 2014
*
* Original Table Header:
* Signature "SSDT"
- * Length 0x000000A6 (166)
+ * Length 0x0000025F (607)
* Revision 0x01
- * Checksum 0x6D
+ * Checksum 0xC8
* OEM ID "PmRef"
- * OEM Table ID "Cpu1Tst"
+ * OEM Table ID "Cpu0Tst"
* OEM Revision 0x00003000 (12288)
* Compiler ID "INTL"
* Compiler Version 0x20050624 (537200164)
*/
-DefinitionBlock ("/tmp/fwts_iasl_27987_SSDT.aml", "SSDT", 1, "PmRef", "Cpu1Tst", \
0x00003000) +DefinitionBlock ("/tmp/fwts_tmp_table_16317_SSDT_2.aml", "SSDT", 1, \
"PmRef", "Cpu0Tst", 0x00003000) {
- External (_PR_.CPU0._PTC, IntObj)
- External (_PR_.CPU0._TSS, IntObj)
- External (_PR_.CPU1, DeviceObj)
- External (CFGD, UnknownObj)
- External (PDC1, UnknownObj)
+ External (_PR_.CPU0, ProcessorObj)
+ External (_PSS, IntObj)
+ External (CFGD, IntObj)
+ External (PDC0, IntObj)
- Scope (\_PR.CPU1)
+ Scope (\_PR.CPU0)
{
Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities
Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control
{
- Return (\_PR.CPU0._PTC) /* External reference */
+ If (And (PDC0, 0x04))
+ {
+ Return (Package (0x02)
+ {
+ ResourceTemplate ()
+ {
+ Register (FFixedHW,
+ 0x00, // Bit Width
+ 0x00, // Bit Offset
+ 0x0000000000000000, // Address
+ ,)
+ },
+
+ ResourceTemplate ()
+ {
+ Register (FFixedHW,
+ 0x00, // Bit Width
+ 0x00, // Bit Offset
+ 0x0000000000000000, // Address
+ ,)
+ }
+ })
+ }
+
+ Return (Package (0x02)
+ {
+ ResourceTemplate ()
+ {
+ Register (SystemIO,
+ 0x04, // Bit Width
+ 0x01, // Bit Offset
+ 0x0000000000001010, // Address
+ ,)
+ },
+
+ ResourceTemplate ()
+ {
+ Register (SystemIO,
+ 0x04, // Bit Width
+ 0x01, // Bit Offset
+ 0x0000000000001010, // Address
+ ,)
+ }
+ })
}
+ Name (TSSI, Package (0x08)
+ {
+ Package (0x05)
+ {
+ 0x64,
+ 0x03E8,
+ 0x00,
+ 0x00,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x58,
+ 0x036B,
+ 0x00,
+ 0x0F,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x4B,
+ 0x02EE,
+ 0x00,
+ 0x0E,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x3F,
+ 0x0271,
+ 0x00,
+ 0x0D,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x32,
+ 0x01F4,
+ 0x00,
+ 0x0C,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x26,
+ 0x0177,
+ 0x00,
+ 0x0B,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x19,
+ 0xFA,
+ 0x00,
+ 0x0A,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x0D,
+ 0x7D,
+ 0x00,
+ 0x09,
+ 0x00
+ }
+ })
+ Name (TSSM, Package (0x08)
+ {
+ Package (0x05)
+ {
+ 0x64,
+ 0x03E8,
+ 0x00,
+ 0x00,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x58,
+ 0x036B,
+ 0x00,
+ 0x1E,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x4B,
+ 0x02EE,
+ 0x00,
+ 0x1C,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x3F,
+ 0x0271,
+ 0x00,
+ 0x1A,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x32,
+ 0x01F4,
+ 0x00,
+ 0x18,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x26,
+ 0x0177,
+ 0x00,
+ 0x16,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x19,
+ 0xFA,
+ 0x00,
+ 0x14,
+ 0x00
+ },
+
+ Package (0x05)
+ {
+ 0x0D,
+ 0x7D,
+ 0x00,
+ 0x12,
+ 0x00
+ }
+ })
+ Name (TSSF, 0x00)
Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States
{
- Return (\_PR.CPU0._TSS) /* External reference */
+ If (LAnd (LNot (TSSF), CondRefOf (_PSS)))
+ {
+ Store (_PSS, Local0)
+ Store (SizeOf (Local0), Local1)
+ Decrement (Local1)
+ Store (DerefOf (Index (DerefOf (Index (Local0, Local1)), 0x01)),
+ Local2)
+ Store (0x00, Local3)
+ While (LLess (Local3, SizeOf (TSSI)))
+ {
+ Store (Divide (Multiply (Local2, Subtract (0x08, Local3)), 0x08, \
+ ), Local4)
+ Store (Local4, Index (DerefOf (Index (TSSI, Local3)), 0x01))
+ Store (Local4, Index (DerefOf (Index (TSSM, Local3)), 0x01))
+ Increment (Local3)
+ }
+
+ Store (Ones, TSSF) /* \_PR_.CPU0.TSSF */
+ }
+
+ If (And (PDC0, 0x04))
+ {
+ Return (TSSM) /* \_PR_.CPU0.TSSM */
+ }
+
+ Return (TSSI) /* \_PR_.CPU0.TSSI */
}
Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies
{
- If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC1, 0x04
+ If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x04
))))
{
Return (Package (0x01)
@@ -62,7 +278,7 @@ DefinitionBlock ("/tmp/fwts_iasl_27987_SSDT.aml", "SSDT", 1, \
"PmRef", "Cpu1Tst", {
0x05,
0x00,
- 0x01,
+ 0x00,
0xFC,
0x01
}
diff --git a/fwts-test/disassemble-0001/SSDT4.dsl.original \
b/fwts-test/disassemble-0001/SSDT4.dsl.original index 222d62d..be51c54 100644
--- a/fwts-test/disassemble-0001/SSDT4.dsl.original
+++ b/fwts-test/disassemble-0001/SSDT4.dsl.original
@@ -1,215 +1,72 @@
/*
* Intel ACPI Component Architecture
- * AML Disassembler version 20140325-64 [Mar 25 2014]
+ * AML Disassembler version 20140325-64 [May 29 2014]
* Copyright (c) 2000 - 2014 Intel Corporation
*
- * Disassembly of /tmp/fwts_iasl_27987_SSDT.dat, Tue Mar 25 20:18:15 2014
+ * Disassembly of /tmp/fwts_tmp_table_16317_SSDT_3.dsl, Thu May 29 08:43:24 2014
*
* Original Table Header:
* Signature "SSDT"
- * Length 0x000004E6 (1254)
+ * Length 0x000000A6 (166)
* Revision 0x01
- * Checksum 0xDF
+ * Checksum 0x6D
* OEM ID "PmRef"
- * OEM Table ID "CpuPm"
+ * OEM Table ID "Cpu1Tst"
* OEM Revision 0x00003000 (12288)
* Compiler ID "INTL"
* Compiler Version 0x20050624 (537200164)
*/
-DefinitionBlock ("/tmp/fwts_iasl_27987_SSDT.aml", "SSDT", 1, "PmRef", "CpuPm", \
0x00003000) +DefinitionBlock ("/tmp/fwts_tmp_table_16317_SSDT_3.aml", "SSDT", 1, \
"PmRef", "Cpu1Tst", 0x00003000) {
- External (_PR_.CPU0, DeviceObj)
- External (_PR_.CPU1, DeviceObj)
- External (PCP0, UnknownObj)
- External (PCP1, UnknownObj)
+ External (_PR_.CPU0._PTC, MethodObj) // 0 Arguments
+ External (_PR_.CPU0._TSS, MethodObj) // 0 Arguments
+ External (_PR_.CPU1, ProcessorObj)
+ External (CFGD, IntObj)
+ External (PDC1, IntObj)
- Scope (\)
- {
- Name (SSDT, Package (0x0C)
- {
- "CPU0IST ",
- 0xBF6D959E,
- 0x000001B4,
- "CPU1IST ",
- 0xBF6D9752,
- 0x000000C8,
- "CPU0CST ",
- 0xBF6D906F,
- 0x000004AA,
- "CPU1CST ",
- 0xBF6D9519,
- 0x00000085
- })
- Name (CFGD, 0x113F69F1)
- Name (\PDC0, 0x80000000)
- Name (\PDC1, 0x80000000)
- Name (\SDTL, 0x00)
- }
-
- Scope (\_PR.CPU0)
+ Scope (\_PR.CPU1)
{
- Name (HI0, 0x00)
- Name (HC0, 0x00)
- Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities
+ Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities
+ Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control
{
- CreateDWordField (Arg0, 0x00, REVS)
- CreateDWordField (Arg0, 0x04, SIZE)
- Store (SizeOf (Arg0), Local0)
- Store (Subtract (Local0, 0x08), Local1)
- CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP)
- Name (STS0, Buffer (0x04)
- {
- 0x00, 0x00, 0x00, 0x00
- })
- Concatenate (STS0, TEMP, Local2)
- _OSC (Buffer (0x10)
- {
- /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,
- /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53
- }, REVS, SIZE, Local2)
+ Return (\_PR.CPU0._PTC ())
}
- Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
+ Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States
{
- CreateDWordField (Arg3, 0x00, STS0)
- CreateDWordField (Arg3, 0x04, CAP0)
- CreateDWordField (Arg0, 0x00, IID0)
- CreateDWordField (Arg0, 0x04, IID1)
- CreateDWordField (Arg0, 0x08, IID2)
- CreateDWordField (Arg0, 0x0C, IID3)
- Name (UID0, Buffer (0x10)
- {
- /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,
- /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53
- })
- CreateDWordField (UID0, 0x00, EID0)
- CreateDWordField (UID0, 0x04, EID1)
- CreateDWordField (UID0, 0x08, EID2)
- CreateDWordField (UID0, 0x0C, EID3)
- If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)),
- LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))))
- {
- Store (0x06, STS0) /* \_PR_.CPU0._OSC.STS0 */
- Return (Arg3)
- }
-
- If (LNotEqual (Arg1, 0x01))
- {
- Store (0x0A, STS0) /* \_PR_.CPU0._OSC.STS0 */
- Return (Arg3)
- }
-
- Or (And (PDC0, 0x7FFFFFFF), CAP0, PDC0) /* \PDC0 */
- Store (And (PDC0, 0xFF), PCP0) /* External reference */
- If (And (CFGD, 0x01))
- {
- If (LAnd (LAnd (And (CFGD, 0x01000000), LEqual (And (PDC0,
- 0x09), 0x09)), LNot (And (SDTL, 0x01))))
- {
- Or (SDTL, 0x01, SDTL) /* \SDTL */
- OperationRegion (IST0, SystemMemory, DerefOf (Index (SSDT, \
0x01)), DerefOf (Index (SSDT, 0x02
- )))
- Load (IST0, HI0) /* \_PR_.CPU0.HI0_ */
- }
- }
-
- If (And (CFGD, 0xF0))
- {
- If (LAnd (LAnd (And (CFGD, 0x01000000), And (PDC0, 0x18
- )), LNot (And (SDTL, 0x02))))
- {
- Or (SDTL, 0x02, SDTL) /* \SDTL */
- OperationRegion (CST0, SystemMemory, DerefOf (Index (SSDT, \
0x07)), DerefOf (Index (SSDT, 0x08
- )))
- Load (CST0, HC0) /* \_PR_.CPU0.HC0_ */
- }
- }
-
- Return (Arg3)
+ Return (\_PR.CPU0._TSS ())
}
- }
- Scope (\_PR.CPU1)
- {
- Name (HI1, 0x00)
- Name (HC1, 0x00)
- Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities
+ Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies
{
- CreateDWordField (Arg0, 0x00, REVS)
- CreateDWordField (Arg0, 0x04, SIZE)
- Store (SizeOf (Arg0), Local0)
- Store (Subtract (Local0, 0x08), Local1)
- CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP)
- Name (STS1, Buffer (0x04)
+ If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC1, 0x04
+ ))))
{
- 0x00, 0x00, 0x00, 0x00
- })
- Concatenate (STS1, TEMP, Local2)
- _OSC (Buffer (0x10)
+ Return (Package (0x01)
{
- /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,
- /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53
- }, REVS, SIZE, Local2)
- }
-
- Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
- {
- CreateDWordField (Arg3, 0x00, STS1)
- CreateDWordField (Arg3, 0x04, CAP1)
- CreateDWordField (Arg0, 0x00, IID0)
- CreateDWordField (Arg0, 0x04, IID1)
- CreateDWordField (Arg0, 0x08, IID2)
- CreateDWordField (Arg0, 0x0C, IID3)
- Name (UID1, Buffer (0x10)
- {
- /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,
- /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53
- })
- CreateDWordField (UID1, 0x00, EID0)
- CreateDWordField (UID1, 0x04, EID1)
- CreateDWordField (UID1, 0x08, EID2)
- CreateDWordField (UID1, 0x0C, EID3)
- If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)),
- LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))))
- {
- Store (0x06, STS1) /* \_PR_.CPU1._OSC.STS1 */
- Return (Arg3)
+ Package (0x05)
+ {
+ 0x05,
+ 0x00,
+ 0x00,
+ 0xFD,
+ 0x02
+ }
+ })
}
- If (LNotEqual (Arg1, 0x01))
+ Return (Package (0x01)
{
- Store (0x0A, STS1) /* \_PR_.CPU1._OSC.STS1 */
- Return (Arg3)
- }
-
- Or (And (PDC1, 0x7FFFFFFF), CAP1, PDC1) /* \PDC1 */
- Store (And (PDC1, 0xFF), PCP1) /* External reference */
- If (And (CFGD, 0x01))
- {
- If (LAnd (LAnd (And (CFGD, 0x01000000), LEqual (And (PDC1,
- 0x09), 0x09)), LNot (And (SDTL, 0x10))))
+ Package (0x05)
{
- Or (SDTL, 0x10, SDTL) /* \SDTL */
- OperationRegion (IST1, SystemMemory, DerefOf (Index (SSDT, \
0x04)), DerefOf (Index (SSDT, 0x05
- )))
- Load (IST1, HI1) /* \_PR_.CPU1.HI1_ */
+ 0x05,
+ 0x00,
+ 0x01,
+ 0xFC,
+ 0x01
}
- }
-
- If (And (CFGD, 0xF0))
- {
- If (LAnd (LAnd (And (CFGD, 0x01000000), And (PDC1, 0x18
- )), LNot (And (SDTL, 0x20))))
- {
- Or (SDTL, 0x20, SDTL) /* \SDTL */
- OperationRegion (CST1, SystemMemory, DerefOf (Index (SSDT, \
0x0A)), DerefOf (Index (SSDT, 0x0B
- )))
- Load (CST1, HC1) /* \_PR_.CPU1.HC1_ */
- }
- }
-
- Return (Arg3)
+ })
}
}
}
diff --git a/fwts-test/disassemble-0001/SSDT5.dsl.original \
b/fwts-test/disassemble-0001/SSDT5.dsl.original new file mode 100644
index 0000000..9bc8915
--- /dev/null
+++ b/fwts-test/disassemble-0001/SSDT5.dsl.original
@@ -0,0 +1,216 @@
+/*
+ * Intel ACPI Component Architecture
+ * AML Disassembler version 20140325-64 [May 29 2014]
+ * Copyright (c) 2000 - 2014 Intel Corporation
+ *
+ * Disassembly of /tmp/fwts_tmp_table_16317_SSDT_4.dsl, Thu May 29 08:43:24 2014
+ *
+ * Original Table Header:
+ * Signature "SSDT"
+ * Length 0x000004E6 (1254)
+ * Revision 0x01
+ * Checksum 0xDF
+ * OEM ID "PmRef"
+ * OEM Table ID "CpuPm"
+ * OEM Revision 0x00003000 (12288)
+ * Compiler ID "INTL"
+ * Compiler Version 0x20050624 (537200164)
+ */
+DefinitionBlock ("/tmp/fwts_tmp_table_16317_SSDT_4.aml", "SSDT", 1, "PmRef", \
"CpuPm", 0x00003000) +{
+
+ External (_PR_.CPU0, ProcessorObj)
+ External (_PR_.CPU1, ProcessorObj)
+ External (PCP0, FieldUnitObj)
+ External (PCP1, FieldUnitObj)
+
+ Scope (\)
+ {
+ Name (SSDT, Package (0x0C)
+ {
+ "CPU0IST ",
+ 0xBF6D959E,
+ 0x000001B4,
+ "CPU1IST ",
+ 0xBF6D9752,
+ 0x000000C8,
+ "CPU0CST ",
+ 0xBF6D906F,
+ 0x000004AA,
+ "CPU1CST ",
+ 0xBF6D9519,
+ 0x00000085
+ })
+ Name (CFGD, 0x113F69F1)
+ Name (\PDC0, 0x80000000)
+ Name (\PDC1, 0x80000000)
+ Name (\SDTL, 0x00)
+ }
+
+ Scope (\_PR.CPU0)
+ {
+ Name (HI0, 0x00)
+ Name (HC0, 0x00)
+ Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities
+ {
+ CreateDWordField (Arg0, 0x00, REVS)
+ CreateDWordField (Arg0, 0x04, SIZE)
+ Store (SizeOf (Arg0), Local0)
+ Store (Subtract (Local0, 0x08), Local1)
+ CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP)
+ Name (STS0, Buffer (0x04)
+ {
+ 0x00, 0x00, 0x00, 0x00
+ })
+ Concatenate (STS0, TEMP, Local2)
+ _OSC (Buffer (0x10)
+ {
+ /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,
+ /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53
+ }, REVS, SIZE, Local2)
+ }
+
+ Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
+ {
+ CreateDWordField (Arg3, 0x00, STS0)
+ CreateDWordField (Arg3, 0x04, CAP0)
+ CreateDWordField (Arg0, 0x00, IID0)
+ CreateDWordField (Arg0, 0x04, IID1)
+ CreateDWordField (Arg0, 0x08, IID2)
+ CreateDWordField (Arg0, 0x0C, IID3)
+ Name (UID0, Buffer (0x10)
+ {
+ /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,
+ /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53
+ })
+ CreateDWordField (UID0, 0x00, EID0)
+ CreateDWordField (UID0, 0x04, EID1)
+ CreateDWordField (UID0, 0x08, EID2)
+ CreateDWordField (UID0, 0x0C, EID3)
+ If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)),
+ LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))))
+ {
+ Store (0x06, STS0) /* \_PR_.CPU0._OSC.STS0 */
+ Return (Arg3)
+ }
+
+ If (LNotEqual (Arg1, 0x01))
+ {
+ Store (0x0A, STS0) /* \_PR_.CPU0._OSC.STS0 */
+ Return (Arg3)
+ }
+
+ Or (And (PDC0, 0x7FFFFFFF), CAP0, PDC0) /* \PDC0 */
+ Store (And (PDC0, 0xFF), PCP0) /* \PCP0 */
+ If (And (CFGD, 0x01))
+ {
+ If (LAnd (LAnd (And (CFGD, 0x01000000), LEqual (And (PDC0,
+ 0x09), 0x09)), LNot (And (SDTL, 0x01))))
+ {
+ Or (SDTL, 0x01, SDTL) /* \SDTL */
+ OperationRegion (IST0, SystemMemory, DerefOf (Index (SSDT, \
0x01)), DerefOf (Index (SSDT, 0x02 + )))
+ Load (IST0, HI0) /* \_PR_.CPU0.HI0_ */
+ }
+ }
+
+ If (And (CFGD, 0xF0))
+ {
+ If (LAnd (LAnd (And (CFGD, 0x01000000), And (PDC0, 0x18
+ )), LNot (And (SDTL, 0x02))))
+ {
+ Or (SDTL, 0x02, SDTL) /* \SDTL */
+ OperationRegion (CST0, SystemMemory, DerefOf (Index (SSDT, \
0x07)), DerefOf (Index (SSDT, 0x08 + )))
+ Load (CST0, HC0) /* \_PR_.CPU0.HC0_ */
+ }
+ }
+
+ Return (Arg3)
+ }
+ }
+
+ Scope (\_PR.CPU1)
+ {
+ Name (HI1, 0x00)
+ Name (HC1, 0x00)
+ Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities
+ {
+ CreateDWordField (Arg0, 0x00, REVS)
+ CreateDWordField (Arg0, 0x04, SIZE)
+ Store (SizeOf (Arg0), Local0)
+ Store (Subtract (Local0, 0x08), Local1)
+ CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP)
+ Name (STS1, Buffer (0x04)
+ {
+ 0x00, 0x00, 0x00, 0x00
+ })
+ Concatenate (STS1, TEMP, Local2)
+ _OSC (Buffer (0x10)
+ {
+ /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,
+ /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53
+ }, REVS, SIZE, Local2)
+ }
+
+ Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
+ {
+ CreateDWordField (Arg3, 0x00, STS1)
+ CreateDWordField (Arg3, 0x04, CAP1)
+ CreateDWordField (Arg0, 0x00, IID0)
+ CreateDWordField (Arg0, 0x04, IID1)
+ CreateDWordField (Arg0, 0x08, IID2)
+ CreateDWordField (Arg0, 0x0C, IID3)
+ Name (UID1, Buffer (0x10)
+ {
+ /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,
+ /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53
+ })
+ CreateDWordField (UID1, 0x00, EID0)
+ CreateDWordField (UID1, 0x04, EID1)
+ CreateDWordField (UID1, 0x08, EID2)
+ CreateDWordField (UID1, 0x0C, EID3)
+ If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)),
+ LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))))
+ {
+ Store (0x06, STS1) /* \_PR_.CPU1._OSC.STS1 */
+ Return (Arg3)
+ }
+
+ If (LNotEqual (Arg1, 0x01))
+ {
+ Store (0x0A, STS1) /* \_PR_.CPU1._OSC.STS1 */
+ Return (Arg3)
+ }
+
+ Or (And (PDC1, 0x7FFFFFFF), CAP1, PDC1) /* \PDC1 */
+ Store (And (PDC1, 0xFF), PCP1) /* \PCP1 */
+ If (And (CFGD, 0x01))
+ {
+ If (LAnd (LAnd (And (CFGD, 0x01000000), LEqual (And (PDC1,
+ 0x09), 0x09)), LNot (And (SDTL, 0x10))))
+ {
+ Or (SDTL, 0x10, SDTL) /* \SDTL */
+ OperationRegion (IST1, SystemMemory, DerefOf (Index (SSDT, \
0x04)), DerefOf (Index (SSDT, 0x05 + )))
+ Load (IST1, HI1) /* \_PR_.CPU1.HI1_ */
+ }
+ }
+
+ If (And (CFGD, 0xF0))
+ {
+ If (LAnd (LAnd (And (CFGD, 0x01000000), And (PDC1, 0x18
+ )), LNot (And (SDTL, 0x20))))
+ {
+ Or (SDTL, 0x20, SDTL) /* \SDTL */
+ OperationRegion (CST1, SystemMemory, DerefOf (Index (SSDT, \
0x0A)), DerefOf (Index (SSDT, 0x0B + )))
+ Load (CST1, HC1) /* \_PR_.CPU1.HC1_ */
+ }
+ }
+
+ Return (Arg3)
+ }
+ }
+}
+
diff --git a/fwts-test/disassemble-0001/disassemble-aml-0001.log \
b/fwts-test/disassemble-0001/disassemble-aml-0001.log index 84db0ca..2b89d9b 100644
--- a/fwts-test/disassemble-0001/disassemble-aml-0001.log
+++ b/fwts-test/disassemble-0001/disassemble-aml-0001.log
@@ -1,6 +1,6 @@
-Disassembled DSDT to /tmp/disassemble-aml/DSDT.dsl
-Disassembled SSDT 0 to /tmp/disassemble-aml/SSDT0.dsl
-Disassembled SSDT 1 to /tmp/disassemble-aml/SSDT1.dsl
-Disassembled SSDT 2 to /tmp/disassemble-aml/SSDT2.dsl
-Disassembled SSDT 3 to /tmp/disassemble-aml/SSDT3.dsl
-Disassembled SSDT 4 to /tmp/disassemble-aml/SSDT4.dsl
+Disassembled DSDT to /tmp/disassemble-aml/DSDT0.dsl
+Disassembled SSDT to /tmp/disassemble-aml/SSDT1.dsl
+Disassembled SSDT to /tmp/disassemble-aml/SSDT2.dsl
+Disassembled SSDT to /tmp/disassemble-aml/SSDT3.dsl
+Disassembled SSDT to /tmp/disassemble-aml/SSDT4.dsl
+Disassembled SSDT to /tmp/disassemble-aml/SSDT5.dsl
diff --git a/fwts-test/disassemble-0001/test-0001.sh \
b/fwts-test/disassemble-0001/test-0001.sh index 5462f17..2d08dc9 100755
--- a/fwts-test/disassemble-0001/test-0001.sh
+++ b/fwts-test/disassemble-0001/test-0001.sh
@@ -6,7 +6,9 @@ TMPDIR=$TMP/disassemble-aml
TMPLOG=$TMP/disassemble-aml.log.$$
HERE=$FWTSTESTDIR/disassemble-0001
-mkdir $TMPDIR
+mkdir -p $TMPDIR
+rm $TMPDIR/*
+rm -f $TMPLOG
$FWTS -w 80 --dumpfile=$HERE/acpidump.log --disassemble-aml=$TMPDIR - > $TMPLOG
failed=0
@@ -19,14 +21,14 @@ else
failed=1
fi
-for I in DSDT SSDT0 SSDT1 SSDT2 SSDT3 SSDT4
+for I in DSDT0 SSDT1 SSDT2 SSDT3 SSDT4 SSDT5
do
TEST="Test --disassemble-aml against known $I"
#
# Remove lines that contain a tmp file output name in disassembly
#
- grep -v "/tmp/fwts_iasl" $TMPDIR/$I.dsl | grep -v "AML Disassembler version" > \
$TMPDIR/$I.dsl.fixed.$$
- grep -v "/tmp/fwts_iasl" $HERE/$I.dsl.original | grep -v "AML Disassembler version" \
> $TMPDIR/$I.dsl.orig.fixed.$$ + grep -v "/tmp/fwts_" $TMPDIR/$I.dsl | grep -v "AML \
> Disassembler version" | grep -v "Disassembly of" > $TMPDIR/$I.dsl.fixed.$$
+ grep -v "/tmp/fwts_" $HERE/$I.dsl.original | grep -v "AML Disassembler version" | \
grep -v "Disassembly of" > $TMPDIR/$I.dsl.orig.fixed.$$
diff $TMPDIR/$I.dsl.fixed.$$ $TMPDIR/$I.dsl.orig.fixed.$$
if [ $? -eq 0 ]; then
@@ -36,7 +38,7 @@ do
failed=1
fi
- rm $TMPDIR/$I.dsl.fixed.$$ $TMPDIR/$I.dsl.orig.fixed.$$
+ #rm $TMPDIR/$I.dsl.fixed.$$ $TMPDIR/$I.dsl.orig.fixed.$$
done
rm -rf $TMPDIR $TMPLOG
diff --git a/fwts-test/syntaxcheck-0001/syntaxcheck-0001.log \
b/fwts-test/syntaxcheck-0001/syntaxcheck-0001.log index cf14291..134bcf1 100644
--- a/fwts-test/syntaxcheck-0001/syntaxcheck-0001.log
+++ b/fwts-test/syntaxcheck-0001/syntaxcheck-0001.log
@@ -1,8 +1,8 @@
-syntaxcheck syntaxcheck: Re-assemble DSDT and find syntax errors and
-syntaxcheck warnings.
+syntaxcheck syntaxcheck: Re-assemble DSDT and SSDTs to find syntax
+syntaxcheck errors and warnings.
syntaxcheck ----------------------------------------------------------
-syntaxcheck Test 1 of 2: Disassemble and reassemble DSDT
syntaxcheck Cannot find FACP.
+syntaxcheck Test 1 of 1: Disassemble and reassemble DSDT and SSDTs.
syntaxcheck
syntaxcheck Checking ACPI table DSDT (#0)
syntaxcheck
@@ -34,7 +34,7 @@ syntaxcheck 01068| 0xDFFFFFFF, // \
Range Maximum syntaxcheck 01069| 0x00000000, // \
Translation Offset syntaxcheck 01070| 0x00000000, // \
Length syntaxcheck | ^
-syntaxcheck | Error 6043: Invalid combination of Length and Min/Max fixed \
flags +syntaxcheck | Error 6043: Invalid combination of Length and Min/Max \
fixed flags syntaxcheck 01071| ,, _Y0D, \
AddressRangeMemory, TypeStatic) syntaxcheck 01072| DWordMemory \
(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, syntaxcheck \
01073| 0x00000000, // Granularity @@ -57,7 +57,7 @@ \
syntaxcheck 01082| 0xFED44FFF, // Range Maximum \
syntaxcheck 01083| 0x00000000, // Translation Offset \
syntaxcheck 01084| 0x00000000, // Length syntaxcheck \
| ^
-syntaxcheck | Error 6043: Invalid combination of Length and Min/Max fixed \
flags +syntaxcheck | Error 6043: Invalid combination of Length and Min/Max \
fixed flags syntaxcheck 01085| ,, , AddressRangeMemory, \
TypeStatic) syntaxcheck 01086| })
syntaxcheck 01087| Method (_CRS, 0, Serialized) // _CRS: Current \
Resource Settings @@ -263,11 +263,9 @@ syntaxcheck Table DSDT (0) reassembly: \
Found 3 errors, 0 warnings, 10 syntaxcheck remarks.
syntaxcheck
syntaxcheck
-syntaxcheck Test 2 of 2: Disassemble and reassemble SSDT
-syntaxcheck
-syntaxcheck Checking ACPI table SSDT (#0)
+syntaxcheck Checking ACPI table SSDT (#1)
syntaxcheck
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 1,
syntaxcheck Assembler remark in line 32
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -276,7 +274,7 @@ syntaxcheck 00030| {
syntaxcheck 00031| Name (_ADR, 0xFFFF) // _ADR: Address
syntaxcheck 00032| Method (_SDD, 1, NotSerialized) // _SDD: Set \
Device Data syntaxcheck | ^
-syntaxcheck | Remark 2120: Control Method should be made Serialized (due to \
creation of named objects within) +syntaxcheck | Remark 2120: Control Method \
should be made Serialized (due to creation of named objects within) syntaxcheck \
00033| { syntaxcheck 00034| Name (GBU0, Buffer \
(0x07) syntaxcheck 00035| {
@@ -289,7 +287,7 @@ syntaxcheck thread enters the method and blocks and then a \
second syntaxcheck thread also executes the method, ending up in two attempts
syntaxcheck to create the object and causing a failure.
syntaxcheck
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 40
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -303,7 +301,7 @@ syntaxcheck 00041| CreateByteField (GBU0, \
0x03, GB03) syntaxcheck 00042| CreateByteField (GBU0, 0x04, \
GB04) syntaxcheck 00043| CreateByteField (GBU0, 0x05, GB05)
syntaxcheck ==========================================================
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 41
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -317,7 +315,7 @@ syntaxcheck 00042| CreateByteField (GBU0, \
0x04, GB04) syntaxcheck 00043| CreateByteField (GBU0, 0x05, \
GB05) syntaxcheck 00044| CreateByteField (GBU0, 0x06, GB06)
syntaxcheck ==========================================================
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 42
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -331,7 +329,7 @@ syntaxcheck 00043| CreateByteField (GBU0, \
0x05, GB05) syntaxcheck 00044| CreateByteField (GBU0, 0x06, \
GB06) syntaxcheck 00045| If (LEqual (SizeOf (Arg0), 0x0200))
syntaxcheck ==========================================================
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 43
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -345,7 +343,7 @@ syntaxcheck 00044| CreateByteField (GBU0, \
0x06, GB06) syntaxcheck 00045| If (LEqual (SizeOf (Arg0), \
0x0200)) syntaxcheck 00046| {
syntaxcheck ==========================================================
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 1,
syntaxcheck Assembler remark in line 74
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -354,7 +352,7 @@ syntaxcheck 00072| {
syntaxcheck 00073| Name (_ADR, 0x0001FFFF) // _ADR: Address
syntaxcheck 00074| Method (_SDD, 1, NotSerialized) // _SDD: Set \
Device Data syntaxcheck | ^
-syntaxcheck | Remark 2120: Control Method should be made Serialized (due to \
creation of named objects within) +syntaxcheck | Remark 2120: Control Method \
should be made Serialized (due to creation of named objects within) syntaxcheck \
00075| { syntaxcheck 00076| Name (GBU1, Buffer \
(0x07) syntaxcheck 00077| {
@@ -367,7 +365,7 @@ syntaxcheck thread enters the method and blocks and then a \
second syntaxcheck thread also executes the method, ending up in two attempts
syntaxcheck to create the object and causing a failure.
syntaxcheck
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 82
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -381,7 +379,7 @@ syntaxcheck 00083| CreateByteField (GBU1, \
0x03, GB13) syntaxcheck 00084| CreateByteField (GBU1, 0x04, \
GB14) syntaxcheck 00085| CreateByteField (GBU1, 0x05, GB15)
syntaxcheck ==========================================================
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 83
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -395,7 +393,7 @@ syntaxcheck 00084| CreateByteField (GBU1, \
0x04, GB14) syntaxcheck 00085| CreateByteField (GBU1, 0x05, \
GB15) syntaxcheck 00086| CreateByteField (GBU1, 0x06, GB16)
syntaxcheck ==========================================================
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 84
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -409,7 +407,7 @@ syntaxcheck 00085| CreateByteField (GBU1, \
0x05, GB15) syntaxcheck 00086| CreateByteField (GBU1, 0x06, \
GB16) syntaxcheck 00087| If (LEqual (SizeOf (Arg0), 0x0200))
syntaxcheck ==========================================================
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 85
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -423,7 +421,7 @@ syntaxcheck 00086| CreateByteField (GBU1, \
0x06, GB16) syntaxcheck 00087| If (LEqual (SizeOf (Arg0), \
0x0200)) syntaxcheck 00088| {
syntaxcheck ==========================================================
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 1,
syntaxcheck Assembler remark in line 116
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -432,7 +430,7 @@ syntaxcheck 00114| {
syntaxcheck 00115| Name (_ADR, 0x0002FFFF) // _ADR: Address
syntaxcheck 00116| Method (_SDD, 1, NotSerialized) // _SDD: Set \
Device Data syntaxcheck | ^
-syntaxcheck | Remark 2120: Control Method should be made Serialized (due to \
creation of named objects within) +syntaxcheck | Remark 2120: Control Method \
should be made Serialized (due to creation of named objects within) syntaxcheck \
00117| { syntaxcheck 00118| Name (GBU2, Buffer \
(0x07) syntaxcheck 00119| {
@@ -445,7 +443,7 @@ syntaxcheck thread enters the method and blocks and then a \
second syntaxcheck thread also executes the method, ending up in two attempts
syntaxcheck to create the object and causing a failure.
syntaxcheck
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 124
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -459,7 +457,7 @@ syntaxcheck 00125| CreateByteField (GBU2, \
0x03, GB23) syntaxcheck 00126| CreateByteField (GBU2, 0x04, \
GB24) syntaxcheck 00127| CreateByteField (GBU2, 0x05, GB25)
syntaxcheck ==========================================================
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 125
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -473,7 +471,7 @@ syntaxcheck 00126| CreateByteField (GBU2, \
0x04, GB24) syntaxcheck 00127| CreateByteField (GBU2, 0x05, \
GB25) syntaxcheck 00128| CreateByteField (GBU2, 0x06, GB26)
syntaxcheck ==========================================================
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 126
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -487,7 +485,7 @@ syntaxcheck 00127| CreateByteField (GBU2, \
0x05, GB25) syntaxcheck 00128| CreateByteField (GBU2, 0x06, \
GB26) syntaxcheck 00129| If (LEqual (SizeOf (Arg0), 0x0200))
syntaxcheck ==========================================================
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_NOT_REFERENCED: Test 1,
syntaxcheck Assembler remark in line 127
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -501,31 +499,31 @@ syntaxcheck 00128| CreateByteField (GBU2, \
0x06, GB26) syntaxcheck 00129| If (LEqual (SizeOf (Arg0), \
0x0200)) syntaxcheck 00130| {
syntaxcheck ==========================================================
-syntaxcheck Table SSDT (0) reassembly: Found 0 errors, 0 warnings, 15
+syntaxcheck Table SSDT (1) reassembly: Found 0 errors, 0 warnings, 15
syntaxcheck remarks.
syntaxcheck
syntaxcheck
-syntaxcheck Checking ACPI table SSDT (#1)
+syntaxcheck Checking ACPI table SSDT (#2)
syntaxcheck
-syntaxcheck PASSED: Test 2, SSDT (1) reassembly, Found 0 errors, 0
+syntaxcheck PASSED: Test 1, SSDT (2) reassembly, Found 0 errors, 0
syntaxcheck warnings, 0 remarks.
syntaxcheck
syntaxcheck
-syntaxcheck Checking ACPI table SSDT (#2)
+syntaxcheck Checking ACPI table SSDT (#3)
syntaxcheck
-syntaxcheck PASSED: Test 2, SSDT (2) reassembly, Found 0 errors, 0
+syntaxcheck PASSED: Test 1, SSDT (3) reassembly, Found 0 errors, 0
syntaxcheck warnings, 0 remarks.
syntaxcheck
syntaxcheck
-syntaxcheck Checking ACPI table SSDT (#3)
+syntaxcheck Checking ACPI table SSDT (#4)
syntaxcheck
-syntaxcheck PASSED: Test 2, SSDT (3) reassembly, Found 0 errors, 0
+syntaxcheck PASSED: Test 1, SSDT (4) reassembly, Found 0 errors, 0
syntaxcheck warnings, 0 remarks.
syntaxcheck
syntaxcheck
-syntaxcheck Checking ACPI table SSDT (#4)
+syntaxcheck Checking ACPI table SSDT (#5)
syntaxcheck
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 1,
syntaxcheck Assembler remark in line 54
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -534,7 +532,7 @@ syntaxcheck 00052| Name (HI0, 0x00)
syntaxcheck 00053| Name (HC0, 0x00)
syntaxcheck 00054| Method (_PDC, 1, NotSerialized) // _PDC: Processor \
Driver Capabilities syntaxcheck | ^
-syntaxcheck | Remark 2120: Control Method should be made Serialized (due to \
creation of named objects within) +syntaxcheck | Remark 2120: Control Method \
should be made Serialized (due to creation of named objects within) syntaxcheck \
00055| { syntaxcheck 00056| CreateDWordField (Arg0, 0x00, \
REVS) syntaxcheck 00057| CreateDWordField (Arg0, 0x04, SIZE)
@@ -547,7 +545,7 @@ syntaxcheck thread enters the method and blocks and then a \
second syntaxcheck thread also executes the method, ending up in two attempts
syntaxcheck to create the object and causing a failure.
syntaxcheck
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 1,
syntaxcheck Assembler remark in line 73
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -556,7 +554,7 @@ syntaxcheck 00071| }
syntaxcheck 00072|
syntaxcheck 00073| Method (_OSC, 4, NotSerialized) // _OSC: Operating \
System Capabilities syntaxcheck | ^
-syntaxcheck | Remark 2120: Control Method should be made Serialized (due to \
creation of named objects within) +syntaxcheck | Remark 2120: Control Method \
should be made Serialized (due to creation of named objects within) syntaxcheck \
00074| { syntaxcheck 00075| CreateDWordField (Arg3, 0x00, \
STS0) syntaxcheck 00076| CreateDWordField (Arg3, 0x04, CAP0)
@@ -569,7 +567,7 @@ syntaxcheck thread enters the method and blocks and then a \
second syntaxcheck thread also executes the method, ending up in two attempts
syntaxcheck to create the object and causing a failure.
syntaxcheck
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 1,
syntaxcheck Assembler remark in line 137
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -578,7 +576,7 @@ syntaxcheck 00135| Name (HI1, 0x00)
syntaxcheck 00136| Name (HC1, 0x00)
syntaxcheck 00137| Method (_PDC, 1, NotSerialized) // _PDC: Processor \
Driver Capabilities syntaxcheck | ^
-syntaxcheck | Remark 2120: Control Method should be made Serialized (due to \
creation of named objects within) +syntaxcheck | Remark 2120: Control Method \
should be made Serialized (due to creation of named objects within) syntaxcheck \
00138| { syntaxcheck 00139| CreateDWordField (Arg0, 0x00, \
REVS) syntaxcheck 00140| CreateDWordField (Arg0, 0x04, SIZE)
@@ -591,7 +589,7 @@ syntaxcheck thread enters the method and blocks and then a \
second syntaxcheck thread also executes the method, ending up in two attempts
syntaxcheck to create the object and causing a failure.
syntaxcheck
-syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 2,
+syntaxcheck FAILED [LOW] AMLAsmASL_MSG_SERIALIZED_REQUIRED: Test 1,
syntaxcheck Assembler remark in line 156
syntaxcheck Line | AML source
syntaxcheck ----------------------------------------------------------
@@ -600,7 +598,7 @@ syntaxcheck 00154| }
syntaxcheck 00155|
syntaxcheck 00156| Method (_OSC, 4, NotSerialized) // _OSC: Operating \
System Capabilities syntaxcheck | ^
-syntaxcheck | Remark 2120: Control Method should be made Serialized (due to \
creation of named objects within) +syntaxcheck | Remark 2120: Control Method \
should be made Serialized (due to creation of named objects within) syntaxcheck \
00157| { syntaxcheck 00158| CreateDWordField (Arg3, 0x00, \
STS1) syntaxcheck 00159| CreateDWordField (Arg3, 0x04, CAP1)
@@ -613,7 +611,7 @@ syntaxcheck thread enters the method and blocks and then a \
second syntaxcheck thread also executes the method, ending up in two attempts
syntaxcheck to create the object and causing a failure.
syntaxcheck
-syntaxcheck Table SSDT (4) reassembly: Found 0 errors, 0 warnings, 4
+syntaxcheck Table SSDT (5) reassembly: Found 0 errors, 0 warnings, 4
syntaxcheck remarks.
syntaxcheck
syntaxcheck
--
2.0.0.rc4
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