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List:       freebsd-hackers
Subject:    Re: PMCSTAT Event for counting L1-DCache Hit / Misses
From:       Ryan Stone <rysto32 () gmail ! com>
Date:       2015-06-17 20:57:51
Message-ID: CAFMmRNwtjaf=EjH=ZwFatp8hK4Lfod86kEO7UT+H5A4=X7m8OQ () mail ! gmail ! com
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On Wed, Jun 17, 2015 at 4:31 PM, Sai Prajeeth <csprajeeth@gmail.com> wrote:

> Intel Xeon X5650 2660.05-MHz K8-class CPU. Family = 0x6  Model = 0x2c
> Stepping = 2.
> 
> Pretty sure its Intel Nehalem architecture.
> 

Googling seems to indicate this this is a Westmere, although Intel's site
could be much clearer (and really, so could hwpmc -- there should be a
sysctl telling you what manpage to look at).

If it is Westmere, the manpage is here:
https://www.freebsd.org/cgi/man.cgi?query=pmc.westmere&apropos=0&sektion=0&manpath=FreeBSD%209.0-RELEASE&arch=default&format=html


These counters are probably what you're looking for.  Summing up everything
but the L1D_HIT counter should give you the number of misses.  It would be
nice if hwpmc had a L1D_MISS counter using a umask of 0x5E, which sum
things up automatically for you.

     MEM_LOAD_RETIRED.L1D_HIT
         (Event CBH, Umask 01H) Counts number of retired loads that    hit
         the L1 data cache.

     MEM_LOAD_RETIRED.L2_HIT
         (Event CBH, Umask 02H) Counts number of retired loads that    hit
         the L2 data cache.

     MEM_LOAD_RETIRED.L3_UNSHARED_HIT
         (Event CBH, Umask 04H) Counts number of retired loads that    hit
         their own,    unshared lines in the L3 cache.

     MEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITM
         (Event CBH, Umask 08H) Counts number of retired loads that    hit
in
         a sibling core's L2 (on die core).    Since the L3 is    inclusive
of
         all cores on the package, this is an L3 hit. This counts both
         clean or modified hits.

     MEM_LOAD_RETIRED.L3_MISS
         (Event CBH, Umask 10H) Counts number of retired loads that    miss
         the L3 cache. The load was    satisfied by a remote socket, local
         memory or an IOH.

     MEM_LOAD_RETIRED.HIT_LFB
         (Event CBH, Umask 40H) Counts number of retired loads that    miss
         the L1D and the address is    located    in an allocated    line
fill
         buffer and    will soon be committed to cache. This is counting
sec-
         ondary L1D    misses.
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