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List: e1000-devel
Subject: Re: [E1000-devel] DCA on Sandy Bridge?
From: Alexander Duyck <alexander.h.duyck () intel ! com>
Date: 2014-02-24 18:37:56
Message-ID: 530B9184.9010309 () intel ! com
[Download RAW message or body]
Scott,
I think I found the bug that is leading to the DCA configuration
problem. The problem is that DCA should be configured when the
interface is brought up, instead of when it is brought down. The
current behavior leaves us open to uninitialized registers in the event
of a reset event such as an MTU change when the interface is down.
For now the workaround is to do a "ip link set <ethX> down" then bring
the interface up again and it will update things to configure all of the
registers.
I will work with the ixgbe maintainers to see about getting this fixed.
Thanks,
Alex
On 02/24/2014 09:40 AM, Scott Silverman wrote:
> "Number of VFs" is 0 for both ports on my device.
>
> *Original State:*
> [root@sec47 ~]# /usr/src/ethregs-1.16.0/ethregs -s 0000:04:00.1 | grep DCA
> DCA_RXCTRL[000] 00001200
> DCA_RXCTRL[001] 1f0002a0
> DCA_RXCTRL[002] 1f0002a0
> DCA_RXCTRL[003] 1f0002a0
> DCA_RXCTRL[004] 1f0002a0
> DCA_RXCTRL[005] 1f0002a0
> DCA_RXCTRL[006] 1f0002a0
> DCA_RXCTRL[007] 1f0002a0
> DCA_RXCTRL[008] 1e0002a0
> DCA_RXCTRL[009] 1e0002a0
> DCA_RXCTRL[010] 1e0002a0
> DCA_RXCTRL[011] 1e0002a0
> DCA_RXCTRL[012] 1e0002a0
> DCA_RXCTRL[013] 1e0002a0
> DCA_RXCTRL[014] 1e0002a0
> DCA_RXCTRL[015] 1e0002a0
>
> *After setting link down:*
> [root@sec47 ~]# ip link set eth3 down
> [root@sec47 ~]# /usr/src/ethregs-1.16.0/ethregs -s 0000:04:00.1 | grep DCA
> DCA_RXCTRL[000] 1e0002a0
> DCA_RXCTRL[001] 1e0002a0
> DCA_RXCTRL[002] 1e0002a0
> DCA_RXCTRL[003] 1e0002a0
> DCA_RXCTRL[004] 1e0002a0
> DCA_RXCTRL[005] 1e0002a0
> DCA_RXCTRL[006] 1e0002a0
> DCA_RXCTRL[007] 1e0002a0
> DCA_RXCTRL[008] 1e0002a0
> DCA_RXCTRL[009] 1e0002a0
> DCA_RXCTRL[010] 1e0002a0
> DCA_RXCTRL[011] 1e0002a0
> DCA_RXCTRL[012] 1e0002a0
> DCA_RXCTRL[013] 1e0002a0
> DCA_RXCTRL[014] 1e0002a0
> DCA_RXCTRL[015] 1e0002a0
>
> *After setting link up:*
> [root@sec47 ~]# ip link set eth3 up
> [root@sec47 ~]# /usr/src/ethregs-1.16.0/ethregs -s 0000:04:00.1 | grep DCA
> DCA_RXCTRL[000] 1f0002a0
> DCA_RXCTRL[001] 1f0002a0
> DCA_RXCTRL[002] 1f0002a0
> DCA_RXCTRL[003] 1f0002a0
> DCA_RXCTRL[004] 1f0002a0
> DCA_RXCTRL[005] 1f0002a0
> DCA_RXCTRL[006] 1f0002a0
> DCA_RXCTRL[007] 1f0002a0
> DCA_RXCTRL[008] 1e0002a0
> DCA_RXCTRL[009] 1e0002a0
> DCA_RXCTRL[010] 1e0002a0
> DCA_RXCTRL[011] 1e0002a0
> DCA_RXCTRL[012] 1e0002a0
> DCA_RXCTRL[013] 1e0002a0
> DCA_RXCTRL[014] 1e0002a0
> DCA_RXCTRL[015] 1e0002a0
>
> Output from modified driver:
> Intel(R) 10 Gigabit PCI Express Network Driver - version 3.19.1
> Copyright (c) 1999-2013 Intel Corporation.
> ixgbe 0000:04:00.0: irq 122 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 123 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 124 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 125 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 126 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 127 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 128 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 129 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 130 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 131 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 132 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 133 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 134 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 135 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 136 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 137 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 138 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 139 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 140 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 141 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 142 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 143 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 144 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 145 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 146 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 147 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 148 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 149 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 150 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 151 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 152 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 153 for MSI/MSI-X
> ixgbe 0000:04:00.0: irq 154 for MSI/MSI-X
> Updating q_vector 0
> Updating DCA for Tx queue 0
> Updating DCA for Rx queue 0
> Updating q_vector 1
> Updating DCA for Tx queue 1
> Updating DCA for Rx queue 1
> Updating q_vector 2
> Updating DCA for Tx queue 2
> Updating DCA for Rx queue 2
> Updating q_vector 3
> Updating DCA for Tx queue 3
> Updating DCA for Rx queue 3
> Updating q_vector 4
> Updating DCA for Tx queue 4
> Updating DCA for Rx queue 4
> Updating q_vector 5
> Updating DCA for Tx queue 5
> Updating DCA for Rx queue 5
> Updating q_vector 6
> Updating DCA for Tx queue 6
> Updating DCA for Rx queue 6
> Updating q_vector 7
> Updating DCA for Tx queue 7
> Updating DCA for Rx queue 7
> Updating q_vector 8
> Updating DCA for Tx queue 8
> Updating DCA for Rx queue 8
> Updating q_vector 9
> Updating DCA for Tx queue 9
> Updating DCA for Rx queue 9
> Updating q_vector 10
> Updating DCA for Tx queue 10
> Updating DCA for Rx queue 10
> Updating q_vector 11
> Updating DCA for Tx queue 11
> Updating DCA for Rx queue 11
> Updating q_vector 12
> Updating DCA for Tx queue 12
> Updating DCA for Rx queue 12
> Updating q_vector 13
> Updating DCA for Tx queue 13
> Updating DCA for Rx queue 13
> Updating q_vector 14
> Updating DCA for Tx queue 14
> Updating DCA for Rx queue 14
> Updating q_vector 15
> Updating DCA for Tx queue 15
> Updating DCA for Rx queue 15
> Updating q_vector 16
> Updating DCA for Tx queue 16
> Updating DCA for Rx queue 16
> Updating q_vector 17
> Updating DCA for Tx queue 17
> Updating DCA for Rx queue 17
> Updating q_vector 18
> Updating DCA for Tx queue 18
> Updating DCA for Rx queue 18
> Updating q_vector 19
> Updating DCA for Tx queue 19
> Updating DCA for Rx queue 19
> Updating q_vector 20
> Updating DCA for Tx queue 20
> Updating DCA for Rx queue 20
> Updating q_vector 21
> Updating DCA for Tx queue 21
> Updating DCA for Rx queue 21
> Updating q_vector 22
> Updating DCA for Tx queue 22
> Updating DCA for Rx queue 22
> Updating q_vector 23
> Updating DCA for Tx queue 23
> Updating DCA for Rx queue 23
> Updating q_vector 24
> Updating DCA for Tx queue 24
> Updating DCA for Rx queue 24
> Updating q_vector 25
> Updating DCA for Tx queue 25
> Updating DCA for Rx queue 25
> Updating q_vector 26
> Updating DCA for Tx queue 26
> Updating DCA for Rx queue 26
> Updating q_vector 27
> Updating DCA for Tx queue 27
> Updating DCA for Rx queue 27
> Updating q_vector 28
> Updating DCA for Tx queue 28
> Updating DCA for Rx queue 28
> Updating q_vector 29
> Updating DCA for Tx queue 29
> Updating DCA for Rx queue 29
> Updating q_vector 30
> Updating DCA for Tx queue 30
> Updating DCA for Rx queue 30
> Updating q_vector 31
> Updating DCA for Tx queue 31
> Updating DCA for Rx queue 31
> ixgbe 0000:04:00.0: PCI Express bandwidth of 32GT/s available
> ixgbe 0000:04:00.0: (Speed:5.0GT/s, Width: x8, Encoding Loss:20%)
> ixgbe 0000:04:00.0: eth2: MAC: 2, PHY: 9, SFP+: 3, PBA No: E68793-002
> ixgbe 0000:04:00.0: 00:1b:21:5a:68:34
> ixgbe 0000:04:00.0: eth2: Enabled Features: RxQ: 32 TxQ: 32 FdirHash DCA
> RSC
> ixgbe 0000:04:00.0: eth2: Intel(R) 10 Gigabit Network Connection
> ixgbe 0000:04:00.1: irq 155 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 156 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 157 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 158 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 159 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 160 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 161 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 162 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 163 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 164 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 165 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 166 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 167 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 168 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 169 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 170 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 171 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 172 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 173 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 174 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 175 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 176 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 177 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 178 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 179 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 180 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 181 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 182 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 183 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 184 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 185 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 186 for MSI/MSI-X
> ixgbe 0000:04:00.1: irq 187 for MSI/MSI-X
> Updating q_vector 0
> Updating DCA for Tx queue 0
> Updating DCA for Rx queue 0
> Updating q_vector 1
> Updating DCA for Tx queue 1
> Updating DCA for Rx queue 1
> Updating q_vector 2
> Updating DCA for Tx queue 2
> Updating DCA for Rx queue 2
> Updating q_vector 3
> Updating DCA for Tx queue 3
> Updating DCA for Rx queue 3
> Updating q_vector 4
> Updating DCA for Tx queue 4
> Updating DCA for Rx queue 4
> Updating q_vector 5
> Updating DCA for Tx queue 5
> Updating DCA for Rx queue 5
> Updating q_vector 6
> Updating DCA for Tx queue 6
> Updating DCA for Rx queue 6
> Updating q_vector 7
> Updating DCA for Tx queue 7
> Updating DCA for Rx queue 7
> Updating q_vector 8
> Updating DCA for Tx queue 8
> Updating DCA for Rx queue 8
> Updating q_vector 9
> Updating DCA for Tx queue 9
> Updating DCA for Rx queue 9
> Updating q_vector 10
> Updating DCA for Tx queue 10
> Updating DCA for Rx queue 10
> Updating q_vector 11
> Updating DCA for Tx queue 11
> Updating DCA for Rx queue 11
> Updating q_vector 12
> Updating DCA for Tx queue 12
> Updating DCA for Rx queue 12
> Updating q_vector 13
> Updating DCA for Tx queue 13
> Updating DCA for Rx queue 13
> Updating q_vector 14
> Updating DCA for Tx queue 14
> Updating DCA for Rx queue 14
> Updating q_vector 15
> Updating DCA for Tx queue 15
> Updating DCA for Rx queue 15
> Updating q_vector 16
> Updating DCA for Tx queue 16
> Updating DCA for Rx queue 16
> Updating q_vector 17
> Updating DCA for Tx queue 17
> Updating DCA for Rx queue 17
> Updating q_vector 18
> Updating DCA for Tx queue 18
> Updating DCA for Rx queue 18
> Updating q_vector 19
> Updating DCA for Tx queue 19
> Updating DCA for Rx queue 19
> Updating q_vector 20
> Updating DCA for Tx queue 20
> Updating DCA for Rx queue 20
> Updating q_vector 21
> Updating DCA for Tx queue 21
> Updating DCA for Rx queue 21
> Updating q_vector 22
> Updating DCA for Tx queue 22
> Updating DCA for Rx queue 22
> Updating q_vector 23
> Updating DCA for Tx queue 23
> Updating DCA for Rx queue 23
> Updating q_vector 24
> Updating DCA for Tx queue 24
> Updating DCA for Rx queue 24
> Updating q_vector 25
> Updating DCA for Tx queue 25
> Updating DCA for Rx queue 25
> Updating q_vector 26
> Updating DCA for Tx queue 26
> Updating DCA for Rx queue 26
> Updating q_vector 27
> Updating DCA for Tx queue 27
> Updating DCA for Rx queue 27
> Updating q_vector 28
> Updating DCA for Tx queue 28
> Updating DCA for Rx queue 28
> Updating q_vector 29
> Updating DCA for Tx queue 29
> Updating DCA for Rx queue 29
> Updating q_vector 30
> Updating DCA for Tx queue 30
> Updating DCA for Rx queue 30
> Updating q_vector 31
> Updating DCA for Tx queue 31
> Updating DCA for Rx queue 31
> ixgbe 0000:04:00.1: PCI Express bandwidth of 32GT/s available
> ixgbe 0000:04:00.1: (Speed:5.0GT/s, Width: x8, Encoding Loss:20%)
> ixgbe 0000:04:00.1: eth3: MAC: 2, PHY: 9, SFP+: 4, PBA No: E68793-002
> ixgbe 0000:04:00.1: 00:1b:21:5a:68:35
> ixgbe 0000:04:00.1: eth3: Enabled Features: RxQ: 32 TxQ: 32 FdirHash DCA
> RSC
> ixgbe 0000:04:00.1: eth3: Intel(R) 10 Gigabit Network Connection
> ixgbe 0000:04:00.0: eth2: changing MTU from 1500 to 9000
> 8021q: adding VLAN 0 to HW filter on device eth2
> ixgbe 0000:04:00.0: eth2: detected SFP+: 3
> Updating DCA for Tx queue 7
> Updating DCA for Tx queue 8
> Updating DCA for Tx queue 9
> Updating DCA for Tx queue 5
> Updating DCA for Tx queue 4
> Updating DCA for Tx queue 6
> Updating DCA for Tx queue 2
> Updating DCA for Tx queue 3
> Updating DCA for Tx queue 1
> Updating DCA for Rx queue 8
> Updating DCA for Rx queue 9
> Updating DCA for Rx queue 5
> Updating DCA for Rx queue 4
> Updating DCA for Rx queue 6
> Updating DCA for Rx queue 2
> Updating DCA for Rx queue 3
> Updating DCA for Rx queue 1
> Updating DCA for Rx queue 7
> ixgbe 0000:04:00.1: eth3: changing MTU from 1500 to 9000
> Updating DCA for Tx queue 18
> Updating DCA for Tx queue 28
> Updating DCA for Tx queue 25
> Updating DCA for Tx queue 19
> Updating DCA for Tx queue 11
> Updating DCA for Tx queue 27
> Updating DCA for Tx queue 30
> Updating DCA for Rx queue 28
> Updating DCA for Tx queue 29
> Updating DCA for Tx queue 16
> Updating DCA for Rx queue 25
> Updating DCA for Tx queue 23
> Updating DCA for Tx queue 12
> Updating DCA for Tx queue 22
> Updating DCA for Tx queue 21
> Updating DCA for Tx queue 17
> Updating DCA for Tx queue 31
> Updating DCA for Tx queue 10
> Updating DCA for Tx queue 20
> Updating DCA for Tx queue 24
> Updating DCA for Tx queue 14
> Updating DCA for Tx queue 13
> Updating DCA for Rx queue 19
> Updating DCA for Tx queue 15
> Updating DCA for Tx queue 26
> Updating DCA for Rx queue 11
> Updating DCA for Rx queue 27
> Updating DCA for Rx queue 30
> Updating DCA for Rx queue 29
> Updating DCA for Rx queue 16
> Updating DCA for Rx queue 23
> Updating DCA for Rx queue 12
> Updating DCA for Rx queue 22
> Updating DCA for Rx queue 21
> Updating DCA for Rx queue 17
> Updating DCA for Rx queue 31
> Updating DCA for Rx queue 10
> Updating DCA for Rx queue 20
> Updating DCA for Rx queue 24
> Updating DCA for Rx queue 14
> Updating DCA for Rx queue 13
> Updating DCA for Rx queue 15
> Updating DCA for Rx queue 26
> Updating DCA for Rx queue 18
> 8021q: adding VLAN 0 to HW filter on device eth3
> ixgbe 0000:04:00.1: eth3: detected SFP+: 4
> Updating DCA for Tx queue 5
> Updating DCA for Tx queue 4
> Updating DCA for Tx queue 6
> Updating DCA for Tx queue 3
> Updating DCA for Tx queue 2
> Updating DCA for Tx queue 1
> Updating DCA for Rx queue 4
> Updating DCA for Rx queue 6
> Updating DCA for Rx queue 3
> Updating DCA for Rx queue 2
> Updating DCA for Rx queue 1
> Updating DCA for Rx queue 5
> Updating DCA for Tx queue 28
> Updating DCA for Tx queue 29
> Updating DCA for Tx queue 26
> Updating DCA for Tx queue 27
> Updating DCA for Tx queue 24
> Updating DCA for Tx queue 22
> Updating DCA for Tx queue 25
> Updating DCA for Tx queue 21
> Updating DCA for Tx queue 23
> Updating DCA for Tx queue 20
> Updating DCA for Tx queue 19
> Updating DCA for Tx queue 17
> Updating DCA for Tx queue 14
> Updating DCA for Tx queue 15
> Updating DCA for Tx queue 18
> Updating DCA for Tx queue 13
> Updating DCA for Tx queue 10
> Updating DCA for Tx queue 11
> Updating DCA for Tx queue 7
> Updating DCA for Tx queue 8
> Updating DCA for Tx queue 16
> Updating DCA for Tx queue 12
> Updating DCA for Rx queue 29
> Updating DCA for Tx queue 9
> Updating DCA for Rx queue 26
> Updating DCA for Rx queue 27
> Updating DCA for Rx queue 24
> Updating DCA for Rx queue 22
> Updating DCA for Rx queue 25
> Updating DCA for Rx queue 21
> Updating DCA for Rx queue 23
> Updating DCA for Rx queue 20
> Updating DCA for Rx queue 19
> Updating DCA for Rx queue 17
> Updating DCA for Rx queue 14
> Updating DCA for Rx queue 15
> Updating DCA for Rx queue 18
> Updating DCA for Rx queue 13
> Updating DCA for Rx queue 10
> Updating DCA for Rx queue 11
> Updating DCA for Rx queue 7
> Updating DCA for Rx queue 8
> Updating DCA for Rx queue 16
> Updating DCA for Rx queue 12
> Updating DCA for Rx queue 9
> Updating DCA for Rx queue 28
> Updating DCA for Tx queue 31
> Updating DCA for Tx queue 30
> Updating DCA for Rx queue 30
> Updating DCA for Rx queue 31
> ixgbe 0000:04:00.0: eth2: NIC Link is Up 10 Gbps, Flow Control: None
> ixgbe 0000:04:00.1: eth3: NIC Link is Up 10 Gbps, Flow Control: None
>
>
>
>
>
>
> Thanks,
>
> Scott Silverman | IT | Simplex Investments | 312-360-2444
> 230 S. LaSalle St., Suite 4-100, Chicago, IL 60604
>
>
> On Mon, Feb 24, 2014 at 10:55 AM, Alexander Duyck <
> alexander.h.duyck@intel.com> wrote:
>
>> SR-IOV is something you would have to explicitly enable either by
>> configuring it via module parameter or via a sysfs value. You can
>> verify if it is enabled or not by running lspci -vvv -s <b:d.f> where
>> b:d.f is the bus, device, and function number for your device. If
>> SR-IOV is enabled the Number of VFs value will be non-zero.
>>
>> One other thing you might try would be to bring the interface down by
>> running "ip link set <ethX> down", then run the ethregs again to capture
>> the state of the DCA registers, followed by "ip link set <ethX up>.
>>
>> It would also be useful if you could try making the changes below to
>> your driver to provide some debug output in the dmesg log. The piece I
>> am trying to capture here is if we try to update Tx and Rx queue 0
>> configuration or not. Just loading the driver with these changes in
>> should be enough to give us that information.
>>
>> Thanks,
>>
>> Alex
>>
>> --
>>
>> diff --git a/src/ixgbe_main.c b/src/ixgbe_main.c
>> index 418ff08..56d70b5 100644
>> --- a/src/CORE/ixgbe_main.c
>> +++ b/src/CORE/ixgbe_main.c
>> @@ -901,6 +901,8 @@ static void ixgbe_update_tx_dca(struct ixgbe_adapter
>> *adapter,
>> u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
>> u16 reg_offset;
>>
>> + printk("Updating DCA for Tx queue %d\n", tx_ring->reg_idx);
>> +
>> switch (hw->mac.type) {
>> case ixgbe_mac_82598EB:
>> reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
>> @@ -940,6 +942,7 @@ static void ixgbe_update_rx_dca(struct ixgbe_adapter
>> *adapter,
>> u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
>> u8 reg_idx = rx_ring->reg_idx;
>>
>> + printk("Updating DCA for Rx queue %d\n", rx_ring->reg_idx);
>>
>> switch (hw->mac.type) {
>> case ixgbe_mac_82599EB:
>> @@ -1009,6 +1012,7 @@ static void ixgbe_setup_dca(struct ixgbe_adapter
>> *adapter)
>> IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
>>
>> for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
>> + printk("Updating q_vector %d\n", v_idx);
>> adapter->q_vector[v_idx]->cpu = -1;
>> ixgbe_update_dca(adapter->q_vector[v_idx]);
>> }
>>
>>
>> On 02/21/2014 08:05 AM, Scott Silverman wrote:
>>> I am not certain if SR-IOV is toggled on or off in the motherboard
>>> firmware, but I will look this evening. In the meantime, are you aware
>> of a
>>> way to determine that without entering the firmware? I can tell you that
>>> "Intel Virtualization Tech" and "Intel VT-d" are both disabled, and that
>>> the kernel is using SWIOTLB, not iommu.
>>>
>>> I moved the IRQ vector for TxRx0 to core 1, and back to core 0, no change
>>> in the DCA_RXCTRL[000].
>>>
>>>
>>>
>>>
>>> Thanks,
>>>
>>> Scott Silverman | IT | Simplex Investments | 312-360-2444
>>> 230 S. LaSalle St., Suite 4-100, Chicago, IL 60604
>>>
>>>
>>> On Thu, Feb 20, 2014 at 4:38 PM, Alexander Duyck <
>>> alexander.h.duyck@intel.com> wrote:
>>>
>>>> The fact that Rx and Tx ring zero aren't updating is quite odd if you
>>>> have a current driver By any chance do you have something like SR-IOV
>>>> enabled? That would reserve queues starting at 0, but not enable DCA.
>>>>
>>>> One thing you might try would be to change the affinity of the TxRx-0
>>>> interrupt vector associated with the interface. If it is currently on
>>>> CPU 0 try moving it to CPU 1, and then back to 0 to see if that resolves
>>>> the issue. I'm still trying to find in the code where this queue could
>>>> come up without configuring DCA and that might give me some input on
>>>> what is going on.
>>>>
>>>> Thanks,
>>>>
>>>> Alex
>>>>
>>>> On 02/20/2014 01:07 PM, Scott Silverman wrote:
>>>>> Sure, I've attached the output.
>>>>>
>>>>>
>>>>>
>>>>>
>>>>> Thanks,
>>>>>
>>>>> Scott Silverman | IT | Simplex Investments | 312-360-2444
>>>>> 230 S. LaSalle St., Suite 4-100, Chicago, IL 60604
>>>>>
>>>>>
>>>>> On Thu, Feb 20, 2014 at 11:10 AM, Alexander Duyck <
>>>>> alexander.h.duyck@intel.com> wrote:
>>>>>
>>>>>> Could you please re-run the ethregs with the "-s 5:00.1" instead of
>> the
>>>>>> "-d 8086:10fb" option. Using the device ID will give you the results
>>>>>> for both function 0 and function 1. I just want to verify which
>>>>>> function we are getting the results for.
>>>>>>
>>>>>> Thanks,
>>>>>>
>>>>>> Alex
>>>>>>
>>
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