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List:       dmaengine
Subject:    Re: [PATCH v5 09/11] dmaengine: dw: Initialize min and max burst DMA device capability
From:       Andy Shevchenko <andriy.shevchenko () linux ! intel ! com>
Date:       2020-05-29 15:48:27
Message-ID: 20200529154827.GT1634618 () smile ! fi ! intel ! com
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On Fri, May 29, 2020 at 05:40:52PM +0300, Serge Semin wrote:
> According to the DW APB DMAC data book the minimum burst transaction
> length is 1 and it's true for any version of the controller since
> isn't parametrised in the coreAssembler so can't be changed at the
> IP-core synthesis stage. The maximum burst transaction can vary from
> channel to channel and from controller to controller depending on a
> IP-core parameter the system engineer activated during the IP-core
> synthesis. Let's initialise both min_burst and max_burst members of the
> DMA controller descriptor with extreme values so the DMA clients could
> use them to properly optimize the DMA requests. The channels and
> controller-specific max_burst length initialization will be introduced
> by the follow-up patches.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: linux-mips@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> 
> ---
> 
> Changelog v4:
> - This is a new patch suggested by Andy.
> 
> Changelog v5:
> - Introduce macro with extreme min and max burst length supported by the
>   DW DMA controller.
> - Initialize max_burst length capability with extreme burst length supported
>   by the DW DMAC IP-core.
> ---
>  drivers/dma/dw/core.c                | 2 ++
>  include/linux/platform_data/dma-dw.h | 2 ++
>  2 files changed, 4 insertions(+)
> 
> diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
> index ceded21537e2..4887aa2fc73c 100644
> --- a/drivers/dma/dw/core.c
> +++ b/drivers/dma/dw/core.c
> @@ -1229,6 +1229,8 @@ int do_dma_probe(struct dw_dma_chip *chip)
>  	dw->dma.device_issue_pending = dwc_issue_pending;
>  
>  	/* DMA capabilities */
> +	dw->dma.min_burst = DW_DMA_MIN_BURST;
> +	dw->dma.max_burst = DW_DMA_MAX_BURST;
>  	dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS;
>  	dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS;
>  	dw->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) |
> diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
> index f3eaf9ec00a1..369e41e9dcc9 100644
> --- a/include/linux/platform_data/dma-dw.h
> +++ b/include/linux/platform_data/dma-dw.h
> @@ -12,6 +12,8 @@
>  
>  #define DW_DMA_MAX_NR_MASTERS	4
>  #define DW_DMA_MAX_NR_CHANNELS	8
> +#define DW_DMA_MIN_BURST	1
> +#define DW_DMA_MAX_BURST	256
>  
>  /**
>   * struct dw_dma_slave - Controller-specific information about a slave
> -- 
> 2.26.2
> 

-- 
With Best Regards,
Andy Shevchenko


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