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List:       devicetree
Subject:    Re: [PATCH RESEND V4 3/9] of: Update Tegra XUSB pad controller binding for USB
From:       Andrew Bresticker <abrestic () chromium ! org>
Date:       2014-10-31 16:42:00
Message-ID: CAL1qeaGkTY9kOfLu6qXFQ=RFKzycknLbOUixv4Y+cVf5oY6jkg () mail ! gmail ! com
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On Fri, Oct 31, 2014 at 2:44 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Tue, Oct 28, 2014 at 11:27 PM, Andrew Bresticker
> <abrestic@chromium.org> wrote:
>
>> Add new bindings used for USB support by the Tegra XUSB pad controller.
>> This includes additional PHY types, USB-specific pinconfig properties, etc.
>>
>> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
>> Reviewed-by: Stephen Warren <swarren@nvidia.com>
>> ---
>> Changes from v2:
>>  - Added nvidia,otg-hs-curr-level-offset property.
>>  - Dropped "-otg" from VBUS supplies.
>>  - Added mbox-names property.
>>  - Removed extra whitespace.
>> Changes from v1:
>>  - Updated to use common mailbox bindings.
>>  - Made USB3 port-to-lane mappins a top-level binding rather than a pinconfig
>>    binding.
>>  - Add #defines for the padctl lanes.
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> I guess you will take this patch along with the rest through ARM SoC
> or so?

Yes, that's the plan.
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