[prev in list] [next in list] [prev in thread] [next in thread]
List: cfe-dev
Subject: Re: [cfe-dev] IEEE MICRO Special Issue on Compiling for Accelerators
From: Chris Lattner via cfe-dev <cfe-dev () lists ! llvm ! org>
Date: 2021-06-21 19:24:20
Message-ID: 594861F5-B181-4D51-8BCC-8225355893AF () nondot ! org
[Download RAW message or body]
[Attachment #2 (multipart/alternative)]
Hi Guido,
Our policy for the LLVM/Clang mailing lists is that they need to be specifically on \
topic for LLVM. Please do not send generic compiler-related conference CFP's here. \
Thank you!
-Chris
> On Jun 21, 2021, at 12:06 PM, Guido Araujo via cfe-dev <cfe-dev@lists.llvm.org> \
> wrote:
> Call for Papers: IEEE MICRO Special Issue on Compiling for Accelerators \
> <https://www.computer.org/digital-library/magazines/mi/call-for-papers-special-issue-on-compiling-for-accelerators>
>
> Submission Deadline: December 15, 2021
>
> Scope and Topics
>
> Hardware accelerators are rapidly becoming a central architectural feature to \
> improve computation power performance. CPU ISA extensions, custom-designed engines, \
> and FPGA-based systems have been proposed as acceleration architectures to improve \
> program execution in scientific, machine-learning, database, and other application \
> domains. Although much effort has been devoted to the design of accelerators, there \
> is still a large gap of knowledge on how to make effective use of and compile for \
> such architectures. This special issue of IEEE Micro will explore academic and \
> industrial research on topics that relate to compiling for accelerators.
> Topics of interest include, but are not limited to:
>
> ● Compiling for CPU ISA extensions
> ● Code generation for neural processing units
> ● Compiling for neural network training
> ● Programming linear algebra engines
> ● Code generation and programming for database accelerators
> ● Processor-accelerator interface design and programmability
> ● Compiling for energy efficiency
> ● Pattern matching and code replacement for acceleration instructions
> ● High-level synthesis design of custom engines
> ● DSL and parallel programming models for accelerators
> ● Compiler intermediate representation (IR) and optimization techniques for \
> accelerators ● Programming FPGAs for custom computing engines
> ● Tools and libraries to support code generation for accelerators
>
> Important Dates
>
> ● Submission Deadline: December 15, 2021
> ● Initial notifications: March 15, 2022
> ● Revised papers due: April 8, 2022
> ● Final notifications: May 13, 2022
> ● Final versions due: May 31, 2022
> ● Publication: July/August 2022
>
> Submission Guidelines
>
> Please see the Author Information page \
> <https://www.computer.org/csdl/magazine/mi/write-for-us/14289?title=Author%20Information&periodical=IEEE%20Micro> \
> and the Magazine Peer Review page \
> <https://www.computer.org/publications/author-resources/peer-review/magazines>for \
> more information. Please submit electronically through ScholarOne Manuscripts \
> <https://mc.manuscriptcentral.com/cs-ieee>, selecting this special-issue option. \
> Submitted manuscripts must not have been previously published or currently \
> submitted for publication elsewhere, and all manuscripts must be cleared for \
> publication. All previously published papers must have at least 30% new content \
> compared to any conference (or other) publication.
> Questions?
>
> Contact guest editors Guido Araujo and Lucas Wanner at micro4-22@computer.org \
> <mailto:micro4-22@computer.org>, or the editor-in-chief Lizy John at \
> ljohn@ece.utexas.edu <mailto:ljohn@ece.utexas.edu>. Please direct \
> ScholarOne-related questions to the IEEE Micro magazine assistant at \
> micro-ma@computer.org <mailto:micro-ma@computer.org>.
> ==========================================================
> _______________________________________________
> cfe-dev mailing list
> cfe-dev@lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-dev
[Attachment #5 (unknown)]
<html><head><meta http-equiv="Content-Type" content="text/html; \
charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; \
line-break: after-white-space;" class="">Hi Guido,<div class=""><br \
class=""></div><div class="">Our policy for the LLVM/Clang mailing lists is that they \
need to be specifically on topic for LLVM. Please do not send generic \
compiler-related conference CFP's here. Thank you!</div><div class=""><br \
class=""></div><div class="">-Chris<br class=""><div><br class=""><blockquote \
type="cite" class=""><div class="">On Jun 21, 2021, at 12:06 PM, Guido Araujo via \
cfe-dev <<a href="mailto:cfe-dev@lists.llvm.org" \
class="">cfe-dev@lists.llvm.org</a>> wrote:</div><br \
class="Apple-interchange-newline"><div class=""><div dir="ltr" class=""><div \
class="gmail_quote"><div dir="ltr" class=""><div class="gmail_quote"><div dir="ltr" \
class=""><div class="gmail_quote"><div dir="ltr" class=""><span \
id="m_6906282531167741454m_-2864398774447436606m_-7989899218557045702m_478696396879723 \
1300gmail-m_-3471980215352226228gmail-m_2131210229797738649m_-3548061914227134381gmail-docs-internal-guid-c49371c2-7fff-c557-5906-dee279266a75" \
class=""><div style="margin: 0cm; line-height: 115%; font-size: 11pt; font-family: \
Arial, sans-serif;" class=""><span style="font-size:11pt" class="">Call for \
Papers: </span><a \
href="https://www.computer.org/digital-library/magazines/mi/call-for-papers-special-issue-on-compiling-for-accelerators" \
style="font-size:11pt" target="_blank" class=""><b class="">IEEE MICRO Special Issue \
on Compiling for Accelerators</b></a><br class=""></div><p class="MsoNormal" \
style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span \
lang="EN" class=""> </span></p><div style="margin: 0cm; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><b class=""><span \
lang="EN" class="">Submission Deadline</span></b><span lang="EN" class="">: December \
15, 2021</span></div><p class="MsoNormal" \
style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span \
lang="EN" class=""> </span></p><div style="margin: 0cm; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><b class=""><span \
lang="EN" class="">Scope and Topics</span></b></div><p class="MsoNormal" \
style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span \
lang="EN" class=""> </span></p><div style="margin: 0cm; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><span lang="EN" \
class="">Hardware accelerators are rapidly becoming a central architectural feature \
to improve computation power performance. CPU ISA extensions, custom-designed \
engines, and FPGA-based systems have been proposed as acceleration architectures to \
improve program execution in scientific, machine-learning, database, and other \
application domains. Although much effort has been devoted to the design of \
accelerators, there is still a large gap of knowledge on how to make effective use of \
and compile for such architectures. This special issue of IEEE Micro will explore \
academic and industrial research on topics that relate to compiling for accelerators. \
</span></div><p class="MsoNormal" \
style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span \
lang="EN" class=""> </span></p><div style="margin: 0cm; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><span lang="EN" \
class="">Topics of interest include, but are not limited to:</span></div><p \
class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span \
lang="EN" class=""> </span></p><div style="margin: 0cm 0cm 0cm 36pt; \
line-height: 115%; font-size: 11pt; font-family: Arial, sans-serif;" class=""><span \
lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Compiling for CPU ISA extensions</span></div><div style="margin: \
0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: Arial, \
sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Code generation for neural processing units</span></div><div \
style="margin: 0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: \
Arial, sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Compiling for neural network training</span></div><div \
style="margin: 0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: \
Arial, sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Programming linear algebra engines</span></div><div style="margin: \
0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: Arial, \
sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Code generation and programming for database \
accelerators</span></div><div style="margin: 0cm 0cm 0cm 36pt; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><span lang="EN" \
class="">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Processor-accelerator interface design and \
programmability</span></div><div style="margin: 0cm 0cm 0cm 36pt; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><span lang="EN" \
class="">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Compiling for energy efficiency</span></div><div style="margin: \
0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: Arial, \
sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Pattern matching and code replacement for acceleration \
instructions</span></div><div style="margin: 0cm 0cm 0cm 36pt; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><span lang="EN" \
class="">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">High-level synthesis design of custom engines</span></div><div \
style="margin: 0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: \
Arial, sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">DSL and parallel programming models for \
accelerators</span></div><div style="margin: 0cm 0cm 0cm 36pt; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><span lang="EN" \
class="">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Compiler intermediate representation (IR) and optimization \
techniques for accelerators</span></div><div style="margin: 0cm 0cm 0cm 36pt; \
line-height: 115%; font-size: 11pt; font-family: Arial, sans-serif;" class=""><span \
lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Programming FPGAs for custom computing engines</span></div><div \
style="margin: 0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: \
Arial, sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Tools and libraries to support code generation for \
accelerators</span></div><p class="MsoNormal" style="margin:0cm 0cm 0cm \
36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN" \
class=""> </span></p><div style="margin: 0cm; line-height: 115%; font-size: \
11pt; font-family: Arial, sans-serif;" class=""><b class=""><span lang="EN" \
class="">Important Dates</span></b></div><div style="margin: 0cm; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><b class=""><span \
lang="EN" class=""> </span></b></div><div style="margin: 0cm 0cm 0cm 36pt; \
line-height: 115%; font-size: 11pt; font-family: Arial, sans-serif;" class=""><span \
lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Submission Deadline: December 15, 2021</span></div><div \
style="margin: 0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: \
Arial, sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Initial notifications: March 15, 2022</span></div><div \
style="margin: 0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: \
Arial, sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Revised papers due: April 8, 2022</span></div><div style="margin: \
0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: Arial, \
sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Final notifications: May 13, 2022</span></div><div style="margin: \
0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: Arial, \
sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Final versions due: May 31, 2022</span></div><div style="margin: \
0cm 0cm 0cm 36pt; line-height: 115%; font-size: 11pt; font-family: Arial, \
sans-serif;" class=""><span lang="EN" class="">●<span \
style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times \
New Roman"" class=""> </span></span><span \
lang="EN" class="">Publication: July/August 2022</span></div><p class="MsoNormal" \
style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span \
lang="EN" class=""> </span></p><div style="margin: 0cm; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><b class=""><span \
lang="EN" class="">Submission Guidelines</span></b></div><div style="margin: 0cm; \
line-height: 115%; font-size: 11pt; font-family: Arial, sans-serif;" class=""><b \
class=""><span lang="EN" class=""> </span></b></div><div style="margin: 0cm; \
line-height: 115%; font-size: 11pt; font-family: Arial, sans-serif;" class=""><span \
lang="EN" class="">Please see the <a \
href="https://www.computer.org/csdl/magazine/mi/write-for-us/14289?title=Author%20Information&periodical=IEEE%20Micro" \
target="_blank" class="">Author Information page</a> and the <a \
href="https://www.computer.org/publications/author-resources/peer-review/magazines" \
target="_blank" class="">Magazine Peer Review page </a>for more information. Please \
submit electronically through <a href="https://mc.manuscriptcentral.com/cs-ieee" \
target="_blank" class="">ScholarOne Manuscripts</a>, selecting this special-issue \
option. Submitted manuscripts must not have been previously published or currently \
submitted for publication elsewhere, and all manuscripts must be cleared for \
publication. All previously published papers must have at least 30% new content \
compared to any conference (or other) publication. </span></div><p class="MsoNormal" \
style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span \
lang="EN" class=""> </span></p><div style="margin: 0cm; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><b class=""><span \
lang="EN" class="">Questions?</span></b></div><div style="margin: 0cm; line-height: \
115%; font-size: 11pt; font-family: Arial, sans-serif;" class=""><b class=""><span \
lang="EN" class=""> </span></b></div><div style="margin: 0cm; line-height: 115%; \
font-size: 11pt; font-family: Arial, sans-serif;" class=""><span lang="EN" \
class="">Contact guest editors Guido Araujo and Lucas Wanner at <a \
href="mailto:micro4-22@computer.org" target="_blank" \
class="">micro4-22@computer.org</a>, or the editor-in-chief Lizy John at <a \
href="mailto:ljohn@ece.utexas.edu" target="_blank" \
class="">ljohn@ece.utexas.edu</a>.</span></div><div style="margin: 0cm; line-height: \
115%; font-size: 11pt; font-family: Arial, sans-serif;" class=""><span lang="EN" \
class="">Please direct ScholarOne-related questions to the IEEE Micro magazine \
assistant at <a href="mailto:micro-ma@computer.org" target="_blank" \
class="">micro-ma@computer.org</a>.</span></div><p class="MsoNormal" \
style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span \
lang="EN" class=""> </span></p><p dir="ltr" \
style="line-height:1.38;margin-top:0pt;margin-bottom:0pt" class="">
</p><div style="margin: 0cm; line-height: 115%; font-size: 11pt; font-family: Arial, \
sans-serif;" class=""><span lang="EN" \
class="">==========================================================</span></div></span></div></div></div></div></div></div></div>
_______________________________________________<br class="">cfe-dev mailing list<br \
class=""><a href="mailto:cfe-dev@lists.llvm.org" \
class="">cfe-dev@lists.llvm.org</a><br \
class="">https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-dev<br \
class=""></div></blockquote></div><br class=""></div></body></html>
[Attachment #6 (text/plain)]
_______________________________________________
cfe-dev mailing list
cfe-dev@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-dev
[prev in list] [next in list] [prev in thread] [next in thread]
Configure |
About |
News |
Add a list |
Sponsored by KoreLogic