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List:       busybox
Subject:    Re: how to enable cache flushes for hard disk?
From:       kaimi <dishui () gmail ! com>
Date:       2007-05-23 1:38:09
Message-ID: a30a0a1f0705221838u33920f43k32344a7b4bdb6b50 () mail ! gmail ! com
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thank a lot
there's no PCI bus on TARGET, there's no DMA enalbed yet, I'll work on this
in the coming days, it's a great appreciation to get your instructions in
advance. In short, to accelerate the HD, how to speed up "hdparm -T xxx"
and how to enable DMA, I'm a newbie on device driver. please check the
following messages:

[root@test ~]# dmesg
Linux version 2.6.20 (root@localhost.localdomain) (gcc version 3.4.1) #35
Tue May 22 17:28:17 CST 2007
CPU: ARM920T [41129200] revision 0 (ARMv4T), cr=00007177
Machine: SMDK2410
Warning: bad configuration page, trying to continue
Memory policy: ECC disabled, Data cache writeback
On node 0 totalpages: 4096
  DMA zone: 32 pages used for memmap
  DMA zone: 0 pages reserved
  DMA zone: 4064 pages, LIFO batch:0
  Normal zone: 0 pages used for memmap
CPU S3C2410A (id 0x32410002)
S3C2410: core 202.800 MHz, memory 101.400 MHz, peripheral 50.700 MHz
S3C24XX Clocks, (c) 2004 Simtec Electronics
CLOCK: Slow mode (1.500 MHz), fast, MPLL on, UPLL on
CPU0: D VIVT write-back cache
CPU0: I cache: 16384 bytes, associativity 64, 32 byte lines, 8 sets
CPU0: D cache: 16384 bytes, associativity 64, 32 byte lines, 8 sets
Built 1 zonelists.  Total pages: 4064
Kernel command line: noinitrd root=/dev/mtdblock2 init=/linuxrc
console=ttySAC0,115200
irq: clearing subpending status 00000002
PID hash table entries: 64 (order: 6, 256 bytes)
timer tcon=00500000, tcnt a509, tcfg 00000200,00000000, usec 00001e4c
Console: colour dummy device 80x30
selected clock c025146c (pclk) quot 27, calc 113169
Dentry cache hash table entries: 2048 (order: 1, 8192 bytes)
Inode-cache hash table entries: 1024 (order: 0, 4096 bytes)
Memory: 16MB = 16MB total
Memory: 13716KB available (2180K code, 223K data, 84K init)
Calibrating delay loop... 50.48 BogoMIPS (lpj=126208)
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
S3C24XX DMA Driver, (c) 2003-2004,2006 Simtec Electronics
Registering sysclass
DMA channel 0 at c1800000, irq 33
DMA channel 1 at c1800040, irq 34
DMA channel 2 at c1800080, irq 35
DMA channel 3 at c18000c0, irq 36
NET: Registered protocol family 16
S3C2410 Power Management, (c) 2004 Simtec Electronics
S3C2410: Initialising architecture
 0:               xdreq0, channels 0---
 1:               xdreq1, channels -1--
 2:                  sdi, channels 0-23
 3:                 spi0, channels -1--
 4:                 spi1, channels ---3
 5:                uart0, channels 0---
 6:                uart1, channels -1--
 7:                uart2, channels ---3
 8:                timer, channels 0-23
 9:              i2s-sdi, channels -12-
10:              i2s-sdo, channels --2-
11:               <NULL>, channels ----
12:               <NULL>, channels ----
13:               <NULL>, channels ----
14:              usb-ep1, channels 0---
15:              usb-ep2, channels -1--
16:              usb-ep3, channels --2-
17:              usb-ep4, channels ---3
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 1024 (order: 0, 4096 bytes)
TCP bind hash table entries: 512 (order: -1, 2048 bytes)
TCP: Hash tables configured (established 1024 bind 512)
TCP reno registered
NetWinder Floating Point Emulator V0.97 (double precision)
yaffs May 21 2007 09:39:24 Installing.
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
Console: switching to colour frame buffer device 80x25
fb0: Virtual frame buffer device, using 1024K of video memory
s3c2410-uart.0: s3c2410_serial0 at MMIO 0x50000000 (irq = 70) is a S3C2410
s3c2410-uart.1: s3c2410_serial1 at MMIO 0x50004000 (irq = 73) is a S3C2410
s3c2410-uart.2: s3c2410_serial2 at MMIO 0x50008000 (irq = 76) is a S3C2410
dm9000 Ethernet Driver
The ID of dm9000 is 0x90000a46.
eth0: dm9000 at c1910000,c1912004 IRQ 16 MAC: 08:00:3e:26:0a:5b
Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx
return valude of ide_hwif_request_regions is 0
Probing IDE interface ide0...
hda: probing with STATUS(0x50) instead of ALTSTATUS(0x00)
before read id info cfs_xx is 0x0
after read id info cfs_xx is 0x201
hda: ST340016A, ATA DISK drive
hdb: probing with STATUS(0x00) instead of ALTSTATUS(0xa5)
hdb: probing with STATUS(0x00) instead of ALTSTATUS(0xa5)
ide1: I/O resource 0xF1800010-0xF1800010 not free.
return valude of ide_hwif_request_regions is -16
ide1: ports already in use, skipping probe
ide2: I/O resource 0xF1800010-0xF1800010 not free.
return valude of ide_hwif_request_regions is -16
ide2: ports already in use, skipping probe
ide3: I/O resource 0xF1800010-0xF1800010 not free.
return valude of ide_hwif_request_regions is -16
ide3: ports already in use, skipping probe
ide0 at 0xf1800020-0xf1800027,0xf1800010 on irq 50
hda: max request size: 128KiB
hda: 78165360 sectors (40020 MB) w/2048KiB Cache, CHS=65535/16/63
driver-nofulsh=0 ,drive->addressing =0 capacity =4a8b570 id)->cfs_enable_2 =
0x0
hda: cache flushes not supported
 hda: hda1
S3C24XX NAND Driver, (c) 2004 Simtec Electronics
s3c2410-nand s3c2410-nand: Tacls=3, 29ns Twrph0=7 69ns, Twrph1=3 29ns
NAND device: Manufacturer ID: 0xec, Chip ID: 0x76 (Samsung NAND 64MiB 3,3V
8-bit)
Scanning device for bad blocks
Creating 6 MTD partitions on "NAND 64MiB 3,3V 8-bit":
0x00000000-0x00100000 : "BootLoader"
0x00100000-0x00900000 : "Kernel"
0x00900000-0x01000000 : "Root FileSystem"
0x01000000-0x02000000 : "Applications1"
0x02000000-0x03400000 : "Applications2"
0x03400000-0x04000000 : "Configuration /etc"
mice: PS/2 mouse device common for all mice
TCP cubic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
VFS: Mounted root (cramfs filesystem) readonly.
Freeing init memory: 84K
selected clock c025146c (pclk) quot 27, calc 113169
selected clock c025146c (pclk) quot 27, calc 113169
selected clock c025146c (pclk) quot 27, calc 113169
yaffs: dev is 32505861 name is "mtdblock5"
yaffs: Attempting MTD mount on 31.5, "mtdblock5"
yaffs: auto selecting yaffs1
eth0: link up, 10Mbps, half-duplex, lpa 0x0021

[root@test tmp]# hdparm -I /dev/hda

/dev/hda:

ATA device, with non-removable media
    Model Number:       ST340016A
    Serial Number:      3HSAKKC2
    Firmware Revision:  3.19
Standards:
    Supported: 5 4 3
    Likely used: 6
Configuration:
    Logical        max    current
    cylinders    16383    16383
    heads        16    16
    sectors/track    63    63
    --
    CHS current addressable sectors:   16514064
    LBA    user addressable sectors:   78165360
    device size with M = 1024*1024:       38166 MBytes
    device size with M = 1000*1000:       40020 MBytes (40 GB)
Capabilities:
    LBA, IORDY(can be disabled)
    bytes avail on r/w long: 4
    Standby timer values: spec'd by Standard
    R/W multiple sector transfer: Max = 16    Current = ?
    Recommended acoustic management value: 128, current value: 128
    DMA: mdma0 mdma1 *mdma2 udma0 udma1 udma2 udma3 udma4 udma5
         Cycle time: min=120ns recommended=120ns
    PIO: pio0 pio1 pio2 pio3 pio4
         Cycle time: no flow control=240ns  IORDY flow control=120ns
Commands/features:
    Enabled    Supported:
       *    SMART feature set
            Security Mode feature set
       *    Power Management feature set
       *    Write cache
       *    Look-ahead
       *    Host Protected Area feature set
       *    WRITE_BUFFER command
       *    READ_BUFFER command
       *    DOWNLOAD_MICROCODE
            SET_MAX security extension
       *    Automatic Acoustic Management feature set
            Device Configuration Overlay feature set
Security:
    Master password revision code = 65534
        supported
    not    enabled
    not    locked
    not    frozen
    not    expired: security count
    not    supported: enhanced erase
HW reset results:
    CBLID- above Vih
    Device num = 1
Checksum: correct


On 5/23/07, Denis Vlasenko <vda.linux@googlemail.com> wrote:
>
> On Tuesday 22 May 2007 07:27, kaimi wrote:
> > hi,all
> >     I want to enable cache flushes for my hd on s3c2410 & linux-2.6.20,
> > ide_id_has_flush_cache() return 0 because cfs_enable_2 is 0x201, while
> it
> > needs 0x3000, I found out that 0x201 was from 512 bytes of id
> > info,implemented in static void ata_input_data(ide_drive_t *drive, void
> > *buffer, u32 wcount)
> > the question is, does it mean my hd does not support cache flush on hw
> > layer? if not, how to enable?
> > thanks for the coming help!
>
> "Cache flush" has nothing to do with hdparm -T.
>
> hdparm -T measures reads done repeatedly at start of device:
>
>                 do {
>                         ++iterations;
>                         if (seek_to_zero(fd) || read_big_block(fd, buf))
>                                 goto quit;
>                         getitimer(ITIMER_REAL, &e2);
>                         elapsed = (e1.it_value.tv_sec - e2.it_value.tv_sec
> )
>                                 + ((e1.it_value.tv_usec -
> e2.it_value.tv_usec) / 1000000.0);
>                 } while (elapsed < 2.0);
>
> [read_big_block is simply read(TIMING_BUF_BYTES) + dirty
> each sector's first byte]
>
> Any non-ancient disk and kernel will cache the data after
> the first read. Subsequent reads depend on the speed
> of IDE bus, CPU, and memory. Now imagine now vastly different
> those are is your PC and your target machine.
> --
> vda
>

[Attachment #5 (text/html)]

thank a lot<br>there&#39;s no PCI bus on TARGET, there&#39;s no DMA enalbed
yet, I&#39;ll work on this in the coming days, it&#39;s a great appreciation to
get your instructions in advance. In short, to accelerate the HD, how
to speed up &quot;hdparm -T xxx&quot;&nbsp; and how to enable DMA, I&#39;m a newbie \
on device driver. please check the following messages:
<br><br>[root@test ~]# dmesg<br>Linux version 2.6.20 (<a \
href="mailto:root@localhost.localdomain" target="_blank" onclick="return \
top.js.OpenExtLink(window,event,this)">root@localhost.localdomain</a>) (gcc version \
3.4.1) #35 Tue May 22 17:28:17 CST 2007 <br>CPU: ARM920T [41129200] revision 0 \
(ARMv4T), cr=00007177 <br>Machine: SMDK2410<br>Warning: bad configuration page, \
trying to continue<br>Memory policy: ECC disabled, Data cache writeback<br>On node 0 \
totalpages: 4096<br>&nbsp; DMA zone: 32 pages used for memmap<br>&nbsp; DMA zone: 0 \
pages reserved <br>&nbsp; DMA zone: 4064 pages, LIFO batch:0<br>&nbsp; Normal zone: 0 \
pages used for memmap<br>CPU S3C2410A (id 0x32410002)<br>S3C2410: core 202.800 MHz, \
memory 101.400 MHz, peripheral 50.700 MHz<br>S3C24XX Clocks, (c) 2004 Simtec \
Electronics <br>CLOCK: Slow mode (1.500 MHz), fast, MPLL on, UPLL on<br>CPU0: D VIVT \
write-back cache<br>CPU0: I cache: 16384 bytes, associativity 64, 32 byte lines, 8 \
sets<br>CPU0: D cache: 16384 bytes, associativity 64, 32 byte lines, 8 sets <br>Built \
1 zonelists.&nbsp; Total pages: 4064<br>Kernel command line: noinitrd \
root=/dev/mtdblock2 init=/linuxrc console=ttySAC0,115200<br>irq: clearing subpending \
status 00000002<br>PID hash table entries: 64 (order: 6, 256 bytes) <br>timer \
tcon=00500000, tcnt a509, tcfg 00000200,00000000, usec 00001e4c<br>Console: colour \
dummy device 80x30<br>selected clock c025146c (pclk) quot 27, calc 113169<br>Dentry \
cache hash table entries: 2048 (order: 1, 8192 bytes) <br>Inode-cache hash table \
entries: 1024 (order: 0, 4096 bytes)<br>Memory: 16MB = 16MB total<br>Memory: 13716KB \
available (2180K code, 223K data, 84K init)<br>Calibrating delay loop... 50.48 \
BogoMIPS (lpj=126208)<br>Mount-cache hash table entries: 512 <br>CPU: Testing write \
buffer coherency: ok<br>S3C24XX DMA Driver, (c) 2003-2004,2006 Simtec \
Electronics<br>Registering sysclass<br>DMA channel 0 at c1800000, irq 33<br>DMA \
channel 1 at c1800040, irq 34<br>DMA channel 2 at c1800080, irq 35 <br>DMA channel 3 \
at c18000c0, irq 36<br>NET: Registered protocol family 16<br>S3C2410 Power \
Management, (c) 2004 Simtec Electronics<br>S3C2410: Initialising \
architecture<br>&nbsp;0:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
xdreq0, channels 0---<br>&nbsp;1:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
xdreq1, channels -1-- \
<br>&nbsp;2:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
sdi, channels 0-23<br>&nbsp;3:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
spi0, channels -1--<br>&nbsp;4:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
spi1, channels ---3<br>&nbsp;5:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
uart0, channels 0---<br>&nbsp;6:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
uart1, channels -1--<br>&nbsp;7:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
uart2, channels ---3 \
<br>&nbsp;8:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
timer, channels 0-23<br>&nbsp;9:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
i2s-sdi, channels -12-<br>10:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
i2s-sdo, channels --2-<br>11:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
&lt;NULL&gt;, channels \
----<br>12:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
&lt;NULL&gt;, channels ---- \
<br>13:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
&lt;NULL&gt;, channels \
----<br>14:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
usb-ep1, channels 0---<br>15:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
usb-ep2, channels -1--<br>16:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
usb-ep3, channels --2-<br>17:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
usb-ep4, channels ---3 <br>NET: Registered protocol family 2<br>IP route cache hash \
table entries: 1024 (order: 0, 4096 bytes)<br>TCP established hash table entries: \
1024 (order: 0, 4096 bytes)<br>TCP bind hash table entries: 512 (order: -1, 2048 \
bytes) <br>TCP: Hash tables configured (established 1024 bind 512)<br>TCP reno \
registered<br>NetWinder Floating Point Emulator V0.97 (double precision)<br>yaffs May \
21 2007 09:39:24 Installing. <br>io scheduler noop registered<br>

io scheduler anticipatory registered<br>io scheduler deadline registered<br>io \
scheduler cfq registered (default)<br>Console: switching to colour frame buffer \
device 80x25<br>fb0: Virtual frame buffer device, using 1024K of video memory \
<br>s3c2410-uart.0: s3c2410_serial0 at MMIO 0x50000000 (irq = 70) is a \
S3C2410<br>s3c2410-uart.1: s3c2410_serial1 at MMIO 0x50004000 (irq = 73) is a \
S3C2410<br>s3c2410-uart.2: s3c2410_serial2 at MMIO 0x50008000 (irq = 76) is a S3C2410 \
<br>dm9000 Ethernet Driver<br>The ID of dm9000 is 0x90000a46.<br>eth0: dm9000 at \
c1910000,c1912004 IRQ 16 MAC: 08:00:3e:26:0a:5b<br>Uniform Multi-Platform E-IDE \
driver Revision: 7.00alpha2<br>ide: Assuming 50MHz system bus speed for PIO modes; \
override with idebus=xx <br>return valude of ide_hwif_request_regions is 0<br>Probing \
IDE interface ide0...<br>hda: probing with STATUS(0x50) instead of \
ALTSTATUS(0x00)<br>before read id info cfs_xx is 0x0<br>after read id info cfs_xx is \
0x201<br>

hda: ST340016A, ATA DISK drive<br>hdb: probing with STATUS(0x00) instead of \
ALTSTATUS(0xa5)<br>hdb: probing with STATUS(0x00) instead of ALTSTATUS(0xa5)<br>ide1: \
I/O resource 0xF1800010-0xF1800010 not free.<br>return valude of \
ide_hwif_request_regions is -16 <br>ide1: ports already in use, skipping \
probe<br>ide2: I/O resource 0xF1800010-0xF1800010 not free.<br>return valude of \
ide_hwif_request_regions is -16<br>ide2: ports already in use, skipping \
probe<br>ide3: I/O resource 0xF1800010-0xF1800010 not free. <br>return valude of \
ide_hwif_request_regions is -16<br>ide3: ports already in use, skipping probe<br>ide0 \
at 0xf1800020-0xf1800027,0xf180001<div id="mb_8">0 on irq 50<br>hda: max request \
size: 128KiB<br>hda: 78165360 sectors (40020 MB) w/2048KiB Cache, CHS=65535/16/63 \
<br>driver-nofulsh=0 ,drive-&gt;addressing =0 capacity =4a8b570 id)-&gt;cfs_enable_2 \
= 0x0<br>hda: cache flushes not supported<br>&nbsp;hda: hda1<br>S3C24XX NAND Driver, \
(c) 2004 Simtec Electronics<br>s3c2410-nand s3c2410-nand: Tacls=3, 29ns Twrph0=7 \
69ns, Twrph1=3 29ns <br>NAND device: Manufacturer ID: 0xec, Chip ID: 0x76 (Samsung \
NAND 64MiB 3,3V 8-bit)<br>Scanning device for bad blocks<br>Creating 6 MTD partitions \
on &quot;NAND 64MiB 3,3V 8-bit&quot;:<br>0x00000000-0x00100000 : \
&quot;BootLoader&quot; <br>0x00100000-0x00900000 : \
&quot;Kernel&quot;<br>0x00900000-0x01000000 : &quot;Root \
FileSystem&quot;<br>0x01000000-0x02000000 : \
&quot;Applications1&quot;<br>0x02000000-0x03400000 : \
&quot;Applications2&quot;<br>0x03400000-0x04000000 : &quot;Configuration /etc&quot; \
<br>mice: PS/2 mouse device common for all mice<br>TCP cubic registered<br>NET: \
Registered protocol family 1<br>NET: Registered protocol family 17<br>VFS: Mounted \
root (cramfs filesystem) readonly.<br>Freeing init memory: 84K <br>selected clock \
c025146c (pclk) quot 27, calc 113169<br>selected clock c025146c (pclk) quot 27, calc \
113169<br>selected clock c025146c (pclk) quot 27, calc 113169<br>yaffs: dev is \
32505861 name is &quot;mtdblock5&quot; <br>yaffs: Attempting MTD mount on 31.5, \
&quot;mtdblock5&quot;<br>yaffs: auto selecting yaffs1<br>eth0: link up, 10Mbps, \
half-duplex, lpa 0x0021<br><br>[root@test tmp]# hdparm -I \
/dev/hda<br><br>/dev/hda:<br><br>ATA device, with non-removable media \
<br>&nbsp;&nbsp;&nbsp; Model Number:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
ST340016A&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp \
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
<br>&nbsp;&nbsp;&nbsp; Serial Number:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
3HSAKKC2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; \
<br>&nbsp;&nbsp;&nbsp; Firmware Revision:&nbsp; 3.19&nbsp;&nbsp;&nbsp; \
<br>Standards:<br>&nbsp;&nbsp;&nbsp; Supported: 5 4 3 <br>&nbsp;&nbsp;&nbsp; Likely \
used: 6<br>Configuration: <br>&nbsp;&nbsp;&nbsp; Logical&nbsp;&nbsp;&nbsp; \
&nbsp;&nbsp;&nbsp; max&nbsp;&nbsp;&nbsp; current<br>&nbsp;&nbsp;&nbsp; \
cylinders&nbsp;&nbsp;&nbsp; 16383&nbsp;&nbsp;&nbsp; 16383<br>&nbsp;&nbsp;&nbsp; \
heads&nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; 16&nbsp;&nbsp;&nbsp; \
16<br>&nbsp;&nbsp;&nbsp; sectors/track&nbsp;&nbsp;&nbsp; 63&nbsp;&nbsp;&nbsp; \
63<br>&nbsp;&nbsp;&nbsp; --<br>&nbsp;&nbsp;&nbsp; CHS current addressable \
sectors:&nbsp;&nbsp; 16514064<br>&nbsp;&nbsp;&nbsp; LBA&nbsp;&nbsp;&nbsp; user \
addressable sectors:&nbsp;&nbsp; 78165360 <br>&nbsp;&nbsp;&nbsp; device size with M = \
1024*1024:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 38166 MBytes<br>&nbsp;&nbsp;&nbsp; \
device size with M = 1000*1000:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 40020 MBytes (40 \
GB)<br>Capabilities:<br>&nbsp;&nbsp;&nbsp; LBA, IORDY(can be \
disabled)<br>&nbsp;&nbsp;&nbsp; bytes avail on r/w long: 4<br>&nbsp;&nbsp;&nbsp; \
Standby timer values: spec&#39;d by Standard <br>&nbsp;&nbsp;&nbsp; R/W multiple \
sector transfer: Max = 16&nbsp;&nbsp;&nbsp; Current = ?<br>&nbsp;&nbsp;&nbsp; \
Recommended acoustic management value: 128, current value: 128<br>&nbsp;&nbsp;&nbsp; \
DMA: mdma0 mdma1 *mdma2 udma0 udma1 udma2 udma3 udma4 udma5 <br>&nbsp;&nbsp;&nbsp; \
&nbsp;&nbsp;&nbsp;&nbsp; Cycle time: min=120ns recommended=120ns \
<br>&nbsp;&nbsp;&nbsp; PIO: pio0 pio1 pio2 pio3 pio4 <br>&nbsp;&nbsp;&nbsp; \
&nbsp;&nbsp;&nbsp;&nbsp; Cycle time: no flow control=240ns&nbsp; IORDY flow \
control=120ns<br>Commands/features:<br>&nbsp;&nbsp;&nbsp; Enabled&nbsp;&nbsp;&nbsp; \
Supported:<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; *&nbsp;&nbsp;&nbsp; SMART feature \
set<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; Security Mode feature \
set <br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; *&nbsp;&nbsp;&nbsp; Power Management feature \
set<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; *&nbsp;&nbsp;&nbsp; Write \
cache<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; *&nbsp;&nbsp;&nbsp; \
Look-ahead<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; *&nbsp;&nbsp;&nbsp; Host Protected Area \
feature set<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; *&nbsp;&nbsp;&nbsp; WRITE_BUFFER \
command<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; *&nbsp;&nbsp;&nbsp; READ_BUFFER \
command<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; *&nbsp;&nbsp;&nbsp; DOWNLOAD_MICROCODE \
<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; SET_MAX security \
extension<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; *&nbsp;&nbsp;&nbsp; Automatic Acoustic \
Management feature set<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; \
Device Configuration Overlay feature set<br>Security: <br>&nbsp;&nbsp;&nbsp; Master \
password revision code = 65534<br>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; supported \
<br>&nbsp;&nbsp;&nbsp; not&nbsp;&nbsp;&nbsp; enabled<br>&nbsp;&nbsp;&nbsp; \
not&nbsp;&nbsp;&nbsp; locked<br>&nbsp;&nbsp;&nbsp; not&nbsp;&nbsp;&nbsp; \
frozen<br>&nbsp;&nbsp;&nbsp; not&nbsp;&nbsp;&nbsp; expired: security \
count<br>&nbsp;&nbsp;&nbsp; not&nbsp;&nbsp;&nbsp; supported: enhanced erase<br>HW \
reset results:<br>&nbsp;&nbsp;&nbsp; CBLID- above Vih<br>&nbsp;&nbsp;&nbsp; Device \
num = 1<br>Checksum: correct </div><br><br><div><span class="gmail_quote">On 5/23/07, \
<b class="gmail_sendername">Denis Vlasenko</b> &lt;<a \
href="mailto:vda.linux@googlemail.com">vda.linux@googlemail.com</a>&gt; \
wrote:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, \
204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;"> On Tuesday 22 May 2007 \
07:27, kaimi wrote:<br>&gt; hi,all<br>&gt;&nbsp;&nbsp;&nbsp;&nbsp; I want to enable \
cache flushes for my hd on s3c2410 &amp; linux-2.6.20,<br>&gt; \
ide_id_has_flush_cache() return 0 because cfs_enable_2 is 0x201, while it <br>&gt; \
needs 0x3000, I found out that 0x201 was from 512 bytes of id<br>&gt; \
info,implemented in static void ata_input_data(ide_drive_t *drive, void<br>&gt; \
*buffer, u32 wcount)<br>&gt; the question is, does it mean my hd does not support \
cache flush on hw <br>&gt; layer? if not, how to enable?<br>&gt; thanks for the \
coming help!<br><br>&quot;Cache flush&quot; has nothing to do with hdparm \
-T.<br><br>hdparm -T measures reads done repeatedly at start of \
device:<br><br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;do \
{ <br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n \
bsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;++iterations;<br>&nbsp \
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;if \
(seek_to_zero(fd) || read_big_block(fd, \
buf))<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp \
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;goto \
quit;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp \
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;getitimer(ITIMER_REAL, \
&amp;e2); <br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;elapsed \
= (e1.it_value.tv_sec - \
e2.it_value.tv_sec)<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb \
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;+ \
((e1.it_value.tv_usec - e2.it_value.tv_usec) / \
1000000.0);<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;} \
while (elapsed &lt; 2.0); <br><br>[read_big_block is simply read(TIMING_BUF_BYTES) + \
dirty<br>each sector&#39;s first byte]<br><br>Any non-ancient disk and kernel will \
cache the data after<br>the first read. Subsequent reads depend on the speed<br> of \
IDE bus, CPU, and memory. Now imagine now vastly different<br>those are is your PC \
and your target machine.<br>--<br>vda<br></blockquote></div><br>



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