[prev in list] [next in list] [prev in thread] [next in thread] 

List:       bochs-dev
Subject:    Re: [Bochs-developers] Pic Priorities, polled and autoeoi
From:       Dave Poirier <eks () void-core ! 2y ! net>
Date:       2001-11-26 18:48:41
[Download RAW message or body]

On Mon, Nov 26, 2001 at 04:08:35PM +0000, Cliff Hones wrote:
> I'd like to try clearing up a couple of misconceptions regarding the PIC.
> 
> Dave Poirier wrote:
> 
> > When an IRQ is masked and the device raises an IRQ, the real PIC will
> > set some bit inside to indicate to trigger an INT for this IRQ when it
> > is unmasked.  If a Specific-EOI is sent to the PIC for this IRQ while it
> > is still masked, the PIC will clear the bit indicating to raise an INT
> > when the IRQ will be unmasked.
> >
> > The current implementation, AFAIK, doesn't clear this INT request.
> 
> On a real PIC the Specific EOI command clears the bit in the Interrupt Service
> Register (ISR), not the IRR.  If the IRQ was masked and so never caused
> an interrupt, the ISR bit will already be clear and the Specific EOI will
> have no effect.  If you want to avoid the interrupt being signalled
> when it is unmasked, you need to remove the source of the interrupt
> (ie program the device to lower its IRQ line).
> 
> > originally the irr bit wasn't cleared, which caused an int to be fired
> > for the requested irq specifically acknowledged while masked.
> 
> The Bochs PIC implementation is technically wrong if it clears the
> IRR on specific EOI.  However, the reason it's done that
> way is because (as Dave later mentions) we currently don't
> properly implement the ability for a driver to raise and
> lower its IR.  Almost always, a device wants to signal just the once
> that it would like an interrupt, and have the request automatically
> cleared when the interrupt occurs.  Even when operating in egde-mode,
> this is not what a real PIC does.  The reason for the confusion may
> well be the rather poor edge/level description in the Intel spec.
> 
> Dave's description of timer interrupts also needs amplification.
> 
> As I find the Intel PIC spec rather difficult to interpret,
> I have a slightly simplified description of the real PIC chip,
> which I hope will be useful, followed by some notes
> concerning Bochs.  Apologies for the length, and I hope this
> doesn't confuse even more!
> 
> -- Cliff
> 
> 
> Intel 8259A PIC operation
> =========================
> 
> Overview:
(snip!)

Well, that does clear alot of things, without even mentioning the fact
it is easy to understand and, IMHO, well written.

I hope we will eventually go into implementing the proper hardware
model, otherwise we will keep having difficulty with some oses.

EKS - Dave Poirier

_______________________________________________
bochs-developers mailing list
bochs-developers@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/bochs-developers

[prev in list] [next in list] [prev in thread] [next in thread] 

Configure | About | News | Add a list | Sponsored by KoreLogic