[prev in list] [next in list] [prev in thread] [next in thread]
List: bochs-dev
Subject: [Bochs-developers] Pic Priorities, polled and autoeoi
From: Jonathan Hunt <jhuntnz () users ! sourceforge ! net>
Date: 2001-11-24 10:56:08
[Download RAW message or body]
This is a MIME-formatted message. If you see this text it means that your
E-mail software does not support MIME-formatted messages.
Hi again,
Attached as PATCH.picpriorities is a patch for the current cvs version of
bochs that should add support for priorities, polled mode and auto eoi mode.
WARNING: I have not tested these changes any further than to make sure that
l4 fiasco still boots under bochs. I personally DO NOT guarantee they work
yet. I don't think it should go into HEAD yet but since I'm between exams
right now I might not have time to test it for a bit so if any one wants to
try it and tell me what I broke go ahead. Also if anyone has test cases of
unusual things (ie using polled and autoeoi modes) please send them to me to
test.
Oh and while I'm at it if there is anything else in pic model that needs
improving/implementing please let me know. I may as well finish what I
started.
Jonathan Hunt
--
Jonathan Hunt (The Real Jonathan Hunt) <jhuntnz@users.sf.net>
Jabber at jhuntnz@jabber.com
"He is no fool who gives what he cannot keep to gain what he cannot lose."
Jim Elliot
["PATCH.picpriorities" (text/x-c)]
Index: iodev/pic.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/iodev/pic.cc,v
retrieving revision 1.15
diff -u -r1.15 pic.cc
--- iodev/pic.cc 2001/11/19 14:41:03 1.15
+++ iodev/pic.cc 2001/11/24 10:01:31
@@ -85,6 +85,9 @@
BX_PIC_THIS s.master_pic.init.requires_4 = 0;
BX_PIC_THIS s.master_pic.init.byte_expected = 0;
BX_PIC_THIS s.master_pic.special_mask = 0;
+ BX_PIC_THIS s.master_pic.lowest_priority = 7;
+ BX_PIC_THIS s.master_pic.polled = 0;
+ BX_PIC_THIS s.master_pic.rotate_on_autoeoi = 0;
BX_PIC_THIS s.slave_pic.single_PIC = 0;
BX_PIC_THIS s.slave_pic.interrupt_offset = 0x70; /* IRQ8 = INT 0x70 */
@@ -103,6 +106,10 @@
BX_PIC_THIS s.slave_pic.init.requires_4 = 0;
BX_PIC_THIS s.slave_pic.init.byte_expected = 0;
BX_PIC_THIS s.slave_pic.special_mask = 0;
+ BX_PIC_THIS s.slave_pic.lowest_priority = 7;
+ BX_PIC_THIS s.slave_pic.polled = 0;
+ BX_PIC_THIS s.slave_pic.rotate_on_autoeoi = 0;
+
}
@@ -137,6 +144,23 @@
8259A PIC
*/
+ if((address == 0x20 || address == 0x21) && BX_PIC_THIS s.master_pic.polled) {
+ // In polled mode. Treat this as an interrupt acknowledge
+ clear_highest_interrupt(& BX_PIC_THIS s.master_pic);
+ BX_PIC_THIS s.master_pic.polled = 0;
+ service_master_pic();
+ return BX_PIC_THIS s.master_pic.irq; // Return the current irq requested
+ }
+
+ if((address == 0xa0 || address == 0xa1) && BX_PIC_THIS s.slave_pic.polled) {
+ // In polled mode. Treat this as an interrupt acknowledge
+ clear_highest_interrupt(& BX_PIC_THIS s.slave_pic);
+ BX_PIC_THIS s.slave_pic.polled = 0;
+ service_slave_pic();
+ return BX_PIC_THIS s.slave_pic.irq; // Return the current irq requested
+ }
+
+
switch (address) {
case 0x20:
if (BX_PIC_THIS s.master_pic.read_reg_select) { /* ISR */
@@ -197,7 +221,6 @@
#else
UNUSED(this_ptr);
#endif // !BX_USE_PIC_SMF
- int irq;
if (io_len > 1)
BX_PANIC(("io write to port %04x, len=%u", (unsigned) address,
@@ -229,7 +252,10 @@
BX_PIC_THIS s.master_pic.imr = 0xFF; /* all IRQ's initially masked */
BX_PIC_THIS s.master_pic.isr = 0x00; /* no IRQ's in service */
BX_PIC_THIS s.master_pic.irr = 0x00; /* no IRQ's requested */
+ BX_PIC_THIS s.master_pic.lowest_priority = 7;
BX_PIC_THIS s.master_pic.INT = 0; /* reprogramming clears previous INTR request */
+ BX_PIC_THIS s.master_pic.auto_eoi = 0;
+ BX_PIC_THIS s.master_pic.rotate_on_autoeoi = 0;
if ( (value & 0x02) == 1 )
BX_PANIC(("pic:master: init command: single mode"));
BX_SET_INTR(0);
@@ -242,8 +268,10 @@
special_mask = (value & 0x60) >> 5;
poll = (value & 0x04) >> 2;
read_op = (value & 0x03);
- if (poll)
- BX_PANIC(("pic:master:OCW3: poll bit set"));
+ if (poll) {
+ BX_PIC_THIS s.master_pic.polled = 1;
+ return;
+ }
if (read_op == 0x02) /* read IRR */
BX_PIC_THIS s.master_pic.read_reg_select = 0;
else if (read_op == 0x03) /* read ISR */
@@ -260,8 +288,10 @@
/* OCW2 */
switch (value) {
- case 0x00: // Rotate in Auto-EOI mode
- BX_PANIC(("PIC: Rotate in Auto-EOI mode command received."));
+ case 0x00: // Rotate in auto eoi mode clear
+ case 0x80: // Rotate in auto eoi mode set
+ BX_PIC_THIS s.master_pic.rotate_on_autoeoi = (value != 0);
+ break;
case 0x0A: /* select read interrupt request register */
BX_PIC_THIS s.master_pic.read_reg_select = 0;
break;
@@ -269,17 +299,24 @@
BX_PIC_THIS s.master_pic.read_reg_select = 1;
break;
+ case 0xA0: // Rotate on non-specific end of interrupt
case 0x20: /* end of interrupt command */
- /* clear highest current in service bit */
- for (irq=0; irq<=7; irq++) {
- if (BX_PIC_THIS s.master_pic.isr & (1 << irq)) {
- BX_PIC_THIS s.master_pic.isr &= ~(1 << irq);
- break; /* out of for loop */
- }
- }
+
+ clear_highest_interrupt(& BX_PIC_THIS s.master_pic);
+
+ if(value == 0xA0) {// Rotate in Auto-EOI mode
+ BX_PIC_THIS s.master_pic.lowest_priority ++;
+ if(BX_PIC_THIS s.master_pic.lowest_priority > 7)
+ BX_PIC_THIS s.master_pic.lowest_priority = 0;
+ }
+
service_master_pic();
break;
+ case 0x40: // Intel PIC spec-sheet seems to indicate this should be ignored
+ BX_INFO(("IRQ no-op"));
+ break;
+
case 0x60: /* specific EOI 0 */
case 0x61: /* specific EOI 1 */
case 0x62: /* specific EOI 2 */
@@ -302,8 +339,23 @@
case 0xC5: // 5 4 3 2 1 0 7 6
case 0xC6: // 6 5 4 3 2 1 0 7
case 0xC7: // 7 6 5 4 3 2 1 0
- // ignore for now
BX_INFO(("IRQ lowest command 0x%x", value));
+ BX_PIC_THIS s.master_pic.lowest_priority = value - 0xC0;
+ break;
+
+ case 0xE0: // specific EOI and rotate 0
+ case 0xE1: // specific EOI and rotate 1
+ case 0xE2: // specific EOI and rotate 2
+ case 0xE3: // specific EOI and rotate 3
+ case 0xE4: // specific EOI and rotate 4
+ case 0xE5: // specific EOI and rotate 5
+ case 0xE6: // specific EOI and rotate 6
+ case 0xE7: // specific EOI and rotate 7
+ BX_PIC_THIS s.master_pic.isr &= ~(1 << (value-0xE0));
+ BX_PIC_THIS s.master_pic.irr &= ~(1 << (value-0xE0));
+ BX_PIC_THIS s.master_pic.lowest_priority = (value - 0xE0);
+ service_master_pic();
+
break;
default:
@@ -339,7 +391,10 @@
case 4:
if (bx_dbg.pic) {
BX_INFO(("pic:master: init command 4 = %02x", (unsigned) value));
- if (value & 0x02) BX_INFO((" auto EOI"));
+ if (value & 0x02) {
+ BX_INFO((" auto EOI"));
+ BX_PIC_THIS s.master_pic.auto_eoi = 1;
+ }
else BX_INFO(("normal EOI interrupt"));
}
if (value & 0x01) {
@@ -376,7 +431,10 @@
BX_PIC_THIS s.slave_pic.imr = 0xFF; /* all IRQ's initially masked */
BX_PIC_THIS s.slave_pic.isr = 0x00; /* no IRQ's in service */
BX_PIC_THIS s.slave_pic.irr = 0x00; /* no IRQ's requested */
+ BX_PIC_THIS s.slave_pic.lowest_priority = 7;
BX_PIC_THIS s.slave_pic.INT = 0; /* reprogramming clears previous INTR request */
+ BX_PIC_THIS s.master_pic.auto_eoi = 0;
+ BX_PIC_THIS s.master_pic.rotate_on_autoeoi = 0;
if ( (value & 0x02) == 1 )
BX_PANIC(("slave: init command: single mode"));
return;
@@ -388,8 +446,10 @@
special_mask = (value & 0x60) >> 5;
poll = (value & 0x04) >> 2;
read_op = (value & 0x03);
- if (poll)
- BX_PANIC(("slave:OCW3: poll bit set"));
+ if (poll) {
+ BX_PIC_THIS s.master_pic.polled = 1;
+ return;
+ }
if (read_op == 0x02) /* read IRR */
BX_PIC_THIS s.slave_pic.read_reg_select = 0;
else if (read_op == 0x03) /* read ISR */
@@ -406,23 +466,36 @@
}
switch (value) {
+ case 0x00: // Rotate in auto eoi mode clear
+ case 0x80: // Rotate in auto eoi mode set
+ BX_PIC_THIS s.slave_pic.rotate_on_autoeoi = (value != 0);
+ break;
+
case 0x0A: /* select read interrupt request register */
BX_PIC_THIS s.slave_pic.read_reg_select = 0;
break;
case 0x0B: /* select read interrupt in-service register */
BX_PIC_THIS s.slave_pic.read_reg_select = 1;
break;
+
+ case 0xA0: // Rotate on non-specific end of interrupt
case 0x20: /* end of interrupt command */
/* clear highest current in service bit */
- for (irq=0; irq<=7; irq++) {
- if (BX_PIC_THIS s.slave_pic.isr & (1 << irq)) {
- BX_PIC_THIS s.slave_pic.isr &= ~(1 << irq);
- break; /* out of for loop */
- }
- }
+ clear_highest_interrupt(& BX_PIC_THIS s.slave_pic);
+
+ if(value == 0xA0) {// Rotate in Auto-EOI mode
+ BX_PIC_THIS s.slave_pic.lowest_priority ++;
+ if(BX_PIC_THIS s.slave_pic.lowest_priority > 7)
+ BX_PIC_THIS s.slave_pic.lowest_priority = 0;
+ }
+
service_slave_pic();
break;
+ case 0x40: // Intel PIC spec-sheet seems to indicate this should be ignored
+ BX_INFO(("IRQ no-op"));
+ break;
+
case 0x60: /* specific EOI 0 */
case 0x61: /* specific EOI 1 */
case 0x62: /* specific EOI 2 */
@@ -445,10 +518,25 @@
case 0xC5: // 5 4 3 2 1 0 7 6
case 0xC6: // 6 5 4 3 2 1 0 7
case 0xC7: // 7 6 5 4 3 2 1 0
- // ignore for now
BX_INFO(("IRQ lowest command 0x%x", value));
+ BX_PIC_THIS s.slave_pic.lowest_priority = value - 0xC0;
break;
+ case 0xE0: // specific EOI and rotate 0
+ case 0xE1: // specific EOI and rotate 1
+ case 0xE2: // specific EOI and rotate 2
+ case 0xE3: // specific EOI and rotate 3
+ case 0xE4: // specific EOI and rotate 4
+ case 0xE5: // specific EOI and rotate 5
+ case 0xE6: // specific EOI and rotate 6
+ case 0xE7: // specific EOI and rotate 7
+ BX_PIC_THIS s.slave_pic.isr &= ~(1 << (value-0xE0));
+ BX_PIC_THIS s.slave_pic.irr &= ~(1 << (value-0xE0));
+ BX_PIC_THIS s.slave_pic.lowest_priority = (value - 0xE0);
+ service_slave_pic();
+
+ break;
+
default:
BX_PANIC(("PIC: write to port A0h = %02x", value));
} /* switch (value) */
@@ -480,7 +568,10 @@
case 4:
if (bx_dbg.pic) {
BX_DEBUG(("slave: init command 4 = %02x", (unsigned) value));
- if (value & 0x02) BX_INFO((" auto EOI"));
+ if (value & 0x02) {
+ BX_INFO((" auto EOI"));
+ BX_PIC_THIS s.slave_pic.auto_eoi = 1;
+ }
else BX_DEBUG(("normal EOI interrupt"));
}
if (value & 0x01) {
@@ -507,6 +598,32 @@
return;
}
+void bx_pic_c::clear_highest_interrupt(bx_pic_t *pic)
+{
+ int irq;
+ int lowest_priority;
+ int highest_priority;
+
+ /* clear highest current in service bit */
+ lowest_priority = pic->lowest_priority;
+ highest_priority = lowest_priority + 1;
+ if(highest_priority > 7)
+ highest_priority = 0;
+
+ irq = highest_priority;
+ do {
+ if (pic->isr & (1 << irq)) {
+ pic->isr &= ~(1 << irq);
+ break; /* Return mask of bit cleared. */
+ }
+
+ irq ++;
+ if(irq > 7)
+ irq = 0;
+ } while(irq != highest_priority);
+
+}
+
void
bx_pic_c::trigger_irq(unsigned irq_no)
{
@@ -572,6 +689,10 @@
Bit8u unmasked_requests;
int irq;
Bit8u isr, max_irq;
+ Bit8u highest_priority = BX_PIC_THIS s.master_pic.lowest_priority + 1;
+ Bit8u lowest_priority = BX_PIC_THIS s.master_pic.lowest_priority;
+ if(highest_priority > 7)
+ highest_priority = 0;
if (BX_PIC_THIS s.master_pic.INT) { /* last interrupt still not acknowleged */
return;
@@ -581,44 +702,51 @@
/* all priorities may be enabled. check all IRR bits except ones
* which have corresponding ISR bits set
*/
- max_irq = 7;
- }
+ max_irq = highest_priority;
+ }
else { /* normal mode */
/* Find the highest priority IRQ that is enabled due to current ISR */
isr = BX_PIC_THIS s.master_pic.isr;
if (isr) {
- max_irq = 0;
- while ( (isr & 0x01) == 0 ) {
- isr >>= 1;
+ max_irq = highest_priority;
+ while ( (isr & (1 << max_irq)) == 0) {
max_irq++;
- }
- if (max_irq == 0 ) return; /* IRQ0 in-service, no other priorities allowed */
- if (max_irq > 7) BX_PANIC(("error in service_master_pic()"));
+ if(max_irq > 7)
+ max_irq = 0;
}
- else
- max_irq = 7; /* 0..7 bits in ISR are cleared */
+ if (max_irq == highest_priority ) return; /* Highest priority interrupt in-service,
+ * no other priorities allowed */
+ if (max_irq > 7) BX_PANIC(("error in service_master_pic()"));
}
+ else
+ max_irq = highest_priority; /* 0..7 bits in ISR are cleared */
+ }
/* now, see if there are any higher priority requests */
if ((unmasked_requests = (BX_PIC_THIS s.master_pic.irr & ~BX_PIC_THIS s.master_pic.imr)) ) {
- for (irq=0; irq<=max_irq; irq++) {
- /* for special mode, since we're looking at all IRQ's, skip if
- * current IRQ is already in-service
- */
- if ( BX_PIC_THIS s.master_pic.special_mask && ((BX_PIC_THIS s.master_pic.isr >> irq) & 0x01) )
- continue;
- if (unmasked_requests & (1 << irq)) {
- BX_DEBUG(("signalling IRQ(%u)", (unsigned) irq));
- BX_PIC_THIS s.master_pic.irr &= ~(1 << irq);
- /*??? do for slave too: BX_PIC_THIS s.master_pic.isr |= (1 << irq);*/
- BX_PIC_THIS s.master_pic.INT = 1;
- BX_SET_INTR(1);
- BX_PIC_THIS s.master_pic.irq = irq;
- return;
+ irq = highest_priority;
+ do {
+ /* for special mode, since we're looking at all IRQ's, skip if
+ * current IRQ is already in-service
+ */
+ if ( BX_PIC_THIS s.master_pic.special_mask && ((BX_PIC_THIS s.master_pic.isr >> irq) & 0x01) )
+ continue;
+ if (unmasked_requests & (1 << irq)) {
+ BX_DEBUG(("signalling IRQ(%u)", (unsigned) irq));
+ BX_PIC_THIS s.master_pic.irr &= ~(1 << irq);
+ /*??? do for slave too: BX_PIC_THIS s.master_pic.isr |= (1 << irq);*/
+ BX_PIC_THIS s.master_pic.INT = 1;
+ BX_SET_INTR(1);
+ BX_PIC_THIS s.master_pic.irq = irq;
+ return;
} /* if (unmasked_requests & ... */
- } /* for (irq=7 ... */
- } /* if (unmasked_requests = ... */
+
+ irq ++;
+ if(irq > 7)
+ irq = 0;
+ } while(irq != max_irq); /* do ... */
+ } /* if (unmasked_requests = ... */
}
@@ -627,55 +755,69 @@
{
Bit8u unmasked_requests;
int irq;
- Bit8u isr, lowest_priority_irq;
+ Bit8u isr, max_irq;
+ Bit8u highest_priority = BX_PIC_THIS s.slave_pic.lowest_priority + 1;
+ Bit8u lowest_priority = BX_PIC_THIS s.slave_pic.lowest_priority;
+ if(highest_priority > 7)
+ highest_priority = 0;
if (BX_PIC_THIS s.slave_pic.INT) { /* last interrupt still not acknowleged */
return;
}
- if (BX_PIC_THIS s.master_pic.special_mask) {
+ if (BX_PIC_THIS s.slave_pic.special_mask) {
/* all priorities may be enabled. check all IRR bits except ones
* which have corresponding ISR bits set
*/
- lowest_priority_irq = 8;
- }
- else {
- /* Find the highest priority IRQ that is enabled due to current ISR */
- isr = BX_PIC_THIS s.slave_pic.isr;
- if (isr) {
- lowest_priority_irq = 0;
- while ( !(isr & 0x01) ) {
- isr >>= 1;
- lowest_priority_irq++;
+ max_irq = highest_priority;
+ }
+ else { /* normal mode */
+ /* Find the highest priority IRQ that is enabled due to current ISR */
+ isr = BX_PIC_THIS s.slave_pic.isr;
+ if (isr) {
+ max_irq = highest_priority;
+ while ( (isr & (1 << max_irq)) == 0) {
+ max_irq++;
+ if(max_irq > 7)
+ max_irq = 0;
}
- if (lowest_priority_irq > 7) BX_PANIC(("error in service_slave_pic()"));
+ if (max_irq == highest_priority ) return; /* Highest priority interrupt in-service,
+ * no other priorities allowed */
+ if (max_irq > 7) BX_PANIC(("error in service_master_pic()"));
}
- else
- lowest_priority_irq = 8;
+ else
+ max_irq = highest_priority; /* 0..7 bits in ISR are cleared */
}
/* now, see if there are any higher priority requests */
if ((unmasked_requests = (BX_PIC_THIS s.slave_pic.irr & ~BX_PIC_THIS s.slave_pic.imr)) ) {
- for (irq=0; irq<lowest_priority_irq; irq++) {
- /* for special mode, since we're looking at all IRQ's, skip if
- * current IRQ is already in-service
- */
- if ( BX_PIC_THIS s.slave_pic.special_mask && ((BX_PIC_THIS s.slave_pic.isr >> irq) & 0x01) )
- continue;
- if (unmasked_requests & (1 << irq)) {
- if (bx_dbg.pic)
- BX_DEBUG(("slave: signalling IRQ(%u)",
- (unsigned) 8 + irq));
- BX_PIC_THIS s.slave_pic.irr &= ~(1 << irq);
- BX_PIC_THIS s.slave_pic.INT = 1;
- BX_PIC_THIS s.master_pic.irr |= 0x04; /* request IRQ 2 on master pic */
- BX_PIC_THIS s.slave_pic.irq = irq;
- service_master_pic();
- return;
+ irq = highest_priority;
+ do {
+ /* for special mode, since we're looking at all IRQ's, skip if
+ * current IRQ is already in-service
+ */
+ if ( BX_PIC_THIS s.slave_pic.special_mask && ((BX_PIC_THIS s.slave_pic.isr >> irq) & 0x01) )
+ continue;
+ if (unmasked_requests & (1 << irq)) {
+ if (bx_dbg.pic) {
+ BX_DEBUG(("slave: signalling IRQ(%u)",
+ (unsigned) 8 + irq));
+
+ BX_PIC_THIS s.slave_pic.irr &= ~(1 << irq);
+ BX_PIC_THIS s.slave_pic.INT = 1;
+ BX_PIC_THIS s.master_pic.irr |= 0x04; /* request IRQ 2 on master pic */
+ BX_PIC_THIS s.slave_pic.irq = irq;
+ service_master_pic();
+ }
+ return;
} /* if (unmasked_requests & ... */
- } /* for (irq=7 ... */
- } /* if (unmasked_requests = ... */
+
+ irq ++;
+ if(irq > 7)
+ irq = 0;
+ } while(irq != max_irq); /* do ... */
+ } /* if (unmasked_requests = ... */
}
@@ -688,8 +830,12 @@
BX_SET_INTR(0);
BX_PIC_THIS s.master_pic.INT = 0;
- BX_PIC_THIS s.master_pic.isr |= (1 << BX_PIC_THIS s.master_pic.irq);
BX_PIC_THIS s.master_pic.irr &= ~(1 << BX_PIC_THIS s.master_pic.irq);
+ // In autoeoi mode don't set the isr bit.
+ if(!BX_PIC_THIS s.master_pic.auto_eoi)
+ BX_PIC_THIS s.master_pic.isr |= (1 << BX_PIC_THIS s.master_pic.irq);
+ else if(BX_PIC_THIS s.slave_pic.rotate_on_autoeoi)
+ BX_PIC_THIS s.slave_pic.lowest_priority = BX_PIC_THIS s.master_pic.irq;
if (BX_PIC_THIS s.master_pic.irq != 2) {
irq = BX_PIC_THIS s.master_pic.irq;
@@ -699,7 +845,11 @@
BX_PIC_THIS s.slave_pic.INT = 0;
irq = BX_PIC_THIS s.slave_pic.irq;
vector = irq + BX_PIC_THIS s.slave_pic.interrupt_offset;
- BX_PIC_THIS s.slave_pic.isr |= (1 << BX_PIC_THIS s.slave_pic.irq);
+ // In autoeoi mode don't set the isr bit.
+ if(!BX_PIC_THIS s.slave_pic.auto_eoi)
+ BX_PIC_THIS s.slave_pic.isr |= (1 << BX_PIC_THIS s.slave_pic.irq);
+ else if(BX_PIC_THIS s.slave_pic.rotate_on_autoeoi)
+ BX_PIC_THIS s.slave_pic.lowest_priority = BX_PIC_THIS s.slave_pic.irq;
BX_PIC_THIS s.slave_pic.irr &= ~(1 << BX_PIC_THIS s.slave_pic.irq);
service_slave_pic();
irq += 8; // for debug printing purposes
Index: iodev/pic.h
===================================================================
RCS file: /cvsroot/bochs/bochs/iodev/pic.h,v
retrieving revision 1.4
diff -u -r1.4 pic.h
--- iodev/pic.h 2001/10/03 13:10:38 1.4
+++ iodev/pic.h 2001/11/24 10:01:31
@@ -52,6 +52,7 @@
Bit8u irr; /* interrupt request register */
Bit8u read_reg_select; /* 0=IRR, 1=ISR */
Bit8u irq; /* current IRQ number */
+ Bit8u lowest_priority; /* current lowest priority irq */
Boolean INT; /* INT request pin of PIC */
struct {
Boolean in_init;
@@ -59,6 +60,8 @@
int byte_expected;
} init;
Boolean special_mask;
+ Boolean polled; /* Set when poll command is issued. */
+ Boolean rotate_on_autoeoi; /* Set when should rotate in auto-eoi mode. */
} bx_pic_t;
@@ -90,6 +93,7 @@
BX_PIC_SMF void service_master_pic(void);
BX_PIC_SMF void service_slave_pic(void);
BX_PIC_SMF void show_pic_state(void);
+ BX_PIC_SMF void clear_highest_interrupt(bx_pic_t *pic);
};
extern bx_pic_c bx_pic;
_______________________________________________
bochs-developers mailing list
bochs-developers@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/bochs-developers
[prev in list] [next in list] [prev in thread] [next in thread]
Configure |
About |
News |
Add a list |
Sponsored by KoreLogic