[prev in list] [next in list] [prev in thread] [next in thread]
List: bochs-cvs
Subject: [Bochs-cvs] SF.net SVN: bochs:[10517] trunk/bochs
From: sshwarts () users ! sourceforge ! net
Date: 2011-07-31 14:56:45
Message-ID: E1QnXRd-0004HQ-QX () sfp-svn-5 ! v30 ! ch3 ! sourceforge ! com
[Download RAW message or body]
Revision: 10517
http://bochs.svn.sourceforge.net/bochs/?rev=10517&view=rev
Author: sshwarts
Date: 2011-07-31 14:56:45 +0000 (Sun, 31 Jul 2011)
Log Message:
-----------
Fixed compilation errors, dos2unix, added missed p3_katmai.txt
Modified Paths:
--------------
trunk/bochs/.bochsrc
trunk/bochs/cpu/cpudb/athlon64_clawhammer.cc
trunk/bochs/cpu/cpudb/athlon64_clawhammer.h
trunk/bochs/cpu/cpudb/athlon64_clawhammer.txt
trunk/bochs/cpu/cpudb/core2_extreme_x9770.cc
trunk/bochs/cpu/cpudb/core2_extreme_x9770.h
trunk/bochs/cpu/cpudb/core2_extreme_x9770.txt
trunk/bochs/cpu/cpudb/corei7_sandy_bridge_2600K.cc
trunk/bochs/cpu/cpudb/corei7_sandy_bridge_2600K.h
trunk/bochs/cpu/cpudb/corei7_sandy_bridge_2600K.txt
trunk/bochs/cpu/cpudb/p3_katmai.cc
trunk/bochs/cpu/cpudb/p3_katmai.h
trunk/bochs/cpu/cpudb/p4_prescott_celeron_336.cc
trunk/bochs/cpu/cpudb/p4_prescott_celeron_336.h
trunk/bochs/cpu/cpudb/p4_prescott_celeron_336.txt
trunk/bochs/cpu/generic_cpuid.cc
trunk/bochs/cpu/generic_cpuid.h
trunk/bochs/cpu/init.cc
Added Paths:
-----------
trunk/bochs/cpu/cpudb/p3_katmai.txt
Modified: trunk/bochs/.bochsrc
===================================================================
--- trunk/bochs/.bochsrc 2011-07-31 14:38:03 UTC (rev 10516)
+++ trunk/bochs/.bochsrc 2011-07-31 14:56:45 UTC (rev 10517)
@@ -93,6 +93,7 @@
# CPU configurations that can be selected:
# -----------------------------------------------------------------
# p3_katmai Intel Pentium III (Katmai)
+# athlon64_clawhammer AMD Athlon(tm) 64 Processor 2800+
# p4_prescott_celeron_336 Intel(R) Celeron(R) 336
# core2_extreme_x9770 Intel(R) Core(TM)2 Extreme X9770
# corei7_sandy_bridge_2600k Intel(R) Core(TM) i7-2600K
Modified: trunk/bochs/cpu/cpudb/athlon64_clawhammer.cc
===================================================================
--- trunk/bochs/cpu/cpudb/athlon64_clawhammer.cc 2011-07-31 14:38:03 UTC (rev 10516)
+++ trunk/bochs/cpu/cpudb/athlon64_clawhammer.cc 2011-07-31 14:56:45 UTC (rev 10517)
@@ -1,443 +1,443 @@
-/////////////////////////////////////////////////////////////////////////
-// $Id$
-/////////////////////////////////////////////////////////////////////////
-//
-// Copyright (c) 2011 Stanislav Shwartsman
-// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
-//
-// This library is free software; you can redistribute it and/or
-// modify it under the terms of the GNU Lesser General Public
-// License as published by the Free Software Foundation; either
-// version 2 of the License, or (at your option) any later version.
-//
-// This library is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-// Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public
-// License along with this library; if not, write to the Free Software
-// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
-//
-/////////////////////////////////////////////////////////////////////////
-
-#include "bochs.h"
-#include "cpu/cpu.h"
-#include "param_names.h"
-#include "athlon64_clawhammer.h"
-
-#define LOG_THIS cpu->
-
-#if BX_SUPPORT_X86_64
-
-athlon64_clawhammer_t::athlon64_clawhammer_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
-{
- if (! BX_SUPPORT_X86_64)
- BX_PANIC(("You must enable x86-64 for Athlon64 configuration"));
-
- BX_INFO(("WARNING: 3DNow! is not implemented yet !"));
-}
-
-void athlon64_clawhammer_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, \
cpuid_function_t *leaf)
-{
- switch(function) {
- case 0x8FFFFFFF:
- get_cpuid_hidden_level(leaf);
- return;
- case 0x80000000:
- get_ext_cpuid_leaf_0(leaf);
- return;
- case 0x80000001:
- get_ext_cpuid_leaf_1(leaf);
- return;
- case 0x80000002:
- case 0x80000003:
- case 0x80000004:
- get_ext_cpuid_brand_string_leaf(function, leaf);
- return;
- case 0x80000005:
- get_ext_cpuid_leaf_5(leaf);
- return;
- case 0x80000006:
- get_ext_cpuid_leaf_6(leaf);
- return;
- case 0x80000007:
- get_ext_cpuid_leaf_7(leaf);
- return;
- case 0x80000008:
- get_ext_cpuid_leaf_8(leaf);
- return;
- case 0x00000000:
- get_std_cpuid_leaf_0(leaf);
- return;
- case 0x00000001:
- get_std_cpuid_leaf_1(leaf);
- return;
- default:
- get_reserved_leaf(leaf);
- return;
- }
-}
-
-Bit32u athlon64_clawhammer_t::get_isa_extensions_bitmask(void) const
-{
- return BX_CPU_X87 |
- BX_CPU_486 |
- BX_CPU_PENTIUM |
- BX_CPU_P6 |
- BX_CPU_MMX |
- BX_CPU_FXSAVE_FXRSTOR |
- BX_CPU_SYSENTER_SYSEXIT |
- BX_CPU_CLFLUSH |
- BX_CPU_SSE |
- BX_CPU_SSE2 |
- BX_CPU_X86_64;
-}
-
-Bit32u athlon64_clawhammer_t::get_cpu_extensions_bitmask(void) const
-{
- return BX_CPU_DEBUG_EXTENSIONS |
- BX_CPU_VME |
- BX_CPU_PSE |
- BX_CPU_PAE |
- BX_CPU_PGE |
- BX_CPU_PSE36 |
- BX_CPU_PAT_MTRR |
- BX_CPU_XAPIC;
-}
-
-void athlon64_clawhammer_t::get_reserved_leaf(cpuid_function_t *leaf)
-{
- leaf->eax = 0;
- leaf->ebx = 0;
- leaf->ecx = 0;
- leaf->edx = 0;
-}
-
-// leaf 0x00000000 //
-void athlon64_clawhammer_t::get_std_cpuid_leaf_0(cpuid_function_t *leaf)
-{
- static const char* vendor_string = "AuthenticAMD";
-
- // EAX: highest std function understood by CPUID
- // EBX: vendor ID string
- // EDX: vendor ID string
- // ECX: vendor ID string
- leaf->eax = 0x1;
-
- // CPUID vendor string (e.g. GenuineIntel, AuthenticAMD, CentaurHauls, ...)
- memcpy(&(leaf->ebx), vendor_string, 4);
- memcpy(&(leaf->edx), vendor_string + 4, 4);
- memcpy(&(leaf->ecx), vendor_string + 8, 4);
-#ifdef BX_BIG_ENDIAN
- leaf->ebx = bx_bswap32(leaf->ebx);
- leaf->ecx = bx_bswap32(leaf->ecx);
- leaf->edx = bx_bswap32(leaf->edx);
-#endif
-}
-
-// leaf 0x00000001 //
-void athlon64_clawhammer_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf)
-{
- // EAX: CPU Version Information
- // [3:0] Stepping ID
- // [7:4] Model: starts at 1
- // [11:8] Family: 4=486, 5=Pentium, 6=PPro, ...
- // [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved
- // [19:16] Extended Model
- // [27:20] Extended Family
- leaf->eax = 0x00000F48;
-
- // EBX:
- // [7:0] Brand ID
- // [15:8] CLFLUSH cache line size (value*8 = cache line size in bytes)
- // [23:16] Number of logical processors in one physical processor
- // [31:24] Local Apic ID
-
- leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8);
-#if BX_SUPPORT_APIC
- leaf->ebx |= ((cpu->get_apic_id() & 0xff) << 24);
-#endif
-
- // ECX: Extended Feature Flags
- leaf->ecx = 0;
-
- // EDX: Standard Feature Flags
- // * [0:0] FPU on chip
- // * [1:1] VME: Virtual-8086 Mode enhancements
- // * [2:2] DE: Debug Extensions (I/O breakpoints)
- // * [3:3] PSE: Page Size Extensions
- // * [4:4] TSC: Time Stamp Counter
- // * [5:5] MSR: RDMSR and WRMSR support
- // * [6:6] PAE: Physical Address Extensions
- // * [7:7] MCE: Machine Check Exception
- // * [8:8] CXS: CMPXCHG8B instruction
- // * [9:9] APIC: APIC on Chip
- // [10:10] Reserved
- // * [11:11] SYSENTER/SYSEXIT support
- // * [12:12] MTRR: Memory Type Range Reg
- // * [13:13] PGE/PTE Global Bit
- // * [14:14] MCA: Machine Check Architecture
- // * [15:15] CMOV: Cond Mov/Cmp Instructions
- // * [16:16] PAT: Page Attribute Table
- // * [17:17] PSE-36: Physical Address Extensions
- // [18:18] PSN: Processor Serial Number
- // * [19:19] CLFLUSH: CLFLUSH Instruction support
- // [20:20] Reserved
- // [21:21] DS: Debug Store
- // [22:22] ACPI: Thermal Monitor and Software Controlled Clock Facilities
- // * [23:23] MMX Technology
- // * [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
- // * [25:25] SSE: SSE Extensions
- // * [26:26] SSE2: SSE2 Extensions
- // [27:27] Self Snoop
- // [28:28] Hyper Threading Technology
- // [29:29] TM: Thermal Monitor
- // [30:30] Reserved
- // [31:31] PBE: Pending Break Enable
- leaf->edx = BX_CPUID_STD_X87 |
- BX_CPUID_STD_VME |
- BX_CPUID_STD_DEBUG_EXTENSIONS |
- BX_CPUID_STD_PSE |
- BX_CPUID_STD_TSC |
- BX_CPUID_STD_MSR |
- BX_CPUID_STD_PAE |
- BX_CPUID_STD_MCE |
- BX_CPUID_STD_CMPXCHG8B |
- BX_CPUID_STD_SYSENTER_SYSEXIT |
- BX_CPUID_STD_MTRR |
- BX_CPUID_STD_GLOBAL_PAGES |
- BX_CPUID_STD_MCA |
- BX_CPUID_STD_CMOV |
- BX_CPUID_STD_PAT |
- BX_CPUID_STD_PSE36 |
- BX_CPUID_STD_CLFLUSH |
- BX_CPUID_STD_MMX |
- BX_CPUID_STD_FXSAVE_FXRSTOR |
- BX_CPUID_STD_SSE |
- BX_CPUID_STD_SSE2;
-#if BX_SUPPORT_APIC
- // if MSR_APICBASE APIC Global Enable bit has been cleared,
- // the CPUID feature flag for the APIC is set to 0.
- if (cpu->msr.apicbase & 0x800)
- leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
-#endif
-}
-
-// leaf 0x80000000 //
-void athlon64_clawhammer_t::get_ext_cpuid_leaf_0(cpuid_function_t *leaf)
-{
- static const char* vendor_string = "AuthenticAMD";
-
- // EAX: highest extended function understood by CPUID
- // EBX: reserved
- // EDX: reserved
- // ECX: reserved
- leaf->eax = 0x80000018;
- memcpy(&(leaf->ebx), vendor_string, 4);
- memcpy(&(leaf->edx), vendor_string + 4, 4);
- memcpy(&(leaf->ecx), vendor_string + 8, 4);
-#ifdef BX_BIG_ENDIAN
- leaf->ebx = bx_bswap32(leaf->ebx);
- leaf->ecx = bx_bswap32(leaf->ecx);
- leaf->edx = bx_bswap32(leaf->edx);
-#endif
-}
-
-// leaf 0x80000001 //
-void athlon64_clawhammer_t::get_ext_cpuid_leaf_1(cpuid_function_t *leaf)
-{
- // EAX: CPU Version Information (same as 0x00000001.EAX)
- leaf->eax = 0x00000F48;
-
- // EBX: Brand ID
- leaf->ebx = 0x00000106;
-
- leaf->ecx = 0;
-
- // EDX:
- // Many of the bits in EDX are the same as FN 0x00000001 [*] for AMD
- // * [0:0] FPU on chip
- // * [1:1] VME: Virtual-8086 Mode enhancements
- // * [2:2] DE: Debug Extensions (I/O breakpoints)
- // * [3:3] PSE: Page Size Extensions
- // * [4:4] TSC: Time Stamp Counter
- // * [5:5] MSR: RDMSR and WRMSR support
- // * [6:6] PAE: Physical Address Extensions
- // * [7:7] MCE: Machine Check Exception
- // * [8:8] CXS: CMPXCHG8B instruction
- // * [9:9] APIC: APIC on Chip
- // [10:10] Reserved
- // * [11:11] SYSCALL/SYSRET support
- // * [12:12] MTRR: Memory Type Range Reg
- // * [13:13] PGE/PTE Global Bit
- // * [14:14] MCA: Machine Check Architecture
- // * [15:15] CMOV: Cond Mov/Cmp Instructions
- // * [16:16] PAT: Page Attribute Table
- // * [17:17] PSE-36: Physical Address Extensions
- // [18:18] Reserved
- // [19:19] Reserved
- // * [20:20] No-Execute page protection
- // [21:21] Reserved
- // * [22:22] MMXExt: AMD Extensions to MMX Technology
- // * [23:23] MMX Technology
- // * [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
- // [25:25] FFXSR: Fast FXSAVE/FXRSTOR
- // [26:26] 1G paging support
- // [27:27] Support RDTSCP Instruction
- // [28:28] Reserved
- // * [29:29] Long Mode
- // * [30:30] AMD 3DNow! Extensions
- // * [31:31] AMD 3DNow! Instructions
-
- leaf->edx = BX_CPUID_STD_X87 |
- BX_CPUID_STD_VME |
- BX_CPUID_STD_DEBUG_EXTENSIONS |
- BX_CPUID_STD_PSE |
- BX_CPUID_STD_TSC |
- BX_CPUID_STD_MSR |
- BX_CPUID_STD_PAE |
- BX_CPUID_STD_MCE |
- BX_CPUID_STD_CMPXCHG8B |
- BX_CPUID_STD2_SYSCALL_SYSRET |
- BX_CPUID_STD_MTRR |
- BX_CPUID_STD_GLOBAL_PAGES |
- BX_CPUID_STD_MCA |
- BX_CPUID_STD_CMOV |
- BX_CPUID_STD_PAT |
- BX_CPUID_STD_PSE36 |
- BX_CPUID_STD2_NX |
- BX_CPUID_STD2_AMD_MMX_EXT |
- BX_CPUID_STD_MMX |
- BX_CPUID_STD_FXSAVE_FXRSTOR |
- BX_CPUID_STD2_LONG_MODE |
- BX_CPUID_STD2_3DNOW_EXT |
- BX_CPUID_STD2_3DNOW;
-#if BX_SUPPORT_APIC
- // if MSR_APICBASE APIC Global Enable bit has been cleared,
- // the CPUID feature flag for the APIC is set to 0.
- if (cpu->msr.apicbase & 0x800)
- leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
-#endif
-}
-
-// leaf 0x80000002 //
-// leaf 0x80000003 //
-// leaf 0x80000004 //
-void athlon64_clawhammer_t::get_ext_cpuid_brand_string_leaf(Bit32u function, \
cpuid_function_t *leaf)
-{
- // CPUID function 0x800000002-0x800000004 - Processor Name String Identifier
- static const char* brand_string = "AMD Athlon(tm) 64 Processor 2800+\0\0\0";
-
- switch(function) {
- case 0x80000002:
- memcpy(&(leaf->eax), brand_string , 4);
- memcpy(&(leaf->ebx), brand_string + 4, 4);
- memcpy(&(leaf->ecx), brand_string + 8, 4);
- memcpy(&(leaf->edx), brand_string + 12, 4);
- break;
- case 0x80000003:
- memcpy(&(leaf->eax), brand_string + 16, 4);
- memcpy(&(leaf->ebx), brand_string + 20, 4);
- memcpy(&(leaf->ecx), brand_string + 24, 4);
- memcpy(&(leaf->edx), brand_string + 28, 4);
- break;
- case 0x80000004:
- memcpy(&(leaf->eax), brand_string + 32, 4);
- leaf->ebx = 0;
- leaf->ecx = 0;
- leaf->edx = 0;
- break;
- default:
- break;
- }
-
-#ifdef BX_BIG_ENDIAN
- leaf->eax = bx_bswap32(leaf->eax);
- leaf->ebx = bx_bswap32(leaf->ebx);
- leaf->ecx = bx_bswap32(leaf->ecx);
- leaf->edx = bx_bswap32(leaf->edx);
-#endif
-}
-
-// leaf 0x80000005 //
-void athlon64_clawhammer_t::get_ext_cpuid_leaf_5(cpuid_function_t *leaf)
-{
- // CPUID function 0x800000005 - L1 Cache and TLB Identifiers
- leaf->eax = 0xFF08FF08;
- leaf->ebx = 0xFF20FF20;
- leaf->ecx = 0x40020140;
- leaf->edx = 0x40020140;
-}
-
-// leaf 0x80000006 //
-void athlon64_clawhammer_t::get_ext_cpuid_leaf_6(cpuid_function_t *leaf)
-{
- // CPUID function 0x800000006 - L2 Cache and TLB Identifiers
- leaf->eax = 0x00000000;
- leaf->ebx = 0x42004200;
- leaf->ecx = 0x02008140;
- leaf->edx = 0x00000000;
-}
-
-// leaf 0x80000007 //
-void athlon64_clawhammer_t::get_ext_cpuid_leaf_7(cpuid_function_t *leaf)
-{
- // CPUID function 0x800000007 - Advanced Power Management
- leaf->eax = 0;
- leaf->ebx = 0;
- leaf->ecx = 0;
- leaf->edx = 0x0000000F;
-}
-
-// leaf 0x80000008 //
-void athlon64_clawhammer_t::get_ext_cpuid_leaf_8(cpuid_function_t *leaf)
-{
- // virtual & phys address size in low 2 bytes.
- leaf->eax = BX_PHY_ADDRESS_WIDTH | (BX_LIN_ADDRESS_WIDTH << 8);
- leaf->ebx = 0;
- leaf->ecx = 0; // Reserved, undefined
- leaf->edx = 0;
-}
-
-// leaf 0x80000009 : Reserved //
-// leaf 0x8000000A : SVM //
-// leaf 0x8000000B - 0x80000018: Reserved //
-
-// leaf 0x8FFFFFFF //
-void athlon64_clawhammer_t::get_cpuid_hidden_level(cpuid_function_t *leaf)
-{
- static const char* magic_string = "IT'S HAMMER TIME";
-
- memcpy(&(leaf->eax), magic_string , 4);
- memcpy(&(leaf->ebx), magic_string + 4, 4);
- memcpy(&(leaf->ecx), magic_string + 8, 4);
- memcpy(&(leaf->edx), magic_string + 12, 4);
-
-#ifdef BX_BIG_ENDIAN
- leaf->eax = bx_bswap32(leaf->eax);
- leaf->ebx = bx_bswap32(leaf->ebx);
- leaf->ecx = bx_bswap32(leaf->ecx);
- leaf->edx = bx_bswap32(leaf->edx);
-#endif
-}
-
-void athlon64_clawhammer_t::dump_cpuid(void)
-{
- struct cpuid_function_t leaf;
- unsigned n;
-
- for (n=0; n<=1; n++) {
- BX_CPU_THIS_PTR cpuid->get_cpuid_leaf(n, 0x00000000, &leaf);
- BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, \
leaf.edx));
- }
-
- for (n=0x80000000; n<=0x80000018; n++) {
- BX_CPU_THIS_PTR cpuid->get_cpuid_leaf(n, 0x00000000, &leaf);
- BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, \
leaf.edx));
- }
-}
-
-bx_cpuid_t *create_athlon64_clawhammer_cpuid(BX_CPU_C *cpu) { return new \
athlon64_clawhammer_t(cpu); }
-
-#endif
+/////////////////////////////////////////////////////////////////////////
+// $Id$
+/////////////////////////////////////////////////////////////////////////
+//
+// Copyright (c) 2011 Stanislav Shwartsman
+// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
+//
+// This library is free software; you can redistribute it and/or
+// modify it under the terms of the GNU Lesser General Public
+// License as published by the Free Software Foundation; either
+// version 2 of the License, or (at your option) any later version.
+//
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public
+// License along with this library; if not, write to the Free Software
+// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
+//
+/////////////////////////////////////////////////////////////////////////
+
+#include "bochs.h"
+#include "cpu/cpu.h"
+#include "param_names.h"
+#include "athlon64_clawhammer.h"
+
+#define LOG_THIS cpu->
+
+#if BX_SUPPORT_X86_64
+
+athlon64_clawhammer_t::athlon64_clawhammer_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
+{
+ if (! BX_SUPPORT_X86_64)
+ BX_PANIC(("You must enable x86-64 for Athlon64 configuration"));
+
+ BX_INFO(("WARNING: 3DNow! is not implemented yet !"));
+}
+
+void athlon64_clawhammer_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, \
cpuid_function_t *leaf) +{
+ switch(function) {
+ case 0x8FFFFFFF:
+ get_cpuid_hidden_level(leaf);
+ return;
+ case 0x80000000:
+ get_ext_cpuid_leaf_0(leaf);
+ return;
+ case 0x80000001:
+ get_ext_cpuid_leaf_1(leaf);
+ return;
+ case 0x80000002:
+ case 0x80000003:
+ case 0x80000004:
+ get_ext_cpuid_brand_string_leaf(function, leaf);
+ return;
+ case 0x80000005:
+ get_ext_cpuid_leaf_5(leaf);
+ return;
+ case 0x80000006:
+ get_ext_cpuid_leaf_6(leaf);
+ return;
+ case 0x80000007:
+ get_ext_cpuid_leaf_7(leaf);
+ return;
+ case 0x80000008:
+ get_ext_cpuid_leaf_8(leaf);
+ return;
+ case 0x00000000:
+ get_std_cpuid_leaf_0(leaf);
+ return;
+ case 0x00000001:
+ get_std_cpuid_leaf_1(leaf);
+ return;
+ default:
+ get_reserved_leaf(leaf);
+ return;
+ }
+}
+
+Bit32u athlon64_clawhammer_t::get_isa_extensions_bitmask(void) const
+{
+ return BX_CPU_X87 |
+ BX_CPU_486 |
+ BX_CPU_PENTIUM |
+ BX_CPU_P6 |
+ BX_CPU_MMX |
+ BX_CPU_FXSAVE_FXRSTOR |
+ BX_CPU_SYSENTER_SYSEXIT |
+ BX_CPU_CLFLUSH |
+ BX_CPU_SSE |
+ BX_CPU_SSE2 |
+ BX_CPU_X86_64;
+}
+
+Bit32u athlon64_clawhammer_t::get_cpu_extensions_bitmask(void) const
+{
+ return BX_CPU_DEBUG_EXTENSIONS |
+ BX_CPU_VME |
+ BX_CPU_PSE |
+ BX_CPU_PAE |
+ BX_CPU_PGE |
+ BX_CPU_PSE36 |
+ BX_CPU_PAT_MTRR |
+ BX_CPU_XAPIC;
+}
+
+void athlon64_clawhammer_t::get_reserved_leaf(cpuid_function_t *leaf)
+{
+ leaf->eax = 0;
+ leaf->ebx = 0;
+ leaf->ecx = 0;
+ leaf->edx = 0;
+}
+
+// leaf 0x00000000 //
+void athlon64_clawhammer_t::get_std_cpuid_leaf_0(cpuid_function_t *leaf)
+{
+ static const char* vendor_string = "AuthenticAMD";
+
+ // EAX: highest std function understood by CPUID
+ // EBX: vendor ID string
+ // EDX: vendor ID string
+ // ECX: vendor ID string
+ leaf->eax = 0x1;
+
+ // CPUID vendor string (e.g. GenuineIntel, AuthenticAMD, CentaurHauls, ...)
+ memcpy(&(leaf->ebx), vendor_string, 4);
+ memcpy(&(leaf->edx), vendor_string + 4, 4);
+ memcpy(&(leaf->ecx), vendor_string + 8, 4);
+#ifdef BX_BIG_ENDIAN
+ leaf->ebx = bx_bswap32(leaf->ebx);
+ leaf->ecx = bx_bswap32(leaf->ecx);
+ leaf->edx = bx_bswap32(leaf->edx);
+#endif
+}
+
+// leaf 0x00000001 //
+void athlon64_clawhammer_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf)
+{
+ // EAX: CPU Version Information
+ // [3:0] Stepping ID
+ // [7:4] Model: starts at 1
+ // [11:8] Family: 4=486, 5=Pentium, 6=PPro, ...
+ // [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved
+ // [19:16] Extended Model
+ // [27:20] Extended Family
+ leaf->eax = 0x00000F48;
+
+ // EBX:
+ // [7:0] Brand ID
+ // [15:8] CLFLUSH cache line size (value*8 = cache line size in bytes)
+ // [23:16] Number of logical processors in one physical processor
+ // [31:24] Local Apic ID
+
+ leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8);
+#if BX_SUPPORT_APIC
+ leaf->ebx |= ((cpu->get_apic_id() & 0xff) << 24);
+#endif
+
+ // ECX: Extended Feature Flags
+ leaf->ecx = 0;
+
+ // EDX: Standard Feature Flags
+ // * [0:0] FPU on chip
+ // * [1:1] VME: Virtual-8086 Mode enhancements
+ // * [2:2] DE: Debug Extensions (I/O breakpoints)
+ // * [3:3] PSE: Page Size Extensions
+ // * [4:4] TSC: Time Stamp Counter
+ // * [5:5] MSR: RDMSR and WRMSR support
+ // * [6:6] PAE: Physical Address Extensions
+ // * [7:7] MCE: Machine Check Exception
+ // * [8:8] CXS: CMPXCHG8B instruction
+ // * [9:9] APIC: APIC on Chip
+ // [10:10] Reserved
+ // * [11:11] SYSENTER/SYSEXIT support
+ // * [12:12] MTRR: Memory Type Range Reg
+ // * [13:13] PGE/PTE Global Bit
+ // * [14:14] MCA: Machine Check Architecture
+ // * [15:15] CMOV: Cond Mov/Cmp Instructions
+ // * [16:16] PAT: Page Attribute Table
+ // * [17:17] PSE-36: Physical Address Extensions
+ // [18:18] PSN: Processor Serial Number
+ // * [19:19] CLFLUSH: CLFLUSH Instruction support
+ // [20:20] Reserved
+ // [21:21] DS: Debug Store
+ // [22:22] ACPI: Thermal Monitor and Software Controlled Clock Facilities
+ // * [23:23] MMX Technology
+ // * [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
+ // * [25:25] SSE: SSE Extensions
+ // * [26:26] SSE2: SSE2 Extensions
+ // [27:27] Self Snoop
+ // [28:28] Hyper Threading Technology
+ // [29:29] TM: Thermal Monitor
+ // [30:30] Reserved
+ // [31:31] PBE: Pending Break Enable
+ leaf->edx = BX_CPUID_STD_X87 |
+ BX_CPUID_STD_VME |
+ BX_CPUID_STD_DEBUG_EXTENSIONS |
+ BX_CPUID_STD_PSE |
+ BX_CPUID_STD_TSC |
+ BX_CPUID_STD_MSR |
+ BX_CPUID_STD_PAE |
+ BX_CPUID_STD_MCE |
+ BX_CPUID_STD_CMPXCHG8B |
+ BX_CPUID_STD_SYSENTER_SYSEXIT |
+ BX_CPUID_STD_MTRR |
+ BX_CPUID_STD_GLOBAL_PAGES |
+ BX_CPUID_STD_MCA |
+ BX_CPUID_STD_CMOV |
+ BX_CPUID_STD_PAT |
+ BX_CPUID_STD_PSE36 |
+ BX_CPUID_STD_CLFLUSH |
+ BX_CPUID_STD_MMX |
+ BX_CPUID_STD_FXSAVE_FXRSTOR |
+ BX_CPUID_STD_SSE |
+ BX_CPUID_STD_SSE2;
+#if BX_SUPPORT_APIC
+ // if MSR_APICBASE APIC Global Enable bit has been cleared,
+ // the CPUID feature flag for the APIC is set to 0.
+ if (cpu->msr.apicbase & 0x800)
+ leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
+#endif
+}
+
+// leaf 0x80000000 //
+void athlon64_clawhammer_t::get_ext_cpuid_leaf_0(cpuid_function_t *leaf)
+{
+ static const char* vendor_string = "AuthenticAMD";
+
+ // EAX: highest extended function understood by CPUID
+ // EBX: reserved
+ // EDX: reserved
+ // ECX: reserved
+ leaf->eax = 0x80000018;
+ memcpy(&(leaf->ebx), vendor_string, 4);
+ memcpy(&(leaf->edx), vendor_string + 4, 4);
+ memcpy(&(leaf->ecx), vendor_string + 8, 4);
+#ifdef BX_BIG_ENDIAN
+ leaf->ebx = bx_bswap32(leaf->ebx);
+ leaf->ecx = bx_bswap32(leaf->ecx);
+ leaf->edx = bx_bswap32(leaf->edx);
+#endif
+}
+
+// leaf 0x80000001 //
+void athlon64_clawhammer_t::get_ext_cpuid_leaf_1(cpuid_function_t *leaf)
+{
+ // EAX: CPU Version Information (same as 0x00000001.EAX)
+ leaf->eax = 0x00000F48;
+
+ // EBX: Brand ID
+ leaf->ebx = 0x00000106;
+
+ leaf->ecx = 0;
+
+ // EDX:
+ // Many of the bits in EDX are the same as FN 0x00000001 [*] for AMD
+ // * [0:0] FPU on chip
+ // * [1:1] VME: Virtual-8086 Mode enhancements
+ // * [2:2] DE: Debug Extensions (I/O breakpoints)
+ // * [3:3] PSE: Page Size Extensions
+ // * [4:4] TSC: Time Stamp Counter
+ // * [5:5] MSR: RDMSR and WRMSR support
+ // * [6:6] PAE: Physical Address Extensions
+ // * [7:7] MCE: Machine Check Exception
+ // * [8:8] CXS: CMPXCHG8B instruction
+ // * [9:9] APIC: APIC on Chip
+ // [10:10] Reserved
+ // * [11:11] SYSCALL/SYSRET support
+ // * [12:12] MTRR: Memory Type Range Reg
+ // * [13:13] PGE/PTE Global Bit
+ // * [14:14] MCA: Machine Check Architecture
+ // * [15:15] CMOV: Cond Mov/Cmp Instructions
+ // * [16:16] PAT: Page Attribute Table
+ // * [17:17] PSE-36: Physical Address Extensions
+ // [18:18] Reserved
+ // [19:19] Reserved
+ // * [20:20] No-Execute page protection
+ // [21:21] Reserved
+ // * [22:22] MMXExt: AMD Extensions to MMX Technology
+ // * [23:23] MMX Technology
+ // * [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
+ // [25:25] FFXSR: Fast FXSAVE/FXRSTOR
+ // [26:26] 1G paging support
+ // [27:27] Support RDTSCP Instruction
+ // [28:28] Reserved
+ // * [29:29] Long Mode
+ // * [30:30] AMD 3DNow! Extensions
+ // * [31:31] AMD 3DNow! Instructions
+
+ leaf->edx = BX_CPUID_STD_X87 |
+ BX_CPUID_STD_VME |
+ BX_CPUID_STD_DEBUG_EXTENSIONS |
+ BX_CPUID_STD_PSE |
+ BX_CPUID_STD_TSC |
+ BX_CPUID_STD_MSR |
+ BX_CPUID_STD_PAE |
+ BX_CPUID_STD_MCE |
+ BX_CPUID_STD_CMPXCHG8B |
+ BX_CPUID_STD2_SYSCALL_SYSRET |
+ BX_CPUID_STD_MTRR |
+ BX_CPUID_STD_GLOBAL_PAGES |
+ BX_CPUID_STD_MCA |
+ BX_CPUID_STD_CMOV |
+ BX_CPUID_STD_PAT |
+ BX_CPUID_STD_PSE36 |
+ BX_CPUID_STD2_NX |
+ BX_CPUID_STD2_AMD_MMX_EXT |
+ BX_CPUID_STD_MMX |
+ BX_CPUID_STD_FXSAVE_FXRSTOR |
+ BX_CPUID_STD2_LONG_MODE |
+ BX_CPUID_STD2_3DNOW_EXT |
+ BX_CPUID_STD2_3DNOW;
+#if BX_SUPPORT_APIC
+ // if MSR_APICBASE APIC Global Enable bit has been cleared,
+ // the CPUID feature flag for the APIC is set to 0.
+ if (cpu->msr.apicbase & 0x800)
+ leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
+#endif
+}
+
+// leaf 0x80000002 //
+// leaf 0x80000003 //
+// leaf 0x80000004 //
+void athlon64_clawhammer_t::get_ext_cpuid_brand_string_leaf(Bit32u function, \
cpuid_function_t *leaf) +{
+ // CPUID function 0x800000002-0x800000004 - Processor Name String Identifier
+ static const char* brand_string = "AMD Athlon(tm) 64 Processor 2800+\0\0\0";
+
+ switch(function) {
+ case 0x80000002:
+ memcpy(&(leaf->eax), brand_string , 4);
+ memcpy(&(leaf->ebx), brand_string + 4, 4);
+ memcpy(&(leaf->ecx), brand_string + 8, 4);
+ memcpy(&(leaf->edx), brand_string + 12, 4);
+ break;
+ case 0x80000003:
+ memcpy(&(leaf->eax), brand_string + 16, 4);
+ memcpy(&(leaf->ebx), brand_string + 20, 4);
+ memcpy(&(leaf->ecx), brand_string + 24, 4);
+ memcpy(&(leaf->edx), brand_string + 28, 4);
+ break;
+ case 0x80000004:
+ memcpy(&(leaf->eax), brand_string + 32, 4);
+ leaf->ebx = 0;
+ leaf->ecx = 0;
+ leaf->edx = 0;
+ break;
+ default:
+ break;
+ }
+
+#ifdef BX_BIG_ENDIAN
+ leaf->eax = bx_bswap32(leaf->eax);
+ leaf->ebx = bx_bswap32(leaf->ebx);
+ leaf->ecx = bx_bswap32(leaf->ecx);
+ leaf->edx = bx_bswap32(leaf->edx);
+#endif
+}
+
+// leaf 0x80000005 //
+void athlon64_clawhammer_t::get_ext_cpuid_leaf_5(cpuid_function_t *leaf)
+{
+ // CPUID function 0x800000005 - L1 Cache and TLB Identifiers
+ leaf->eax = 0xFF08FF08;
+ leaf->ebx = 0xFF20FF20;
+ leaf->ecx = 0x40020140;
+ leaf->edx = 0x40020140;
+}
+
+// leaf 0x80000006 //
+void athlon64_clawhammer_t::get_ext_cpuid_leaf_6(cpuid_function_t *leaf)
+{
+ // CPUID function 0x800000006 - L2 Cache and TLB Identifiers
+ leaf->eax = 0x00000000;
+ leaf->ebx = 0x42004200;
+ leaf->ecx = 0x02008140;
+ leaf->edx = 0x00000000;
+}
+
+// leaf 0x80000007 //
+void athlon64_clawhammer_t::get_ext_cpuid_leaf_7(cpuid_function_t *leaf)
+{
+ // CPUID function 0x800000007 - Advanced Power Management
+ leaf->eax = 0;
+ leaf->ebx = 0;
+ leaf->ecx = 0;
+ leaf->edx = 0x0000000F;
+}
+
+// leaf 0x80000008 //
+void athlon64_clawhammer_t::get_ext_cpuid_leaf_8(cpuid_function_t *leaf)
+{
+ // virtual & phys address size in low 2 bytes.
+ leaf->eax = BX_PHY_ADDRESS_WIDTH | (BX_LIN_ADDRESS_WIDTH << 8);
+ leaf->ebx = 0;
+ leaf->ecx = 0; // Reserved, undefined
+ leaf->edx = 0;
+}
+
+// leaf 0x80000009 : Reserved //
+// leaf 0x8000000A : SVM //
+// leaf 0x8000000B - 0x80000018: Reserved //
+
+// leaf 0x8FFFFFFF //
+void athlon64_clawhammer_t::get_cpuid_hidden_level(cpuid_function_t *leaf)
+{
+ static const char* magic_string = "IT'S HAMMER TIME";
+
+ memcpy(&(leaf->eax), magic_string , 4);
+ memcpy(&(leaf->ebx), magic_string + 4, 4);
+ memcpy(&(leaf->ecx), magic_string + 8, 4);
+ memcpy(&(leaf->edx), magic_string + 12, 4);
+
+#ifdef BX_BIG_ENDIAN
+ leaf->eax = bx_bswap32(leaf->eax);
+ leaf->ebx = bx_bswap32(leaf->ebx);
+ leaf->ecx = bx_bswap32(leaf->ecx);
+ leaf->edx = bx_bswap32(leaf->edx);
+#endif
+}
+
+void athlon64_clawhammer_t::dump_cpuid(void)
+{
+ struct cpuid_function_t leaf;
+ unsigned n;
+
+ for (n=0; n<=1; n++) {
+ BX_CPU_THIS_PTR cpuid->get_cpuid_leaf(n, 0x00000000, &leaf);
+ BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, \
leaf.edx)); + }
+
+ for (n=0x80000000; n<=0x80000018; n++) {
+ BX_CPU_THIS_PTR cpuid->get_cpuid_leaf(n, 0x00000000, &leaf);
+ BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, \
leaf.edx)); + }
+}
+
+bx_cpuid_t *create_athlon64_clawhammer_cpuid(BX_CPU_C *cpu) { return new \
athlon64_clawhammer_t(cpu); } +
+#endif
Modified: trunk/bochs/cpu/cpudb/athlon64_clawhammer.h
===================================================================
--- trunk/bochs/cpu/cpudb/athlon64_clawhammer.h 2011-07-31 14:38:03 UTC (rev 10516)
+++ trunk/bochs/cpu/cpudb/athlon64_clawhammer.h 2011-07-31 14:56:45 UTC (rev 10517)
@@ -24,6 +24,8 @@
#ifndef BX_ATHLON64_CLAWHAMMER_CPUID_DEFINITIONS_H
#define BX_ATHLON64_CLAWHAMMER_CPUID_DEFINITIONS_H
+#if BX_SUPPORT_X86_64
+
#include "cpu/cpuid.h"
class athlon64_clawhammer_t : public bx_cpuid_t {
@@ -60,4 +62,6 @@
extern bx_cpuid_t *create_athlon64_clawhammer_cpuid(BX_CPU_C *cpu);
+#endif // BX_SUPPORT_X86_64
+
#endif
Modified: trunk/bochs/cpu/cpudb/athlon64_clawhammer.txt
===================================================================
--- trunk/bochs/cpu/cpudb/athlon64_clawhammer.txt 2011-07-31 14:38:03 UTC (rev 10516)
+++ trunk/bochs/cpu/cpudb/athlon64_clawhammer.txt 2011-07-31 14:56:45 UTC (rev 10517)
@@ -1,102 +1,102 @@
-CPU-Z TXT Report
--------------------------------------------------------------------------
-
-Binaries
--------------------------------------------------------------------------
-
-CPU-Z version 1.52.2
-
-Processors
--------------------------------------------------------------------------
-
-Number of processors 1
-Number of threads 1
-
-APICs
--------------------------------------------------------------------------
-
-Processor 0
- -- Core 0
- -- Thread 0 0
-
-Processors Information
--------------------------------------------------------------------------
-
-Processor 1 ID = 0
- Number of cores 1 (max 1)
- Number of threads 1 (max 1)
- Name AMD Athlon 64 2800+
- Codename ClawHammer
- Specification AMD Athlon(tm) 64 Processor 2800+
- Package Socket 754
- CPUID F.4.8
- Extended CPUID F.4
- Brand ID 4
- Core Stepping SH7-C0
- Technology 0.13 um
- Core Speed 1808.9 MHz
- Multiplier x FSB 9.0 x 201.0 MHz
- HT Link speed 804.0 MHz
- Stock frequency 1800 MHz
- Instructions sets MMX (+), 3DNow! (+), SSE, SSE2, x86-64
- L1 Data cache 64 KBytes, 2-way set associative, 64-byte line size
- L1 Instruction cache 64 KBytes, 2-way set associative, 64-byte line size
- L2 cache 512 KBytes, 16-way set associative, 64-byte line size
- FID/VID Control yes
- Max FID 9.0x
-
- K8 Thermal sensor yes
- K8 Revision ID 2.4
- Attached device PCI device at bus 0, device 24, function 0
- Attached device PCI device at bus 0, device 24, function 1
- Attached device PCI device at bus 0, device 24, function 2
- Attached device PCI device at bus 0, device 24, function 3
-
-
-Thread dumps
--------------------------------------------------------------------------
-
-CPU Thread 0
- APIC ID 0
- Topology Processor ID 0, Core ID 0, Thread ID 0
- Type 02002001h
- Max CPUID level 00000001h
- Max CPUID ext. level 80000018h
- Cache descriptor Level 1, I, 64 KB, 1 thread(s)
- Cache descriptor Level 1, D, 64 KB, 1 thread(s)
- Cache descriptor Level 2, U, 512 KB, 1 thread(s)
-
- CPUID
- 0x00000000 0x00000001 0x68747541 0x444D4163 0x69746E65
- 0x00000001 0x00000F48 0x00000800 0x00000000 0x078BFBFF
- 0x80000000 0x80000018 0x68747541 0x444D4163 0x69746E65
- 0x80000001 0x00000F48 0x00000106 0x00000000 0xE1D3FBFF
- 0x80000002 0x20444D41 0x6C687441 0x74286E6F 0x3620296D
- 0x80000003 0x72502034 0x7365636F 0x20726F73 0x30303832
- 0x80000004 0x0000002B 0x00000000 0x00000000 0x00000000
- 0x80000005 0xFF08FF08 0xFF20FF20 0x40020140 0x40020140
- 0x80000006 0x00000000 0x42004200 0x02008140 0x00000000
- 0x80000007 0x00000000 0x00000000 0x00000000 0x0000000F
- 0x80000008 0x00003028 0x00000000 0x00000000 0x00000000
- 0x80000009 0x00000000 0x00000000 0x00000000 0x00000000
- 0x8000000A 0x00000000 0x00000000 0x00000000 0x00000000
- 0x8000000B 0x00000000 0x00000000 0x00000000 0x00000000
- 0x8000000C 0x00000000 0x00000000 0x00000000 0x00000000
- 0x8000000D 0x00000000 0x00000000 0x00000000 0x00000000
- 0x8000000E 0x00000000 0x00000000 0x00000000 0x00000000
- 0x8000000F 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000010 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000011 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000012 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000013 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000014 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000015 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000016 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000017 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000018 0x00000000 0x00000000 0x00000000 0x00000000
-
- MSR 0x0000001B 0x00000000 0xFEE00900
- MSR 0xC001001E 0x00000000 0x00000024
- MSR 0xC0010015 0x00000000 0x0A000000
- MSR 0xC0010042 0x00000202 0x000A0A0A
- MSR 0xC0010041 0x00000001 0x0000020A
+CPU-Z TXT Report
+-------------------------------------------------------------------------
+
+Binaries
+-------------------------------------------------------------------------
+
+CPU-Z version 1.52.2
+
+Processors
+-------------------------------------------------------------------------
+
+Number of processors 1
+Number of threads 1
+
+APICs
+-------------------------------------------------------------------------
+
+Processor 0
+ -- Core 0
+ -- Thread 0 0
+
+Processors Information
+-------------------------------------------------------------------------
+
+Processor 1 ID = 0
+ Number of cores 1 (max 1)
+ Number of threads 1 (max 1)
+ Name AMD Athlon 64 2800+
+ Codename ClawHammer
+ Specification AMD Athlon(tm) 64 Processor 2800+
+ Package Socket 754
+ CPUID F.4.8
+ Extended CPUID F.4
+ Brand ID 4
+ Core Stepping SH7-C0
+ Technology 0.13 um
+ Core Speed 1808.9 MHz
+ Multiplier x FSB 9.0 x 201.0 MHz
+ HT Link speed 804.0 MHz
+ Stock frequency 1800 MHz
+ Instructions sets MMX (+), 3DNow! (+), SSE, SSE2, x86-64
+ L1 Data cache 64 KBytes, 2-way set associative, 64-byte line size
+ L1 Instruction cache 64 KBytes, 2-way set associative, 64-byte line size
+ L2 cache 512 KBytes, 16-way set associative, 64-byte line size
+ FID/VID Control yes
+ Max FID 9.0x
+
+ K8 Thermal sensor yes
+ K8 Revision ID 2.4
+ Attached device PCI device at bus 0, device 24, function 0
+ Attached device PCI device at bus 0, device 24, function 1
+ Attached device PCI device at bus 0, device 24, function 2
+ Attached device PCI device at bus 0, device 24, function 3
+
+
+Thread dumps
+-------------------------------------------------------------------------
+
+CPU Thread 0
+ APIC ID 0
+ Topology Processor ID 0, Core ID 0, Thread ID 0
+ Type 02002001h
+ Max CPUID level 00000001h
+ Max CPUID ext. level 80000018h
+ Cache descriptor Level 1, I, 64 KB, 1 thread(s)
+ Cache descriptor Level 1, D, 64 KB, 1 thread(s)
+ Cache descriptor Level 2, U, 512 KB, 1 thread(s)
+
+ CPUID
+ 0x00000000 0x00000001 0x68747541 0x444D4163 0x69746E65
+ 0x00000001 0x00000F48 0x00000800 0x00000000 0x078BFBFF
+ 0x80000000 0x80000018 0x68747541 0x444D4163 0x69746E65
+ 0x80000001 0x00000F48 0x00000106 0x00000000 0xE1D3FBFF
+ 0x80000002 0x20444D41 0x6C687441 0x74286E6F 0x3620296D
+ 0x80000003 0x72502034 0x7365636F 0x20726F73 0x30303832
+ 0x80000004 0x0000002B 0x00000000 0x00000000 0x00000000
+ 0x80000005 0xFF08FF08 0xFF20FF20 0x40020140 0x40020140
+ 0x80000006 0x00000000 0x42004200 0x02008140 0x00000000
+ 0x80000007 0x00000000 0x00000000 0x00000000 0x0000000F
+ 0x80000008 0x00003028 0x00000000 0x00000000 0x00000000
+ 0x80000009 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x8000000A 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x8000000B 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x8000000C 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x8000000D 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x8000000E 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x8000000F 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000010 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000011 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000012 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000013 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000014 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000015 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000016 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000017 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000018 0x00000000 0x00000000 0x00000000 0x00000000
+
+ MSR 0x0000001B 0x00000000 0xFEE00900
+ MSR 0xC001001E 0x00000000 0x00000024
+ MSR 0xC0010015 0x00000000 0x0A000000
+ MSR 0xC0010042 0x00000202 0x000A0A0A
+ MSR 0xC0010041 0x00000001 0x0000020A
Modified: trunk/bochs/cpu/cpudb/core2_extreme_x9770.cc
===================================================================
--- trunk/bochs/cpu/cpudb/core2_extreme_x9770.cc 2011-07-31 14:38:03 UTC (rev 10516)
+++ trunk/bochs/cpu/cpudb/core2_extreme_x9770.cc 2011-07-31 14:56:45 UTC (rev 10517)
@@ -1,602 +1,602 @@
-/////////////////////////////////////////////////////////////////////////
-// $Id$
-/////////////////////////////////////////////////////////////////////////
-//
-// Copyright (c) 2011 Stanislav Shwartsman
-// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
-//
-// This library is free software; you can redistribute it and/or
-// modify it under the terms of the GNU Lesser General Public
-// License as published by the Free Software Foundation; either
-// version 2 of the License, or (at your option) any later version.
-//
-// This library is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-// Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public
-// License along with this library; if not, write to the Free Software
-// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
-//
-/////////////////////////////////////////////////////////////////////////
-
-#include "bochs.h"
-#include "cpu/cpu.h"
-#include "param_names.h"
-#include "core2_extreme_x9770.h"
-
-#define LOG_THIS cpu->
-
-#if BX_SUPPORT_X86_64
-
-core2_extreme_x9770_t::core2_extreme_x9770_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
-{
-#if BX_SUPPORT_SMP
- nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
- ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
- nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
-#endif
-
- if (! BX_SUPPORT_X86_64)
- BX_PANIC(("You must enable x86-64 for Intel Core2 X9770 configuration"));
-}
-
-void core2_extreme_x9770_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, \
cpuid_function_t *leaf)
-{
- static bx_bool cpuid_limit_winnt = \
SIM->get_param_bool(BXPN_CPUID_LIMIT_WINNT)->get();
- if (function > 3 && cpuid_limit_winnt)
- function = 3;
-
- switch(function) {
- case 0x80000000:
- get_ext_cpuid_leaf_0(leaf);
- return;
- case 0x80000001:
- get_ext_cpuid_leaf_1(leaf);
- return;
- case 0x80000002:
- case 0x80000003:
- case 0x80000004:
- get_ext_cpuid_brand_string_leaf(function, leaf);
- return;
- case 0x80000005:
- get_ext_cpuid_leaf_5(leaf);
- return;
- case 0x80000006:
- get_ext_cpuid_leaf_6(leaf);
- return;
- case 0x80000007:
- get_ext_cpuid_leaf_7(leaf);
- return;
- case 0x80000008:
- get_ext_cpuid_leaf_8(leaf);
- return;
- case 0x00000000:
- get_std_cpuid_leaf_0(leaf);
- return;
- case 0x00000001:
- get_std_cpuid_leaf_1(leaf);
- return;
- case 0x00000002:
- get_std_cpuid_leaf_2(leaf);
- return;
- case 0x00000003:
- get_std_cpuid_leaf_3(leaf);
- return;
- case 0x00000004:
- get_std_cpuid_leaf_4(subfunction, leaf);
- return;
- case 0x00000005:
- get_std_cpuid_leaf_5(leaf);
- return;
- case 0x00000006:
- get_std_cpuid_leaf_6(leaf);
- return;
- case 0x00000007:
- get_std_cpuid_leaf_7(subfunction, leaf);
- return;
- case 0x00000008:
- get_std_cpuid_leaf_8(leaf);
- return;
- case 0x00000009:
- get_std_cpuid_leaf_9(leaf);
- return;
- case 0x0000000A:
- default:
- get_std_cpuid_leaf_A(leaf);
- return;
- }
-}
-
-Bit32u core2_extreme_x9770_t::get_isa_extensions_bitmask(void) const
-{
- return BX_CPU_X87 |
- BX_CPU_486 |
- BX_CPU_PENTIUM |
- BX_CPU_P6 |
- BX_CPU_MMX |
- BX_CPU_FXSAVE_FXRSTOR |
- BX_CPU_SYSENTER_SYSEXIT |
- BX_CPU_CLFLUSH |
- BX_CPU_SSE |
- BX_CPU_SSE2 |
- BX_CPU_SSE3 |
- BX_CPU_SSSE3 |
- BX_CPU_SSE4_1 |
-#if BX_SUPPORT_MONITOR_MWAIT
- BX_CPU_MONITOR_MWAIT |
-#endif
-#if BX_SUPPORT_VMX
- BX_CPU_VMX |
-#endif
- /* BX_CPU_SMX | */
- BX_CPU_X86_64;
-}
-
-Bit32u core2_extreme_x9770_t::get_cpu_extensions_bitmask(void) const
-{
- return BX_CPU_DEBUG_EXTENSIONS |
- BX_CPU_VME |
- BX_CPU_PSE |
- BX_CPU_PAE |
- BX_CPU_PGE |
- BX_CPU_PSE36 |
- BX_CPU_PAT_MTRR |
- BX_CPU_XAPIC;
-}
-
-// leaf 0x00000000 //
-void core2_extreme_x9770_t::get_std_cpuid_leaf_0(cpuid_function_t *leaf)
-{
- static const char* vendor_string = "GenuineIntel";
-
- // EAX: highest std function understood by CPUID
- // EBX: vendor ID string
- // EDX: vendor ID string
- // ECX: vendor ID string
- leaf->eax = 0xa;
-
- // CPUID vendor string (e.g. GenuineIntel, AuthenticAMD, CentaurHauls, ...)
- memcpy(&(leaf->ebx), vendor_string, 4);
- memcpy(&(leaf->edx), vendor_string + 4, 4);
- memcpy(&(leaf->ecx), vendor_string + 8, 4);
-#ifdef BX_BIG_ENDIAN
- leaf->ebx = bx_bswap32(leaf->ebx);
- leaf->ecx = bx_bswap32(leaf->ecx);
- leaf->edx = bx_bswap32(leaf->edx);
-#endif
-}
-
-// leaf 0x00000001 //
-void core2_extreme_x9770_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf)
-{
- // EAX: CPU Version Information
- // [3:0] Stepping ID
- // [7:4] Model: starts at 1
- // [11:8] Family: 4=486, 5=Pentium, 6=PPro, ...
- // [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved
- // [19:16] Extended Model
- // [27:20] Extended Family
- leaf->eax = 0x00010676;
-
- // EBX:
- // [7:0] Brand ID
- // [15:8] CLFLUSH cache line size (value*8 = cache line size in bytes)
- // [23:16] Number of logical processors in one physical processor
- // [31:24] Local Apic ID
-
-#if BX_SUPPORT_SMP
- unsigned n_logical_processors = ncores*nthreads;
-#else
- unsigned n_logical_processors = 1;
-#endif
- leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
- (n_logical_processors << 16);
-#if BX_SUPPORT_APIC
- leaf->ebx |= ((cpu->get_apic_id() & 0xff) << 24);
-#endif
-
- // ECX: Extended Feature Flags
- // * [0:0] SSE3: SSE3 Instructions
- // [1:1] PCLMULQDQ Instruction support
- // * [2:2] DTES64: 64-bit DS area
- // * [3:3] MONITOR/MWAIT support
- // * [4:4] DS-CPL: CPL qualified debug store
- // * [5:5] VMX: Virtual Machine Technology
- // [6:6] SMX: Secure Virtual Machine Technology
- // * [7:7] EST: Enhanced Intel SpeedStep Technology
- // * [8:8] TM2: Thermal Monitor 2
- // * [9:9] SSSE3: SSSE3 Instructions
- // [10:10] CNXT-ID: L1 context ID
- // [11:11] reserved
- // [12:12] FMA Instructions support
- // * [13:13] CMPXCHG16B: CMPXCHG16B instruction support
- // * [14:14] xTPR update control
- // * [15:15] PDCM - Perfon and Debug Capability MSR
- // [16:16] reserved
- // [17:17] PCID: Process Context Identifiers
- // [18:18] DCA - Direct Cache Access
- // * [19:19] SSE4.1 Instructions
- // [20:20] SSE4.2 Instructions
- // [21:21] X2APIC
- // [22:22] MOVBE instruction
- // [23:23] POPCNT instruction
- // [24:24] TSC Deadline
- // [25:25] AES Instructions
- // [26:26] XSAVE extensions support
- // [27:27] OSXSAVE support
- // [28:28] AVX extensions support
- // [29:29] AVX F16C - Float16 conversion support
- // [30:30] RDRAND instruction
- // [31:31] reserved
- leaf->ecx = BX_CPUID_EXT_SSE3 |
- BX_CPUID_EXT_DTES64 |
-#if BX_SUPPORT_MONITOR_MWAIT
- BX_CPUID_EXT_MONITOR_MWAIT |
-#endif
- BX_CPUID_EXT_DS_CPL |
-#if BX_SUPPORT_VMX
- BX_CPUID_EXT_VMX |
-#endif
- /* BX_CPUID_EXT_SMX | */
- BX_CPUID_EXT_EST |
- BX_CPUID_EXT_THERMAL_MONITOR2 |
- BX_CPUID_EXT_SSSE3 |
- BX_CPUID_EXT_CMPXCHG16B |
- BX_CPUID_EXT_xTPR |
- BX_CPUID_EXT_PDCM |
- BX_CPUID_EXT_SSE4_1;
-
- // EDX: Standard Feature Flags
- // * [0:0] FPU on chip
- // * [1:1] VME: Virtual-8086 Mode enhancements
- // * [2:2] DE: Debug Extensions (I/O breakpoints)
- // * [3:3] PSE: Page Size Extensions
- // * [4:4] TSC: Time Stamp Counter
- // * [5:5] MSR: RDMSR and WRMSR support
- // * [6:6] PAE: Physical Address Extensions
- // * [7:7] MCE: Machine Check Exception
- // * [8:8] CXS: CMPXCHG8B instruction
- // * [9:9] APIC: APIC on Chip
- // [10:10] Reserved
- // * [11:11] SYSENTER/SYSEXIT support
- // * [12:12] MTRR: Memory Type Range Reg
- // * [13:13] PGE/PTE Global Bit
- // * [14:14] MCA: Machine Check Architecture
- // * [15:15] CMOV: Cond Mov/Cmp Instructions
- // * [16:16] PAT: Page Attribute Table
- // * [17:17] PSE-36: Physical Address Extensions
- // [18:18] PSN: Processor Serial Number
- // * [19:19] CLFLUSH: CLFLUSH Instruction support
- // [20:20] Reserved
- // * [21:21] DS: Debug Store
- // * [22:22] ACPI: Thermal Monitor and Software Controlled Clock Facilities
- // * [23:23] MMX Technology
- // * [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
- // * [25:25] SSE: SSE Extensions
- // * [26:26] SSE2: SSE2 Extensions
- // * [27:27] Self Snoop
- // * [28:28] Hyper Threading Technology
- // * [29:29] TM: Thermal Monitor
- // [30:30] Reserved
- // * [31:31] PBE: Pending Break Enable
- leaf->edx = BX_CPUID_STD_X87 |
- BX_CPUID_STD_VME |
- BX_CPUID_STD_DEBUG_EXTENSIONS |
- BX_CPUID_STD_PSE |
- BX_CPUID_STD_TSC |
- BX_CPUID_STD_MSR |
- BX_CPUID_STD_PAE |
- BX_CPUID_STD_MCE |
- BX_CPUID_STD_CMPXCHG8B |
- BX_CPUID_STD_SYSENTER_SYSEXIT |
- BX_CPUID_STD_MTRR |
- BX_CPUID_STD_GLOBAL_PAGES |
- BX_CPUID_STD_MCA |
- BX_CPUID_STD_CMOV |
- BX_CPUID_STD_PAT |
- BX_CPUID_STD_PSE36 |
- BX_CPUID_STD_CLFLUSH |
- BX_CPUID_STD_DEBUG_STORE |
- BX_CPUID_STD_ACPI |
- BX_CPUID_STD_MMX |
- BX_CPUID_STD_FXSAVE_FXRSTOR |
- BX_CPUID_STD_SSE |
- BX_CPUID_STD_SSE2 |
- BX_CPUID_STD_SELF_SNOOP |
- BX_CPUID_STD_HT |
- BX_CPUID_STD_THERMAL_MONITOR |
- BX_CPUID_STD_PBE;
-#if BX_SUPPORT_APIC
- // if MSR_APICBASE APIC Global Enable bit has been cleared,
- // the CPUID feature flag for the APIC is set to 0.
- if (cpu->msr.apicbase & 0x800)
- leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
-#endif
-}
-
-// leaf 0x00000002 //
-void core2_extreme_x9770_t::get_std_cpuid_leaf_2(cpuid_function_t *leaf)
-{
- // CPUID function 0x00000002 - Cache and TLB Descriptors
- leaf->eax = 0x05B0B101;
- leaf->ebx = 0x005657F0;
- leaf->ecx = 0x00000000;
- leaf->edx = 0x2CB4304E;
-}
-
-// leaf 0x00000003 //
-void core2_extreme_x9770_t::get_std_cpuid_leaf_3(cpuid_function_t *leaf)
-{
- // CPUID function 0x00000003 - Processor Serial Number
- leaf->eax = 0;
- leaf->ebx = 0;
- leaf->ecx = 0;
- leaf->edx = 0;
-}
-
-// leaf 0x00000004 //
-void core2_extreme_x9770_t::get_std_cpuid_leaf_4(Bit32u subfunction, \
cpuid_function_t *leaf)
-{
- // CPUID function 0x00000004 - Deterministic Cache Parameters
- switch(subfunction) {
- case 0:
- leaf->eax = 0x0C000121;
- leaf->ebx = 0x01C0003F;
- leaf->ecx = 0x0000003F;
- leaf->edx = 0x00000001;
- return;
- case 1:
- leaf->eax = 0x0C000122;
- leaf->ebx = 0x01C0003F;
- leaf->ecx = 0x0000003F;
- leaf->edx = 0x00000001;
- return;
- case 2:
- leaf->eax = 0x0C004143;
- leaf->ebx = 0x05C0003F;
- leaf->ecx = 0x00000FFF;
- leaf->edx = 0x00000001;
- return;
- default:
- leaf->eax = 0;
- leaf->ebx = 0;
- leaf->ecx = 0;
- leaf->edx = 0;
- }
-}
-
-// leaf 0x00000005 //
-void core2_extreme_x9770_t::get_std_cpuid_leaf_5(cpuid_function_t *leaf)
-{
- // CPUID function 0x00000005 - MONITOR/MWAIT Leaf
-
-#if BX_SUPPORT_MONITOR_MWAIT
- // EAX - Smallest monitor-line size in bytes
- // EBX - Largest monitor-line size in bytes
- // ECX -
- // [31:2] - reserved
- // [1:1] - exit MWAIT even with EFLAGS.IF = 0
- // [0:0] - MONITOR/MWAIT extensions are supported
- // EDX - Reserved
- leaf->eax = CACHE_LINE_SIZE;
- leaf->ebx = CACHE_LINE_SIZE;
- leaf->ecx = 3;
- leaf->edx = 0;
-#else
- leaf->eax = 0;
- leaf->ebx = 0;
- leaf->ecx = 0;
- leaf->edx = 0;
-#endif
-}
-
-// leaf 0x00000006 //
-void core2_extreme_x9770_t::get_std_cpuid_leaf_6(cpuid_function_t *leaf)
-{
- // CPUID function 0x00000006 - Thermal and Power Management Leaf
- leaf->eax = 0x00000001;
- leaf->ebx = 0x00000002;
- leaf->ecx = 0x00000001;
- leaf->edx = 0x00000000;
-}
-
-// leaf 0x00000007 //
-void core2_extreme_x9770_t::get_std_cpuid_leaf_7(Bit32u subfunction, \
cpuid_function_t *leaf)
-{
- leaf->eax = 0; /* leaf 7 not supported */
- leaf->ebx = 0;
- leaf->ecx = 0;
- leaf->edx = 0;
-}
-
-// leaf 0x00000008 //
-void core2_extreme_x9770_t::get_std_cpuid_leaf_8(cpuid_function_t *leaf)
-{
- // CPUID function 0x00000008 - reserved
- leaf->eax = 0;
- leaf->ebx = 0;
- leaf->ecx = 0;
- leaf->edx = 0;
-}
-
-// leaf 0x00000009 //
-void core2_extreme_x9770_t::get_std_cpuid_leaf_9(cpuid_function_t *leaf)
-{
- // CPUID function 0x00000009 - Direct Cache Access Information
- leaf->eax = 0;
- leaf->ebx = 0;
- leaf->ecx = 0;
- leaf->edx = 0;
-}
-
-// leaf 0x0000000A //
-void core2_extreme_x9770_t::get_std_cpuid_leaf_A(cpuid_function_t *leaf)
-{
- // CPUID function 0x0000000A - Architectural Performance Monitoring Leaf
- leaf->eax = 0x07280202;
- leaf->ebx = 0x00000000;
- leaf->ecx = 0x00000000;
- leaf->edx = 0x00000503;
-
- BX_INFO(("WARNING: Architectural Performance Monitoring is not implemented"));
-}
-
-// leaf 0x80000000 //
-void core2_extreme_x9770_t::get_ext_cpuid_leaf_0(cpuid_function_t *leaf)
-{
- // EAX: highest extended function understood by CPUID
- // EBX: reserved
- // EDX: reserved
- // ECX: reserved
- leaf->eax = 0x80000008;
- leaf->ebx = 0;
- leaf->edx = 0; // Reserved for Intel
- leaf->ecx = 0;
-}
-
-// leaf 0x80000001 //
-void core2_extreme_x9770_t::get_ext_cpuid_leaf_1(cpuid_function_t *leaf)
-{
- // EAX: CPU Version Information (reserved for Intel)
- leaf->eax = 0;
-
- // EBX: Brand ID (reserved for Intel)
- leaf->ebx = 0;
-
- // ECX:
- // * [0:0] LAHF/SAHF instructions support in 64-bit mode
- // [1:1] CMP_Legacy: Core multi-processing legacy mode (AMD)
- // [2:2] SVM: Secure Virtual Machine (AMD)
- // [3:3] Extended APIC Space
- // [4:4] AltMovCR8: LOCK MOV CR0 means MOV CR8
- // [5:5] LZCNT: LZCNT instruction support
- // [6:6] SSE4A: SSE4A Instructions support (deprecated?)
- // [7:7] Misaligned SSE support
- // [8:8] PREFETCHW: PREFETCHW instruction support
- // [9:9] OSVW: OS visible workarounds (AMD)
- // [11:10] reserved
- // [12:12] SKINIT support
- // [13:13] WDT: Watchdog timer support
- // [31:14] reserved
-
- leaf->ecx = BX_CPUID_EXT2_LAHF_SAHF;
-
- // EDX:
- // Many of the bits in EDX are the same as FN 0x00000001 [*] for AMD
- // [10:0] Reserved for Intel
- // * [11:11] SYSCALL/SYSRET support
- // [19:12] Reserved for Intel
- // * [20:20] No-Execute page protection
- // [25:21] Reserved
- // [26:26] 1G paging support
- // [27:27] Support RDTSCP Instruction
- // [28:28] Reserved
- // * [29:29] Long Mode
- // [30:30] AMD 3DNow! Extensions
- // [31:31] AMD 3DNow! Instructions
-
- leaf->edx = BX_CPUID_STD2_SYSCALL_SYSRET |
- BX_CPUID_STD2_NX |
- BX_CPUID_STD2_LONG_MODE;
-}
-
-// leaf 0x80000002 //
-// leaf 0x80000003 //
-// leaf 0x80000004 //
-void core2_extreme_x9770_t::get_ext_cpuid_brand_string_leaf(Bit32u function, \
cpuid_function_t *leaf)
-{
- // CPUID function 0x800000002-0x800000004 - Processor Name String Identifier
- static const char* brand_string = "Intel(R) Core(TM)2 Extreme CPU X9770 @ \
3.20GHz";
-
- switch(function) {
- case 0x80000002:
- memcpy(&(leaf->eax), brand_string , 4);
- memcpy(&(leaf->ebx), brand_string + 4, 4);
- memcpy(&(leaf->ecx), brand_string + 8, 4);
- memcpy(&(leaf->edx), brand_string + 12, 4);
- break;
- case 0x80000003:
- memcpy(&(leaf->eax), brand_string + 16, 4);
- memcpy(&(leaf->ebx), brand_string + 20, 4);
- memcpy(&(leaf->ecx), brand_string + 24, 4);
- memcpy(&(leaf->edx), brand_string + 28, 4);
- break;
- case 0x80000004:
- memcpy(&(leaf->eax), brand_string + 32, 4);
- memcpy(&(leaf->ebx), brand_string + 36, 4);
- memcpy(&(leaf->ecx), brand_string + 40, 4);
- memcpy(&(leaf->edx), brand_string + 44, 4);
- break;
- default:
- break;
- }
-
-#ifdef BX_BIG_ENDIAN
- leaf->eax = bx_bswap32(leaf->eax);
- leaf->ebx = bx_bswap32(leaf->ebx);
- leaf->ecx = bx_bswap32(leaf->ecx);
- leaf->edx = bx_bswap32(leaf->edx);
-#endif
-}
-
-// leaf 0x80000005 //
-void core2_extreme_x9770_t::get_ext_cpuid_leaf_5(cpuid_function_t *leaf)
-{
- // CPUID function 0x800000005 - L1 Cache and TLB Identifiers
- leaf->eax = 0;
- leaf->ebx = 0;
- leaf->ecx = 0; // reserved for Intel
- leaf->edx = 0;
-}
-
-// leaf 0x80000006 //
-void core2_extreme_x9770_t::get_ext_cpuid_leaf_6(cpuid_function_t *leaf)
-{
- // CPUID function 0x800000006 - L2 Cache and TLB Identifiers
- leaf->eax = 0x00000000;
- leaf->ebx = 0x00000000;
- leaf->ecx = 0x18008040;
- leaf->edx = 0x00000000;
-}
-
-// leaf 0x80000007 //
-void core2_extreme_x9770_t::get_ext_cpuid_leaf_7(cpuid_function_t *leaf)
-{
- // CPUID function 0x800000007 - Advanced Power Management
- leaf->eax = 0;
- leaf->ebx = 0;
- leaf->ecx = 0;
- leaf->edx = 0;
-}
-
-// leaf 0x80000008 //
-void core2_extreme_x9770_t::get_ext_cpuid_leaf_8(cpuid_function_t *leaf)
-{
- // virtual & phys address size in low 2 bytes.
- leaf->eax = BX_PHY_ADDRESS_WIDTH | (BX_LIN_ADDRESS_WIDTH << 8);
- leaf->ebx = 0;
- leaf->ecx = 0; // Reserved, undefined
- leaf->edx = 0;
-}
-
-void core2_extreme_x9770_t::dump_cpuid(void)
-{
- struct cpuid_function_t leaf;
- unsigned n;
-
- for (n=0; n<=0xa; n++) {
- BX_CPU_THIS_PTR cpuid->get_cpuid_leaf(n, 0x00000000, &leaf);
- BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, \
leaf.edx));
- }
-
- for (n=0x80000000; n<=0x80000008; n++) {
- BX_CPU_THIS_PTR cpuid->get_cpuid_leaf(n, 0x00000000, &leaf);
- BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, \
leaf.edx));
- }
-}
-
-bx_cpuid_t *create_core2_extreme_x9770_cpuid(BX_CPU_C *cpu) { return new \
core2_extreme_x9770_t(cpu); }
-
-#endif
+/////////////////////////////////////////////////////////////////////////
+// $Id$
+/////////////////////////////////////////////////////////////////////////
+//
+// Copyright (c) 2011 Stanislav Shwartsman
+// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
+//
+// This library is free software; you can redistribute it and/or
+// modify it under the terms of the GNU Lesser General Public
+// License as published by the Free Software Foundation; either
+// version 2 of the License, or (at your option) any later version.
+//
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public
+// License along with this library; if not, write to the Free Software
+// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
+//
+/////////////////////////////////////////////////////////////////////////
+
+#include "bochs.h"
+#include "cpu/cpu.h"
+#include "param_names.h"
+#include "core2_extreme_x9770.h"
+
+#define LOG_THIS cpu->
+
+#if BX_SUPPORT_X86_64
+
+core2_extreme_x9770_t::core2_extreme_x9770_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
+{
+#if BX_SUPPORT_SMP
+ nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
+ ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
+ nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
+#endif
+
+ if (! BX_SUPPORT_X86_64)
+ BX_PANIC(("You must enable x86-64 for Intel Core2 X9770 configuration"));
+}
+
+void core2_extreme_x9770_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, \
cpuid_function_t *leaf) +{
+ static bx_bool cpuid_limit_winnt = \
SIM->get_param_bool(BXPN_CPUID_LIMIT_WINNT)->get(); + if (function > 3 && \
cpuid_limit_winnt) + function = 3;
+
+ switch(function) {
+ case 0x80000000:
+ get_ext_cpuid_leaf_0(leaf);
+ return;
+ case 0x80000001:
+ get_ext_cpuid_leaf_1(leaf);
+ return;
+ case 0x80000002:
+ case 0x80000003:
+ case 0x80000004:
+ get_ext_cpuid_brand_string_leaf(function, leaf);
+ return;
+ case 0x80000005:
+ get_ext_cpuid_leaf_5(leaf);
+ return;
+ case 0x80000006:
+ get_ext_cpuid_leaf_6(leaf);
+ return;
+ case 0x80000007:
+ get_ext_cpuid_leaf_7(leaf);
+ return;
+ case 0x80000008:
+ get_ext_cpuid_leaf_8(leaf);
+ return;
+ case 0x00000000:
+ get_std_cpuid_leaf_0(leaf);
+ return;
+ case 0x00000001:
+ get_std_cpuid_leaf_1(leaf);
+ return;
+ case 0x00000002:
+ get_std_cpuid_leaf_2(leaf);
+ return;
+ case 0x00000003:
+ get_std_cpuid_leaf_3(leaf);
+ return;
+ case 0x00000004:
+ get_std_cpuid_leaf_4(subfunction, leaf);
+ return;
+ case 0x00000005:
+ get_std_cpuid_leaf_5(leaf);
+ return;
+ case 0x00000006:
+ get_std_cpuid_leaf_6(leaf);
+ return;
+ case 0x00000007:
+ get_std_cpuid_leaf_7(subfunction, leaf);
+ return;
+ case 0x00000008:
+ get_std_cpuid_leaf_8(leaf);
+ return;
+ case 0x00000009:
+ get_std_cpuid_leaf_9(leaf);
+ return;
+ case 0x0000000A:
+ default:
+ get_std_cpuid_leaf_A(leaf);
+ return;
+ }
+}
+
+Bit32u core2_extreme_x9770_t::get_isa_extensions_bitmask(void) const
+{
+ return BX_CPU_X87 |
+ BX_CPU_486 |
+ BX_CPU_PENTIUM |
+ BX_CPU_P6 |
+ BX_CPU_MMX |
+ BX_CPU_FXSAVE_FXRSTOR |
+ BX_CPU_SYSENTER_SYSEXIT |
+ BX_CPU_CLFLUSH |
+ BX_CPU_SSE |
+ BX_CPU_SSE2 |
+ BX_CPU_SSE3 |
+ BX_CPU_SSSE3 |
+ BX_CPU_SSE4_1 |
+#if BX_SUPPORT_MONITOR_MWAIT
+ BX_CPU_MONITOR_MWAIT |
+#endif
+#if BX_SUPPORT_VMX
+ BX_CPU_VMX |
+#endif
+ /* BX_CPU_SMX | */
+ BX_CPU_X86_64;
+}
+
+Bit32u core2_extreme_x9770_t::get_cpu_extensions_bitmask(void) const
+{
+ return BX_CPU_DEBUG_EXTENSIONS |
+ BX_CPU_VME |
+ BX_CPU_PSE |
+ BX_CPU_PAE |
+ BX_CPU_PGE |
+ BX_CPU_PSE36 |
+ BX_CPU_PAT_MTRR |
+ BX_CPU_XAPIC;
+}
+
+// leaf 0x00000000 //
+void core2_extreme_x9770_t::get_std_cpuid_leaf_0(cpuid_function_t *leaf)
+{
+ static const char* vendor_string = "GenuineIntel";
+
+ // EAX: highest std function understood by CPUID
+ // EBX: vendor ID string
+ // EDX: vendor ID string
+ // ECX: vendor ID string
+ leaf->eax = 0xa;
+
+ // CPUID vendor string (e.g. GenuineIntel, AuthenticAMD, CentaurHauls, ...)
+ memcpy(&(leaf->ebx), vendor_string, 4);
+ memcpy(&(leaf->edx), vendor_string + 4, 4);
+ memcpy(&(leaf->ecx), vendor_string + 8, 4);
+#ifdef BX_BIG_ENDIAN
+ leaf->ebx = bx_bswap32(leaf->ebx);
+ leaf->ecx = bx_bswap32(leaf->ecx);
+ leaf->edx = bx_bswap32(leaf->edx);
+#endif
+}
+
+// leaf 0x00000001 //
+void core2_extreme_x9770_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf)
+{
+ // EAX: CPU Version Information
+ // [3:0] Stepping ID
+ // [7:4] Model: starts at 1
+ // [11:8] Family: 4=486, 5=Pentium, 6=PPro, ...
+ // [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved
+ // [19:16] Extended Model
+ // [27:20] Extended Family
+ leaf->eax = 0x00010676;
+
+ // EBX:
+ // [7:0] Brand ID
+ // [15:8] CLFLUSH cache line size (value*8 = cache line size in bytes)
+ // [23:16] Number of logical processors in one physical processor
+ // [31:24] Local Apic ID
+
+#if BX_SUPPORT_SMP
+ unsigned n_logical_processors = ncores*nthreads;
+#else
+ unsigned n_logical_processors = 1;
+#endif
+ leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
+ (n_logical_processors << 16);
+#if BX_SUPPORT_APIC
+ leaf->ebx |= ((cpu->get_apic_id() & 0xff) << 24);
+#endif
+
+ // ECX: Extended Feature Flags
+ // * [0:0] SSE3: SSE3 Instructions
+ // [1:1] PCLMULQDQ Instruction support
+ // * [2:2] DTES64: 64-bit DS area
+ // * [3:3] MONITOR/MWAIT support
+ // * [4:4] DS-CPL: CPL qualified debug store
+ // * [5:5] VMX: Virtual Machine Technology
+ // [6:6] SMX: Secure Virtual Machine Technology
+ // * [7:7] EST: Enhanced Intel SpeedStep Technology
+ // * [8:8] TM2: Thermal Monitor 2
+ // * [9:9] SSSE3: SSSE3 Instructions
+ // [10:10] CNXT-ID: L1 context ID
+ // [11:11] reserved
+ // [12:12] FMA Instructions support
+ // * [13:13] CMPXCHG16B: CMPXCHG16B instruction support
+ // * [14:14] xTPR update control
+ // * [15:15] PDCM - Perfon and Debug Capability MSR
+ // [16:16] reserved
+ // [17:17] PCID: Process Context Identifiers
+ // [18:18] DCA - Direct Cache Access
+ // * [19:19] SSE4.1 Instructions
+ // [20:20] SSE4.2 Instructions
+ // [21:21] X2APIC
+ // [22:22] MOVBE instruction
+ // [23:23] POPCNT instruction
+ // [24:24] TSC Deadline
+ // [25:25] AES Instructions
+ // [26:26] XSAVE extensions support
+ // [27:27] OSXSAVE support
+ // [28:28] AVX extensions support
+ // [29:29] AVX F16C - Float16 conversion support
+ // [30:30] RDRAND instruction
+ // [31:31] reserved
+ leaf->ecx = BX_CPUID_EXT_SSE3 |
+ BX_CPUID_EXT_DTES64 |
+#if BX_SUPPORT_MONITOR_MWAIT
+ BX_CPUID_EXT_MONITOR_MWAIT |
+#endif
+ BX_CPUID_EXT_DS_CPL |
+#if BX_SUPPORT_VMX
+ BX_CPUID_EXT_VMX |
+#endif
+ /* BX_CPUID_EXT_SMX | */
+ BX_CPUID_EXT_EST |
+ BX_CPUID_EXT_THERMAL_MONITOR2 |
+ BX_CPUID_EXT_SSSE3 |
+ BX_CPUID_EXT_CMPXCHG16B |
+ BX_CPUID_EXT_xTPR |
+ BX_CPUID_EXT_PDCM |
+ BX_CPUID_EXT_SSE4_1;
+
+ // EDX: Standard Feature Flags
+ // * [0:0] FPU on chip
+ // * [1:1] VME: Virtual-8086 Mode enhancements
+ // * [2:2] DE: Debug Extensions (I/O breakpoints)
+ // * [3:3] PSE: Page Size Extensions
+ // * [4:4] TSC: Time Stamp Counter
+ // * [5:5] MSR: RDMSR and WRMSR support
+ // * [6:6] PAE: Physical Address Extensions
+ // * [7:7] MCE: Machine Check Exception
+ // * [8:8] CXS: CMPXCHG8B instruction
+ // * [9:9] APIC: APIC on Chip
+ // [10:10] Reserved
+ // * [11:11] SYSENTER/SYSEXIT support
+ // * [12:12] MTRR: Memory Type Range Reg
+ // * [13:13] PGE/PTE Global Bit
+ // * [14:14] MCA: Machine Check Architecture
+ // * [15:15] CMOV: Cond Mov/Cmp Instructions
+ // * [16:16] PAT: Page Attribute Table
+ // * [17:17] PSE-36: Physical Address Extensions
+ // [18:18] PSN: Processor Serial Number
+ // * [19:19] CLFLUSH: CLFLUSH Instruction support
+ // [20:20] Reserved
+ // * [21:21] DS: Debug Store
+ // * [22:22] ACPI: Thermal Monitor and Software Controlled Clock Facilities
+ // * [23:23] MMX Technology
+ // * [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
+ // * [25:25] SSE: SSE Extensions
+ // * [26:26] SSE2: SSE2 Extensions
+ // * [27:27] Self Snoop
+ // * [28:28] Hyper Threading Technology
+ // * [29:29] TM: Thermal Monitor
+ // [30:30] Reserved
+ // * [31:31] PBE: Pending Break Enable
+ leaf->edx = BX_CPUID_STD_X87 |
+ BX_CPUID_STD_VME |
+ BX_CPUID_STD_DEBUG_EXTENSIONS |
+ BX_CPUID_STD_PSE |
+ BX_CPUID_STD_TSC |
+ BX_CPUID_STD_MSR |
+ BX_CPUID_STD_PAE |
+ BX_CPUID_STD_MCE |
+ BX_CPUID_STD_CMPXCHG8B |
+ BX_CPUID_STD_SYSENTER_SYSEXIT |
+ BX_CPUID_STD_MTRR |
+ BX_CPUID_STD_GLOBAL_PAGES |
+ BX_CPUID_STD_MCA |
+ BX_CPUID_STD_CMOV |
+ BX_CPUID_STD_PAT |
+ BX_CPUID_STD_PSE36 |
+ BX_CPUID_STD_CLFLUSH |
+ BX_CPUID_STD_DEBUG_STORE |
+ BX_CPUID_STD_ACPI |
+ BX_CPUID_STD_MMX |
+ BX_CPUID_STD_FXSAVE_FXRSTOR |
+ BX_CPUID_STD_SSE |
+ BX_CPUID_STD_SSE2 |
+ BX_CPUID_STD_SELF_SNOOP |
+ BX_CPUID_STD_HT |
+ BX_CPUID_STD_THERMAL_MONITOR |
+ BX_CPUID_STD_PBE;
+#if BX_SUPPORT_APIC
+ // if MSR_APICBASE APIC Global Enable bit has been cleared,
+ // the CPUID feature flag for the APIC is set to 0.
+ if (cpu->msr.apicbase & 0x800)
+ leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
+#endif
+}
+
+// leaf 0x00000002 //
+void core2_extreme_x9770_t::get_std_cpuid_leaf_2(cpuid_function_t *leaf)
+{
+ // CPUID function 0x00000002 - Cache and TLB Descriptors
+ leaf->eax = 0x05B0B101;
+ leaf->ebx = 0x005657F0;
+ leaf->ecx = 0x00000000;
+ leaf->edx = 0x2CB4304E;
+}
+
+// leaf 0x00000003 //
+void core2_extreme_x9770_t::get_std_cpuid_leaf_3(cpuid_function_t *leaf)
+{
+ // CPUID function 0x00000003 - Processor Serial Number
+ leaf->eax = 0;
+ leaf->ebx = 0;
+ leaf->ecx = 0;
+ leaf->edx = 0;
+}
+
+// leaf 0x00000004 //
+void core2_extreme_x9770_t::get_std_cpuid_leaf_4(Bit32u subfunction, \
cpuid_function_t *leaf) +{
+ // CPUID function 0x00000004 - Deterministic Cache Parameters
+ switch(subfunction) {
+ case 0:
+ leaf->eax = 0x0C000121;
+ leaf->ebx = 0x01C0003F;
+ leaf->ecx = 0x0000003F;
+ leaf->edx = 0x00000001;
+ return;
+ case 1:
+ leaf->eax = 0x0C000122;
+ leaf->ebx = 0x01C0003F;
+ leaf->ecx = 0x0000003F;
+ leaf->edx = 0x00000001;
+ return;
+ case 2:
+ leaf->eax = 0x0C004143;
+ leaf->ebx = 0x05C0003F;
+ leaf->ecx = 0x00000FFF;
+ leaf->edx = 0x00000001;
+ return;
+ default:
+ leaf->eax = 0;
+ leaf->ebx = 0;
+ leaf->ecx = 0;
+ leaf->edx = 0;
+ }
+}
+
+// leaf 0x00000005 //
+void core2_extreme_x9770_t::get_std_cpuid_leaf_5(cpuid_function_t *leaf)
+{
+ // CPUID function 0x00000005 - MONITOR/MWAIT Leaf
+
+#if BX_SUPPORT_MONITOR_MWAIT
+ // EAX - Smallest monitor-line size in bytes
+ // EBX - Largest monitor-line size in bytes
+ // ECX -
+ // [31:2] - reserved
+ // [1:1] - exit MWAIT even with EFLAGS.IF = 0
+ // [0:0] - MONITOR/MWAIT extensions are supported
+ // EDX - Reserved
+ leaf->eax = CACHE_LINE_SIZE;
+ leaf->ebx = CACHE_LINE_SIZE;
+ leaf->ecx = 3;
+ leaf->edx = 0;
+#else
+ leaf->eax = 0;
+ leaf->ebx = 0;
+ leaf->ecx = 0;
+ leaf->edx = 0;
+#endif
+}
+
+// leaf 0x00000006 //
+void core2_extreme_x9770_t::get_std_cpuid_leaf_6(cpuid_function_t *leaf)
+{
+ // CPUID function 0x00000006 - Thermal and Power Management Leaf
+ leaf->eax = 0x00000001;
+ leaf->ebx = 0x00000002;
+ leaf->ecx = 0x00000001;
+ leaf->edx = 0x00000000;
+}
+
+// leaf 0x00000007 //
+void core2_extreme_x9770_t::get_std_cpuid_leaf_7(Bit32u subfunction, \
cpuid_function_t *leaf) +{
+ leaf->eax = 0; /* leaf 7 not supported */
+ leaf->ebx = 0;
+ leaf->ecx = 0;
+ leaf->edx = 0;
+}
+
+// leaf 0x00000008 //
+void core2_extreme_x9770_t::get_std_cpuid_leaf_8(cpuid_function_t *leaf)
+{
+ // CPUID function 0x00000008 - reserved
+ leaf->eax = 0;
+ leaf->ebx = 0;
+ leaf->ecx = 0;
+ leaf->edx = 0;
+}
+
+// leaf 0x00000009 //
+void core2_extreme_x9770_t::get_std_cpuid_leaf_9(cpuid_function_t *leaf)
+{
+ // CPUID function 0x00000009 - Direct Cache Access Information
+ leaf->eax = 0;
+ leaf->ebx = 0;
+ leaf->ecx = 0;
+ leaf->edx = 0;
+}
+
+// leaf 0x0000000A //
+void core2_extreme_x9770_t::get_std_cpuid_leaf_A(cpuid_function_t *leaf)
+{
+ // CPUID function 0x0000000A - Architectural Performance Monitoring Leaf
+ leaf->eax = 0x07280202;
+ leaf->ebx = 0x00000000;
+ leaf->ecx = 0x00000000;
+ leaf->edx = 0x00000503;
+
+ BX_INFO(("WARNING: Architectural Performance Monitoring is not implemented"));
+}
+
+// leaf 0x80000000 //
+void core2_extreme_x9770_t::get_ext_cpuid_leaf_0(cpuid_function_t *leaf)
+{
+ // EAX: highest extended function understood by CPUID
+ // EBX: reserved
+ // EDX: reserved
+ // ECX: reserved
+ leaf->eax = 0x80000008;
+ leaf->ebx = 0;
+ leaf->edx = 0; // Reserved for Intel
+ leaf->ecx = 0;
+}
+
+// leaf 0x80000001 //
+void core2_extreme_x9770_t::get_ext_cpuid_leaf_1(cpuid_function_t *leaf)
+{
+ // EAX: CPU Version Information (reserved for Intel)
+ leaf->eax = 0;
+
+ // EBX: Brand ID (reserved for Intel)
+ leaf->ebx = 0;
+
+ // ECX:
+ // * [0:0] LAHF/SAHF instructions support in 64-bit mode
+ // [1:1] CMP_Legacy: Core multi-processing legacy mode (AMD)
+ // [2:2] SVM: Secure Virtual Machine (AMD)
+ // [3:3] Extended APIC Space
+ // [4:4] AltMovCR8: LOCK MOV CR0 means MOV CR8
+ // [5:5] LZCNT: LZCNT instruction support
+ // [6:6] SSE4A: SSE4A Instructions support (deprecated?)
+ // [7:7] Misaligned SSE support
+ // [8:8] PREFETCHW: PREFETCHW instruction support
+ // [9:9] OSVW: OS visible workarounds (AMD)
+ // [11:10] reserved
+ // [12:12] SKINIT support
+ // [13:13] WDT: Watchdog timer support
+ // [31:14] reserved
+
+ leaf->ecx = BX_CPUID_EXT2_LAHF_SAHF;
+
+ // EDX:
+ // Many of the bits in EDX are the same as FN 0x00000001 [*] for AMD
+ // [10:0] Reserved for Intel
+ // * [11:11] SYSCALL/SYSRET support
+ // [19:12] Reserved for Intel
+ // * [20:20] No-Execute page protection
+ // [25:21] Reserved
+ // [26:26] 1G paging support
+ // [27:27] Support RDTSCP Instruction
+ // [28:28] Reserved
+ // * [29:29] Long Mode
+ // [30:30] AMD 3DNow! Extensions
+ // [31:31] AMD 3DNow! Instructions
+
+ leaf->edx = BX_CPUID_STD2_SYSCALL_SYSRET |
+ BX_CPUID_STD2_NX |
+ BX_CPUID_STD2_LONG_MODE;
+}
+
+// leaf 0x80000002 //
+// leaf 0x80000003 //
+// leaf 0x80000004 //
+void core2_extreme_x9770_t::get_ext_cpuid_brand_string_leaf(Bit32u function, \
cpuid_function_t *leaf) +{
+ // CPUID function 0x800000002-0x800000004 - Processor Name String Identifier
+ static const char* brand_string = "Intel(R) Core(TM)2 Extreme CPU X9770 @ \
3.20GHz"; +
+ switch(function) {
+ case 0x80000002:
+ memcpy(&(leaf->eax), brand_string , 4);
+ memcpy(&(leaf->ebx), brand_string + 4, 4);
+ memcpy(&(leaf->ecx), brand_string + 8, 4);
+ memcpy(&(leaf->edx), brand_string + 12, 4);
+ break;
+ case 0x80000003:
+ memcpy(&(leaf->eax), brand_string + 16, 4);
+ memcpy(&(leaf->ebx), brand_string + 20, 4);
+ memcpy(&(leaf->ecx), brand_string + 24, 4);
+ memcpy(&(leaf->edx), brand_string + 28, 4);
+ break;
+ case 0x80000004:
+ memcpy(&(leaf->eax), brand_string + 32, 4);
+ memcpy(&(leaf->ebx), brand_string + 36, 4);
+ memcpy(&(leaf->ecx), brand_string + 40, 4);
+ memcpy(&(leaf->edx), brand_string + 44, 4);
+ break;
+ default:
+ break;
+ }
+
+#ifdef BX_BIG_ENDIAN
+ leaf->eax = bx_bswap32(leaf->eax);
+ leaf->ebx = bx_bswap32(leaf->ebx);
+ leaf->ecx = bx_bswap32(leaf->ecx);
+ leaf->edx = bx_bswap32(leaf->edx);
+#endif
+}
+
+// leaf 0x80000005 //
+void core2_extreme_x9770_t::get_ext_cpuid_leaf_5(cpuid_function_t *leaf)
+{
+ // CPUID function 0x800000005 - L1 Cache and TLB Identifiers
+ leaf->eax = 0;
+ leaf->ebx = 0;
+ leaf->ecx = 0; // reserved for Intel
+ leaf->edx = 0;
+}
+
+// leaf 0x80000006 //
+void core2_extreme_x9770_t::get_ext_cpuid_leaf_6(cpuid_function_t *leaf)
+{
+ // CPUID function 0x800000006 - L2 Cache and TLB Identifiers
+ leaf->eax = 0x00000000;
+ leaf->ebx = 0x00000000;
+ leaf->ecx = 0x18008040;
+ leaf->edx = 0x00000000;
+}
+
+// leaf 0x80000007 //
+void core2_extreme_x9770_t::get_ext_cpuid_leaf_7(cpuid_function_t *leaf)
+{
+ // CPUID function 0x800000007 - Advanced Power Management
+ leaf->eax = 0;
+ leaf->ebx = 0;
+ leaf->ecx = 0;
+ leaf->edx = 0;
+}
+
+// leaf 0x80000008 //
+void core2_extreme_x9770_t::get_ext_cpuid_leaf_8(cpuid_function_t *leaf)
+{
+ // virtual & phys address size in low 2 bytes.
+ leaf->eax = BX_PHY_ADDRESS_WIDTH | (BX_LIN_ADDRESS_WIDTH << 8);
+ leaf->ebx = 0;
+ leaf->ecx = 0; // Reserved, undefined
+ leaf->edx = 0;
+}
+
+void core2_extreme_x9770_t::dump_cpuid(void)
+{
+ struct cpuid_function_t leaf;
+ unsigned n;
+
+ for (n=0; n<=0xa; n++) {
+ BX_CPU_THIS_PTR cpuid->get_cpuid_leaf(n, 0x00000000, &leaf);
+ BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, \
leaf.edx)); + }
+
+ for (n=0x80000000; n<=0x80000008; n++) {
+ BX_CPU_THIS_PTR cpuid->get_cpuid_leaf(n, 0x00000000, &leaf);
+ BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, \
leaf.edx)); + }
+}
+
+bx_cpuid_t *create_core2_extreme_x9770_cpuid(BX_CPU_C *cpu) { return new \
core2_extreme_x9770_t(cpu); } +
+#endif
Modified: trunk/bochs/cpu/cpudb/core2_extreme_x9770.h
===================================================================
--- trunk/bochs/cpu/cpudb/core2_extreme_x9770.h 2011-07-31 14:38:03 UTC (rev 10516)
+++ trunk/bochs/cpu/cpudb/core2_extreme_x9770.h 2011-07-31 14:56:45 UTC (rev 10517)
@@ -24,6 +24,8 @@
#ifndef BX_CORE2_X9770_CPUID_DEFINITIONS_H
#define BX_CORE2_X9770_CPUID_DEFINITIONS_H
+#if BX_SUPPORT_X86_64
+
#include "cpu/cpuid.h"
class core2_extreme_x9770_t : public bx_cpuid_t {
@@ -71,4 +73,6 @@
extern bx_cpuid_t *create_core2_extreme_x9770_cpuid(BX_CPU_C *cpu);
+#endif // BX_SUPPORT_X86_64
+
#endif
Modified: trunk/bochs/cpu/cpudb/core2_extreme_x9770.txt
===================================================================
--- trunk/bochs/cpu/cpudb/core2_extreme_x9770.txt 2011-07-31 14:38:03 UTC (rev 10516)
+++ trunk/bochs/cpu/cpudb/core2_extreme_x9770.txt 2011-07-31 14:56:45 UTC (rev 10517)
@@ -1,245 +1,245 @@
-CPU-Z TXT Report
--------------------------------------------------------------------------
-
-Binaries
--------------------------------------------------------------------------
-
-CPU-Z version 1.53
-
-Processors
--------------------------------------------------------------------------
-
-Number of processors 1
-Number of threads 4
-
-APICs
--------------------------------------------------------------------------
-
-Processor 0
- -- Core 0
- -- Thread 0 0
- -- Core 1
- -- Thread 0 1
- -- Core 3
- -- Thread 0 3
- -- Core 2
- -- Thread 0 2
-
-Processors Information
--------------------------------------------------------------------------
-
-Processor 1 ID = 0
- Number of cores 4 (max 4)
- Number of threads 4 (max 4)
- Name Intel Core 2 Extreme QX9770
- Codename Yorkfield
- Specification Intel(R) Core(TM)2 Extreme CPU X9770 @ 3.20GHz
- Package (platform ID) Socket 775 LGA (0x4)
- CPUID 6.7.6
- Extended CPUID 6.17
- Core Stepping C0
- Technology 45 nm
- Core Speed 2397.7 MHz
- Multiplier x FSB 6.0 x 399.6 MHz
- Rated Bus speed 1598.5 MHz
- Stock frequency 3200 MHz
- Instructions sets MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, EM64T, VT-x
- L1 Data cache 4 x 32 KBytes, 8-way set associative, 64-byte line size
- L1 Instruction cache 4 x 32 KBytes, 8-way set associative, 64-byte line size
- L2 cache 2 x 6144 KBytes, 24-way set associative, 64-byte line size
- FID/VID Control yes
- FID range 6.0x - 8.0x
- Max VID 1.288 V
-
-
-
-Thread dumps
--------------------------------------------------------------------------
-
-CPU Thread 0
- APIC ID 0
- Topology Processor ID 0, Core ID 0, Thread ID 0
- Type 01008002h
- Max CPUID level 0000000Ah
- Max CPUID ext. level 80000008h
- Cache descriptor Level 1, D, 32 KB, 1 thread(s)
- Cache descriptor Level 1, I, 32 KB, 1 thread(s)
- Cache descriptor Level 2, U, 6 MB, 2 thread(s)
-
- CPUID
- 0x00000000 0x0000000A 0x756E6547 0x6C65746E 0x49656E69
- 0x00000001 0x00010676 0x00040800 0x0008E3BD 0xBFEBFBFF
- 0x00000002 0x05B0B101 0x005657F0 0x00000000 0x2CB4304E
- 0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
- 0x00000004 0x0C000121 0x01C0003F 0x0000003F 0x00000001
- 0x00000004 0x0C000122 0x01C0003F 0x0000003F 0x00000001
- 0x00000004 0x0C004143 0x05C0003F 0x00000FFF 0x00000001
- 0x00000005 0x00000040 0x00000040 0x00000003 0x00000020
- 0x00000006 0x00000001 0x00000002 0x00000001 0x00000000
- 0x00000007 0x00000000 0x00000000 0x00000000 0x00000000
- 0x00000008 0x00000400 0x00000000 0x00000000 0x00000000
- 0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
- 0x0000000A 0x07280202 0x00000000 0x00000000 0x00000503
- 0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
- 0x80000001 0x00000000 0x00000000 0x00000001 0x20100000
- 0x80000002 0x65746E49 0x2952286C 0x726F4320 0x4D542865
- 0x80000003 0x45203229 0x65727478 0x4320656D 0x58205550
- 0x80000004 0x30373739 0x20402020 0x30322E33 0x007A4847
- 0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000006 0x00000000 0x00000000 0x18008040 0x00000000
- 0x80000007 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
-
- MSR 0x0000001B 0x00000000 0xFEE00900
- MSR 0x00000017 0x0C100000 0x88C40825
- MSR 0x000000CD 0x00000000 0x00000806
- MSR 0x0000003F 0x00000000 0x00000000
- MSR 0x000000CE 0x001A0825 0x7F7F0716
- MSR 0x000001A0 0x00000040 0x62872489
- MSR 0x000000EE 0x00000000 0x877D4B00
- MSR 0x0000011E 0x00000000 0xBE702111
- MSR 0x00000194 0x00000000 0x00010825
- MSR 0x0000019C 0x00000000 0x882E0000
- MSR 0x00000198 0x061A0825 0x86000825
- MSR 0x00000199 0x00000000 0x00000825
-
-CPU Thread 1
- APIC ID 1
- Topology Processor ID 0, Core ID 1, Thread ID 0
- Type 01008002h
- Max CPUID level 0000000Ah
- Max CPUID ext. level 80000008h
- Cache descriptor Level 1, D, 32 KB, 1 thread(s)
- Cache descriptor Level 1, I, 32 KB, 1 thread(s)
- Cache descriptor Level 2, U, 6 MB, 2 thread(s)
-
- CPUID
- 0x00000000 0x0000000A 0x756E6547 0x6C65746E 0x49656E69
- 0x00000001 0x00010676 0x01040800 0x0008E3BD 0xBFEBFBFF
- 0x00000002 0x05B0B101 0x005657F0 0x00000000 0x2CB4304E
- 0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
- 0x00000004 0x0C000121 0x01C0003F 0x0000003F 0x00000001
- 0x00000004 0x0C000122 0x01C0003F 0x0000003F 0x00000001
- 0x00000004 0x0C004143 0x05C0003F 0x00000FFF 0x00000001
- 0x00000005 0x00000040 0x00000040 0x00000003 0x00000020
- 0x00000006 0x00000001 0x00000002 0x00000001 0x00000000
- 0x00000007 0x00000000 0x00000000 0x00000000 0x00000000
- 0x00000008 0x00000400 0x00000000 0x00000000 0x00000000
- 0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
- 0x0000000A 0x07280202 0x00000000 0x00000000 0x00000503
- 0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
- 0x80000001 0x00000000 0x00000000 0x00000001 0x20100000
- 0x80000002 0x65746E49 0x2952286C 0x726F4320 0x4D542865
- 0x80000003 0x45203229 0x65727478 0x4320656D 0x58205550
- 0x80000004 0x30373739 0x20402020 0x30322E33 0x007A4847
- 0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000006 0x00000000 0x00000000 0x18008040 0x00000000
- 0x80000007 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
-
- MSR 0x0000001B 0x00000000 0xFEE00800
- MSR 0x00000017 0x0C100000 0x88C40825
- MSR 0x000000CD 0x00000000 0x00000806
- MSR 0x0000003F 0x00000000 0x00000000
- MSR 0x000000CE 0x001A0825 0x7F7F0716
- MSR 0x000001A0 0x00000040 0x62872489
- MSR 0x000000EE 0x00000000 0x877D4B00
- MSR 0x0000011E 0x00000000 0xBE702111
- MSR 0x00000194 0x00000000 0x00010825
- MSR 0x0000019C 0x00000000 0x882E0000
- MSR 0x00000198 0x061A0825 0x8600061A
- MSR 0x00000199 0x00000000 0x0000061A
-
-CPU Thread 2
- APIC ID 3
- Topology Processor ID 0, Core ID 3, Thread ID 0
- Type 01008002h
- Max CPUID level 0000000Ah
- Max CPUID ext. level 80000008h
- Cache descriptor Level 1, D, 32 KB, 1 thread(s)
- Cache descriptor Level 1, I, 32 KB, 1 thread(s)
- Cache descriptor Level 2, U, 6 MB, 2 thread(s)
-
- CPUID
- 0x00000000 0x0000000A 0x756E6547 0x6C65746E 0x49656E69
- 0x00000001 0x00010676 0x03040800 0x0008E3BD 0xBFEBFBFF
- 0x00000002 0x05B0B101 0x005657F0 0x00000000 0x2CB4304E
- 0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
- 0x00000004 0x0C000121 0x01C0003F 0x0000003F 0x00000001
- 0x00000004 0x0C000122 0x01C0003F 0x0000003F 0x00000001
- 0x00000004 0x0C004143 0x05C0003F 0x00000FFF 0x00000001
- 0x00000005 0x00000040 0x00000040 0x00000003 0x00000020
- 0x00000006 0x00000001 0x00000002 0x00000001 0x00000000
- 0x00000007 0x00000000 0x00000000 0x00000000 0x00000000
- 0x00000008 0x00000400 0x00000000 0x00000000 0x00000000
- 0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
- 0x0000000A 0x07280202 0x00000000 0x00000000 0x00000503
- 0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
- 0x80000001 0x00000000 0x00000000 0x00000001 0x20100000
- 0x80000002 0x65746E49 0x2952286C 0x726F4320 0x4D542865
- 0x80000003 0x45203229 0x65727478 0x4320656D 0x58205550
- 0x80000004 0x30373739 0x20402020 0x30322E33 0x007A4847
- 0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000006 0x00000000 0x00000000 0x18008040 0x00000000
- 0x80000007 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
-
- MSR 0x0000001B 0x00000000 0xFEE00800
- MSR 0x00000017 0x0C100000 0x88C40825
- MSR 0x000000CD 0x00000000 0x00000806
- MSR 0x0000003F 0x00000000 0x00000000
- MSR 0x000000CE 0x001A0825 0x7F7F0716
- MSR 0x000001A0 0x00000040 0x62852489
- MSR 0x000000EE 0x00000000 0x877D4B00
- MSR 0x0000011E 0x00000000 0xBE702111
- MSR 0x00000194 0x00000000 0x00010825
- MSR 0x0000019C 0x00000000 0x88500000
- MSR 0x00000198 0x061A0825 0x86000825
- MSR 0x00000199 0x00000000 0x00000825
-
-CPU Thread 3
- APIC ID 2
- Topology Processor ID 0, Core ID 2, Thread ID 0
- Type 01008002h
- Max CPUID level 0000000Ah
- Max CPUID ext. level 80000008h
- Cache descriptor Level 1, D, 32 KB, 1 thread(s)
- Cache descriptor Level 1, I, 32 KB, 1 thread(s)
- Cache descriptor Level 2, U, 6 MB, 2 thread(s)
-
- CPUID
- 0x00000000 0x0000000A 0x756E6547 0x6C65746E 0x49656E69
- 0x00000001 0x00010676 0x02040800 0x0008E3BD 0xBFEBFBFF
- 0x00000002 0x05B0B101 0x005657F0 0x00000000 0x2CB4304E
- 0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
- 0x00000004 0x0C000121 0x01C0003F 0x0000003F 0x00000001
- 0x00000004 0x0C000122 0x01C0003F 0x0000003F 0x00000001
- 0x00000004 0x0C004143 0x05C0003F 0x00000FFF 0x00000001
- 0x00000005 0x00000040 0x00000040 0x00000003 0x00000020
- 0x00000006 0x00000001 0x00000002 0x00000001 0x00000000
- 0x00000007 0x00000000 0x00000000 0x00000000 0x00000000
- 0x00000008 0x00000400 0x00000000 0x00000000 0x00000000
- 0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
- 0x0000000A 0x07280202 0x00000000 0x00000000 0x00000503
- 0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
- 0x80000001 0x00000000 0x00000000 0x00000001 0x20100000
- 0x80000002 0x65746E49 0x2952286C 0x726F4320 0x4D542865
- 0x80000003 0x45203229 0x65727478 0x4320656D 0x58205550
- 0x80000004 0x30373739 0x20402020 0x30322E33 0x007A4847
- 0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000006 0x00000000 0x00000000 0x18008040 0x00000000
- 0x80000007 0x00000000 0x00000000 0x00000000 0x00000000
- 0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
-
- MSR 0x0000001B 0x00000000 0xFEE00800
- MSR 0x00000017 0x0C100000 0x88C40825
- MSR 0x000000CD 0x00000000 0x00000806
- MSR 0x0000003F 0x00000000 0x00000000
- MSR 0x000000CE 0x001A0825 0x7F7F0716
- MSR 0x000001A0 0x00000040 0x62852489
- MSR 0x000000EE 0x00000000 0x877D4B00
- MSR 0x0000011E 0x00000000 0xBE702111
- MSR 0x00000194 0x00000000 0x00010825
- MSR 0x0000019C 0x00000000 0x88500000
- MSR 0x00000198 0x061A0825 0x86000825
- MSR 0x00000199 0x00000000 0x00000825
+CPU-Z TXT Report
+-------------------------------------------------------------------------
+
+Binaries
+-------------------------------------------------------------------------
+
+CPU-Z version 1.53
+
+Processors
+-------------------------------------------------------------------------
+
+Number of processors 1
+Number of threads 4
+
+APICs
+-------------------------------------------------------------------------
+
+Processor 0
+ -- Core 0
+ -- Thread 0 0
+ -- Core 1
+ -- Thread 0 1
+ -- Core 3
+ -- Thread 0 3
+ -- Core 2
+ -- Thread 0 2
+
+Processors Information
+-------------------------------------------------------------------------
+
+Processor 1 ID = 0
+ Number of cores 4 (max 4)
+ Number of threads 4 (max 4)
+ Name Intel Core 2 Extreme QX9770
+ Codename Yorkfield
+ Specification Intel(R) Core(TM)2 Extreme CPU X9770 @ 3.20GHz
+ Package (platform ID) Socket 775 LGA (0x4)
+ CPUID 6.7.6
+ Extended CPUID 6.17
+ Core Stepping C0
+ Technology 45 nm
+ Core Speed 2397.7 MHz
+ Multiplier x FSB 6.0 x 399.6 MHz
+ Rated Bus speed 1598.5 MHz
+ Stock frequency 3200 MHz
+ Instructions sets MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, EM64T, VT-x
+ L1 Data cache 4 x 32 KBytes, 8-way set associative, 64-byte line size
+ L1 Instruction cache 4 x 32 KBytes, 8-way set associative, 64-byte line size
+ L2 cache 2 x 6144 KBytes, 24-way set associative, 64-byte line size
+ FID/VID Control yes
+ FID range 6.0x - 8.0x
+ Max VID 1.288 V
+
+
+
+Thread dumps
+-------------------------------------------------------------------------
+
+CPU Thread 0
+ APIC ID 0
+ Topology Processor ID 0, Core ID 0, Thread ID 0
+ Type 01008002h
+ Max CPUID level 0000000Ah
+ Max CPUID ext. level 80000008h
+ Cache descriptor Level 1, D, 32 KB, 1 thread(s)
+ Cache descriptor Level 1, I, 32 KB, 1 thread(s)
+ Cache descriptor Level 2, U, 6 MB, 2 thread(s)
+
+ CPUID
+ 0x00000000 0x0000000A 0x756E6547 0x6C65746E 0x49656E69
+ 0x00000001 0x00010676 0x00040800 0x0008E3BD 0xBFEBFBFF
+ 0x00000002 0x05B0B101 0x005657F0 0x00000000 0x2CB4304E
+ 0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000004 0x0C000121 0x01C0003F 0x0000003F 0x00000001
+ 0x00000004 0x0C000122 0x01C0003F 0x0000003F 0x00000001
+ 0x00000004 0x0C004143 0x05C0003F 0x00000FFF 0x00000001
+ 0x00000005 0x00000040 0x00000040 0x00000003 0x00000020
+ 0x00000006 0x00000001 0x00000002 0x00000001 0x00000000
+ 0x00000007 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000008 0x00000400 0x00000000 0x00000000 0x00000000
+ 0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x0000000A 0x07280202 0x00000000 0x00000000 0x00000503
+ 0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
+ 0x80000001 0x00000000 0x00000000 0x00000001 0x20100000
+ 0x80000002 0x65746E49 0x2952286C 0x726F4320 0x4D542865
+ 0x80000003 0x45203229 0x65727478 0x4320656D 0x58205550
+ 0x80000004 0x30373739 0x20402020 0x30322E33 0x007A4847
+ 0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000006 0x00000000 0x00000000 0x18008040 0x00000000
+ 0x80000007 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
+
+ MSR 0x0000001B 0x00000000 0xFEE00900
+ MSR 0x00000017 0x0C100000 0x88C40825
+ MSR 0x000000CD 0x00000000 0x00000806
+ MSR 0x0000003F 0x00000000 0x00000000
+ MSR 0x000000CE 0x001A0825 0x7F7F0716
+ MSR 0x000001A0 0x00000040 0x62872489
+ MSR 0x000000EE 0x00000000 0x877D4B00
+ MSR 0x0000011E 0x00000000 0xBE702111
+ MSR 0x00000194 0x00000000 0x00010825
+ MSR 0x0000019C 0x00000000 0x882E0000
+ MSR 0x00000198 0x061A0825 0x86000825
+ MSR 0x00000199 0x00000000 0x00000825
+
+CPU Thread 1
+ APIC ID 1
+ Topology Processor ID 0, Core ID 1, Thread ID 0
+ Type 01008002h
+ Max CPUID level 0000000Ah
+ Max CPUID ext. level 80000008h
+ Cache descriptor Level 1, D, 32 KB, 1 thread(s)
+ Cache descriptor Level 1, I, 32 KB, 1 thread(s)
+ Cache descriptor Level 2, U, 6 MB, 2 thread(s)
+
+ CPUID
+ 0x00000000 0x0000000A 0x756E6547 0x6C65746E 0x49656E69
+ 0x00000001 0x00010676 0x01040800 0x0008E3BD 0xBFEBFBFF
+ 0x00000002 0x05B0B101 0x005657F0 0x00000000 0x2CB4304E
+ 0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000004 0x0C000121 0x01C0003F 0x0000003F 0x00000001
+ 0x00000004 0x0C000122 0x01C0003F 0x0000003F 0x00000001
+ 0x00000004 0x0C004143 0x05C0003F 0x00000FFF 0x00000001
+ 0x00000005 0x00000040 0x00000040 0x00000003 0x00000020
+ 0x00000006 0x00000001 0x00000002 0x00000001 0x00000000
+ 0x00000007 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000008 0x00000400 0x00000000 0x00000000 0x00000000
+ 0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x0000000A 0x07280202 0x00000000 0x00000000 0x00000503
+ 0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
+ 0x80000001 0x00000000 0x00000000 0x00000001 0x20100000
+ 0x80000002 0x65746E49 0x2952286C 0x726F4320 0x4D542865
+ 0x80000003 0x45203229 0x65727478 0x4320656D 0x58205550
+ 0x80000004 0x30373739 0x20402020 0x30322E33 0x007A4847
+ 0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000006 0x00000000 0x00000000 0x18008040 0x00000000
+ 0x80000007 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
+
+ MSR 0x0000001B 0x00000000 0xFEE00800
+ MSR 0x00000017 0x0C100000 0x88C40825
+ MSR 0x000000CD 0x00000000 0x00000806
+ MSR 0x0000003F 0x00000000 0x00000000
+ MSR 0x000000CE 0x001A0825 0x7F7F0716
+ MSR 0x000001A0 0x00000040 0x62872489
+ MSR 0x000000EE 0x00000000 0x877D4B00
+ MSR 0x0000011E 0x00000000 0xBE702111
+ MSR 0x00000194 0x00000000 0x00010825
+ MSR 0x0000019C 0x00000000 0x882E0000
+ MSR 0x00000198 0x061A0825 0x8600061A
+ MSR 0x00000199 0x00000000 0x0000061A
+
+CPU Thread 2
+ APIC ID 3
+ Topology Processor ID 0, Core ID 3, Thread ID 0
+ Type 01008002h
+ Max CPUID level 0000000Ah
+ Max CPUID ext. level 80000008h
+ Cache descriptor Level 1, D, 32 KB, 1 thread(s)
+ Cache descriptor Level 1, I, 32 KB, 1 thread(s)
+ Cache descriptor Level 2, U, 6 MB, 2 thread(s)
+
+ CPUID
+ 0x00000000 0x0000000A 0x756E6547 0x6C65746E 0x49656E69
+ 0x00000001 0x00010676 0x03040800 0x0008E3BD 0xBFEBFBFF
+ 0x00000002 0x05B0B101 0x005657F0 0x00000000 0x2CB4304E
+ 0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000004 0x0C000121 0x01C0003F 0x0000003F 0x00000001
+ 0x00000004 0x0C000122 0x01C0003F 0x0000003F 0x00000001
+ 0x00000004 0x0C004143 0x05C0003F 0x00000FFF 0x00000001
+ 0x00000005 0x00000040 0x00000040 0x00000003 0x00000020
+ 0x00000006 0x00000001 0x00000002 0x00000001 0x00000000
+ 0x00000007 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000008 0x00000400 0x00000000 0x00000000 0x00000000
+ 0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x0000000A 0x07280202 0x00000000 0x00000000 0x00000503
+ 0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
+ 0x80000001 0x00000000 0x00000000 0x00000001 0x20100000
+ 0x80000002 0x65746E49 0x2952286C 0x726F4320 0x4D542865
+ 0x80000003 0x45203229 0x65727478 0x4320656D 0x58205550
+ 0x80000004 0x30373739 0x20402020 0x30322E33 0x007A4847
+ 0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000006 0x00000000 0x00000000 0x18008040 0x00000000
+ 0x80000007 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
+
+ MSR 0x0000001B 0x00000000 0xFEE00800
+ MSR 0x00000017 0x0C100000 0x88C40825
+ MSR 0x000000CD 0x00000000 0x00000806
+ MSR 0x0000003F 0x00000000 0x00000000
+ MSR 0x000000CE 0x001A0825 0x7F7F0716
+ MSR 0x000001A0 0x00000040 0x62852489
+ MSR 0x000000EE 0x00000000 0x877D4B00
+ MSR 0x0000011E 0x00000000 0xBE702111
+ MSR 0x00000194 0x00000000 0x00010825
+ MSR 0x0000019C 0x00000000 0x88500000
+ MSR 0x00000198 0x061A0825 0x86000825
+ MSR 0x00000199 0x00000000 0x00000825
+
+CPU Thread 3
+ APIC ID 2
+ Topology Processor ID 0, Core ID 2, Thread ID 0
+ Type 01008002h
+ Max CPUID level 0000000Ah
+ Max CPUID ext. level 80000008h
+ Cache descriptor Level 1, D, 32 KB, 1 thread(s)
+ Cache descriptor Level 1, I, 32 KB, 1 thread(s)
+ Cache descriptor Level 2, U, 6 MB, 2 thread(s)
+
+ CPUID
+ 0x00000000 0x0000000A 0x756E6547 0x6C65746E 0x49656E69
+ 0x00000001 0x00010676 0x02040800 0x0008E3BD 0xBFEBFBFF
+ 0x00000002 0x05B0B101 0x005657F0 0x00000000 0x2CB4304E
+ 0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000004 0x0C000121 0x01C0003F 0x0000003F 0x00000001
+ 0x00000004 0x0C000122 0x01C0003F 0x0000003F 0x00000001
+ 0x00000004 0x0C004143 0x05C0003F 0x00000FFF 0x00000001
+ 0x00000005 0x00000040 0x00000040 0x00000003 0x00000020
+ 0x00000006 0x00000001 0x00000002 0x00000001 0x00000000
+ 0x00000007 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000008 0x00000400 0x00000000 0x00000000 0x00000000
+ 0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x0000000A 0x07280202 0x00000000 0x00000000 0x00000503
+ 0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
+ 0x80000001 0x00000000 0x00000000 0x00000001 0x20100000
+ 0x80000002 0x65746E49 0x2952286C 0x726F4320 0x4D542865
+ 0x80000003 0x45203229 0x65727478 0x4320656D 0x58205550
+ 0x80000004 0x30373739 0x20402020 0x30322E33 0x007A4847
+ 0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000006 0x00000000 0x00000000 0x18008040 0x00000000
+ 0x80000007 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
+
+ MSR 0x0000001B 0x00000000 0xFEE00800
+ MSR 0x00000017 0x0C100000 0x88C40825
+ MSR 0x000000CD 0x00000000 0x00000806
+ MSR 0x0000003F 0x00000000 0x00000000
+ MSR 0x000000CE 0x001A0825 0x7F7F0716
+ MSR 0x000001A0 0x00000040 0x62852489
+ MSR 0x000000EE 0x00000000 0x877D4B00
+ MSR 0x0000011E 0x00000000 0xBE702111
+ MSR 0x00000194 0x00000000 0x00010825
+ MSR 0x0000019C 0x00000000 0x88500000
+ MSR 0x00000198 0x061A0825 0x86000825
+ MSR 0x00000199 0x00000000 0x00000825
Modified: trunk/bochs/cpu/cpudb/corei7_sandy_bridge_2600K.cc
===================================================================
--- trunk/bochs/cpu/cpudb/corei7_sandy_bridge_2600K.cc 2011-07-31 14:38:03 UTC (rev \
10516)
+++ trunk/bochs/cpu/cpudb/corei7_sandy_bridge_2600K.cc 2011-07-31 14:56:45 UTC (rev \
10517) @@ -1,774 +1,774 @@
-/////////////////////////////////////////////////////////////////////////
-// $Id$
-/////////////////////////////////////////////////////////////////////////
-//
-// Copyright (c) 2011 Stanislav Shwartsman
-// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
-//
-// This library is free software; you can redistribute it and/or
-// modify it under the terms of the GNU Lesser General Public
-// License as published by the Free Software Foundation; either
-// version 2 of the License, or (at your option) any later version.
-//
-// This library is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-// Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public
-// License along with this library; if not, write to the Free Software
-// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
-//
-/////////////////////////////////////////////////////////////////////////
-
-#include "bochs.h"
-#include "cpu/cpu.h"
-#include "param_names.h"
-#include "corei7_sandy_bridge_2600K.h"
-
-#define LOG_THIS cpu->
-
-#if BX_SUPPORT_X86_64 && BX_SUPPORT_AVX
-
-corei7_sandy_bridge_2600k_t::corei7_sandy_bridge_2600k_t(BX_CPU_C *cpu): \
bx_cpuid_t(cpu)
-{
-#if BX_SUPPORT_SMP
- nthreads = SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
- ncores = SIM->get_param_num(BXPN_CPU_NCORES)->get();
- nprocessors = SIM->get_param_num(BXPN_CPU_NPROCESSORS)->get();
-#endif
-
- if (! BX_SUPPORT_X86_64)
- BX_PANIC(("You must enable x86-64 for Intel Core2 Sandy Bridge configuration"));
-
- if (! BX_SUPPORT_AVX)
- BX_PANIC(("You must enable AVX for Intel Core2 Sandy Bridge configuration"));
-
- BX_INFO(("WARNING: TSC deadline is not implemented yet"));
-}
-
-void corei7_sandy_bridge_2600k_t::get_cpuid_leaf(Bit32u function, Bit32u \
subfunction, cpuid_function_t *leaf)
-{
- static bx_bool cpuid_limit_winnt = \
SIM->get_param_bool(BXPN_CPUID_LIMIT_WINNT)->get();
- if (function > 3 && cpuid_limit_winnt)
- function = 3;
-
- switch(function) {
- case 0x80000000:
- get_ext_cpuid_leaf_0(leaf);
- return;
- case 0x80000001:
- get_ext_cpuid_leaf_1(leaf);
- return;
- case 0x80000002:
- case 0x80000003:
- case 0x80000004:
- get_ext_cpuid_brand_string_leaf(function, leaf);
- return;
- case 0x80000005:
- get_ext_cpuid_leaf_5(leaf);
- return;
- case 0x80000006:
- get_ext_cpuid_leaf_6(leaf);
- return;
- case 0x80000007:
- get_ext_cpuid_leaf_7(leaf);
- return;
- case 0x80000008:
- get_ext_cpuid_leaf_8(leaf);
- return;
- case 0x00000000:
- get_std_cpuid_leaf_0(leaf);
- return;
- case 0x00000001:
- get_std_cpuid_leaf_1(leaf);
- return;
- case 0x00000002:
- get_std_cpuid_leaf_2(leaf);
- return;
- case 0x00000003:
- get_std_cpuid_leaf_3(leaf);
- return;
- case 0x00000004:
- get_std_cpuid_leaf_4(subfunction, leaf);
- return;
- case 0x00000005:
- get_std_cpuid_leaf_5(leaf);
- return;
- case 0x00000006:
- get_std_cpuid_leaf_6(leaf);
- return;
- case 0x00000007:
- get_std_cpuid_leaf_7(subfunction, leaf);
- return;
- case 0x00000008:
- get_std_cpuid_leaf_8(leaf);
- return;
- case 0x00000009:
- get_std_cpuid_leaf_9(leaf);
- return;
- case 0x0000000A:
- get_std_cpuid_leaf_A(leaf);
- return;
- case 0x0000000B:
- get_std_cpuid_extended_topology_leaf(subfunction, leaf);
- return;
- case 0x0000000C:
- get_std_cpuid_leaf_C(leaf);
- return;
- case 0x0000000D:
- default:
- get_std_cpuid_xsave_leaf(subfunction, leaf);
- return;
- }
-}
-
-Bit32u corei7_sandy_bridge_2600k_t::get_isa_extensions_bitmask(void) const
-{
- return BX_CPU_X87 |
- BX_CPU_486 |
- BX_CPU_PENTIUM |
- BX_CPU_P6 |
- BX_CPU_MMX |
- BX_CPU_FXSAVE_FXRSTOR |
- BX_CPU_SYSENTER_SYSEXIT |
- BX_CPU_CLFLUSH |
- BX_CPU_SSE |
- BX_CPU_SSE2 |
- BX_CPU_SSE3 |
- BX_CPU_SSSE3 |
- BX_CPU_SSE4_1 |
- BX_CPU_SSE4_2 |
-#if BX_SUPPORT_MONITOR_MWAIT
- BX_CPU_MONITOR_MWAIT |
-#endif
-#if BX_SUPPORT_VMX
- BX_CPU_VMX |
-#endif
- /* BX_CPU_SMX | */
- BX_CPU_RDTSCP |
- BX_CPU_XSAVE |
- BX_CPU_XSAVEOPT |
- BX_CPU_AES_PCLMULQDQ |
- BX_CPU_AVX |
- BX_CPU_X86_64;
-}
-
-Bit32u corei7_sandy_bridge_2600k_t::get_cpu_extensions_bitmask(void) const
-{
- return BX_CPU_DEBUG_EXTENSIONS |
- BX_CPU_VME |
- BX_CPU_PSE |
- BX_CPU_PAE |
- BX_CPU_PGE |
- BX_CPU_PSE36 |
- BX_CPU_PAT_MTRR |
- BX_CPU_XAPIC |
- BX_CPU_X2APIC |
- BX_CPU_PCID;
-}
-
-// leaf 0x00000000 //
-void corei7_sandy_bridge_2600k_t::get_std_cpuid_leaf_0(cpuid_function_t *leaf)
-{
- static const char* vendor_string = "GenuineIntel";
-
- // EAX: highest std function understood by CPUID
- // EBX: vendor ID string
- // EDX: vendor ID string
- // ECX: vendor ID string
- leaf->eax = 0xd;
-
- // CPUID vendor string (e.g. GenuineIntel, AuthenticAMD, CentaurHauls, ...)
- memcpy(&(leaf->ebx), vendor_string, 4);
- memcpy(&(leaf->edx), vendor_string + 4, 4);
- memcpy(&(leaf->ecx), vendor_string + 8, 4);
-#ifdef BX_BIG_ENDIAN
- leaf->ebx = bx_bswap32(leaf->ebx);
- leaf->ecx = bx_bswap32(leaf->ecx);
- leaf->edx = bx_bswap32(leaf->edx);
-#endif
-}
-
-// leaf 0x00000001 //
-void corei7_sandy_bridge_2600k_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf)
-{
- // EAX: CPU Version Information
- // [3:0] Stepping ID
- // [7:4] Model: starts at 1
- // [11:8] Family: 4=486, 5=Pentium, 6=PPro, ...
- // [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved
- // [19:16] Extended Model
- // [27:20] Extended Family
- leaf->eax = 0x000206a7;
-
- // EBX:
- // [7:0] Brand ID
- // [15:8] CLFLUSH cache line size (value*8 = cache line size in bytes)
- // [23:16] Number of logical processors in one physical processor
- // [31:24] Local Apic ID
-
-#if BX_SUPPORT_SMP
- unsigned n_logical_processors = ncores*nthreads;
-#else
- unsigned n_logical_processors = 1;
-#endif
- leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
- (n_logical_processors << 16);
-#if BX_SUPPORT_APIC
- leaf->ebx |= ((cpu->get_apic_id() & 0xff) << 24);
-#endif
-
- // ECX: Extended Feature Flags
- // * [0:0] SSE3: SSE3 Instructions
- // * [1:1] PCLMULQDQ Instruction support
- // * [2:2] DTES64: 64-bit DS area
- // * [3:3] MONITOR/MWAIT support
- // * [4:4] DS-CPL: CPL qualified debug store
- // * [5:5] VMX: Virtual Machine Technology
- // [6:6] SMX: Secure Virtual Machine Technology
- // * [7:7] EST: Enhanced Intel SpeedStep Technology
- // * [8:8] TM2: Thermal Monitor 2
- // * [9:9] SSSE3: SSSE3 Instructions
- // [10:10] CNXT-ID: L1 context ID
- // [11:11] reserved
- // [12:12] FMA Instructions support
- // * [13:13] CMPXCHG16B: CMPXCHG16B instruction support
- // * [14:14] xTPR update control
- // * [15:15] PDCM - Perfon and Debug Capability MSR
- // [16:16] reserved
- // * [17:17] PCID: Process Context Identifiers
- // [18:18] DCA - Direct Cache Access
- // * [19:19] SSE4.1 Instructions
- // * [20:20] SSE4.2 Instructions
@@ Diff output truncated at 100000 characters. @@
This was sent by the SourceForge.net collaborative development platform, the world's \
largest Open Source development site.
------------------------------------------------------------------------------
Got Input? Slashdot Needs You.
Take our quick survey online. Come on, we don't ask for help often.
Plus, you'll get a chance to win $100 to spend on ThinkGeek.
http://p.sf.net/sfu/slashdot-survey
_______________________________________________
Bochs-cvs mailing list
Bochs-cvs@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/bochs-cvs
[prev in list] [next in list] [prev in thread] [next in thread]
Configure |
About |
News |
Add a list |
Sponsored by KoreLogic