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List: bochs-cvs
Subject: [Bochs-cvs] CVS: bochs/cpu cpu.h, 1.641, 1.642 cpuid.cc, 1.93,
From: "Stanislav Shwartsman" <sshwarts () users ! sourceforge ! net>
Date: 2010-02-26 22:53:45
Message-ID: E1Nl945-00026M-NL () sfp-cvsdas-2 ! v30 ! ch3 ! sourceforge ! com
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Update of /cvsroot/bochs/bochs/cpu
In directory sfp-cvsdas-2.v30.ch3.sourceforge.com:/tmp/cvs-serv7770/cpu
Modified Files:
cpu.h cpuid.cc crregs.h init.cc proc_ctrl.cc xsave.cc
Log Message:
Make XSAVE as runtime option
Index: cpu.h
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/cpu.h,v
retrieving revision 1.641
retrieving revision 1.642
diff -u -d -r1.641 -r1.642
--- cpu.h 26 Feb 2010 11:44:50 -0000 1.641
+++ cpu.h 26 Feb 2010 22:53:43 -0000 1.642
@@ -755,9 +755,6 @@
#if BX_SUPPORT_FPU
#include "cpu/i387.h"
-#endif
-
-#if BX_CPU_LEVEL >= 6
#include "cpu/xmm.h"
#endif
@@ -876,7 +873,7 @@
bx_efer_t efer;
#endif
-#if BX_SUPPORT_XSAVE
+#if BX_CPU_LEVEL >= 6
xcr0_t xcr0;
#endif
@@ -2875,18 +2872,18 @@
#if BX_SUPPORT_MISALIGNED_SSE
-#define readVirtualDQwordAligned(s, off, data) \
- if (! MXCSR.get_misaligned_exception_mask()) { \
- read_virtual_dqword_aligned(s, off, data); \
- } \
- else { \
- read_virtual_dqword(s, off, data); \
+#define readVirtualDQwordAligned(s, off, data) \
+ if (! BX_CPU_THIS_PTR mxcsr.get_misaligned_exception_mask()) { \
+ read_virtual_dqword_aligned(s, off, data); \
+ } \
+ else { \
+ read_virtual_dqword(s, off, data); \
}
#else // BX_SUPPORT_MISALIGNED_SSE = 0
-#define readVirtualDQwordAligned(s, off, data) { \
- read_virtual_dqword_aligned(s, off, data); \
+#define readVirtualDQwordAligned(s, off, data) { \
+ read_virtual_dqword_aligned(s, off, data); \
}
#endif
@@ -3341,7 +3338,7 @@
BX_SMF void print_state_SSE(void);
#endif
-#if BX_SUPPORT_XSAVE
+#if BX_CPU_LEVEL >= 6
BX_SMF void prepareXSAVE(void);
#endif
@@ -3442,7 +3439,7 @@
}
#endif
-#if BX_SUPPORT_XSAVE
+#if BX_CPU_LEVEL >= 6
BX_CPP_INLINE void BX_CPU_C::prepareXSAVE(void)
{
if(! BX_CPU_THIS_PTR cr4.get_OSXSAVE())
Index: cpuid.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/cpuid.cc,v
retrieving revision 1.93
retrieving revision 1.94
diff -u -d -r1.93 -r1.94
--- cpuid.cc 26 Feb 2010 14:18:18 -0000 1.93
+++ cpuid.cc 26 Feb 2010 22:53:43 -0000 1.94
@@ -241,7 +241,7 @@
#if BX_CPU_LEVEL >= 5
if (BX_CPU_THIS_PTR cpuid_features_bitmask & BX_CPU_PENTIUM) {
// Pentium only features
- features |= (1<<1);
+ features |= (1<<1); // support VME
features |= (1<<3); // support PSE
features |= (1<<4); // support Time Stamp Counter
features |= (1<<5); // support RDMSR/WRMSR
@@ -299,9 +299,7 @@
{
#if BX_CPU_LEVEL >= 4
Bit32u function = EAX;
-#if BX_SUPPORT_XSAVE
Bit32u subfunction = ECX;
-#endif
#if BX_SUPPORT_VMX
if (BX_CPU_THIS_PTR in_vmx_guest) {
@@ -324,14 +322,12 @@
RDX &= ~(1<<9); // APIC on chip
}
#endif
-#if BX_SUPPORT_XSAVE
if (function == 0xD && subfunction > 0) {
RAX = 0;
RBX = 0;
RCX = 0;
RDX = 0;
}
-#endif
return;
}
}
@@ -408,7 +404,7 @@
if (! cpuid_limit_winnt) {
if (BX_SUPPORT_MONITOR_MWAIT)
cpuid->eax = 0x5;
- if (BX_SUPPORT_XSAVE)
+ if (BX_CPU_SUPPORT_FEATURE(BX_CPU_XSAVE))
cpuid->eax = 0xD;
}
#endif
@@ -572,23 +568,24 @@
cpuid->edx = 0;
#endif
-#if BX_SUPPORT_XSAVE
// ------------------------------------------------------
// CPUID function 0x0000000D
- cpuid = &(BX_CPU_THIS_PTR cpuid_std_function[0xD]);
+ if (BX_CPU_SUPPORT_FEATURE(BX_CPU_XSAVE))
+ {
+ cpuid = &(BX_CPU_THIS_PTR cpuid_std_function[0xD]);
- // EAX - XCR0 lower 32 bits
- // EBX - Maximum size (in bytes) required by enabled features
- // ECX - Maximum size (in bytes) required by CPU supported features
- // EDX - XCR0 upper 32 bits
- cpuid->eax = BX_CPU_THIS_PTR xcr0.get32();
- cpuid->ebx = 512+64;
- cpuid->ecx = 512+64;
- cpuid->edx = 0;
-#endif
+ // EAX - XCR0 lower 32 bits
+ // EBX - Maximum size (in bytes) required by enabled features
+ // ECX - Maximum size (in bytes) required by CPU supported features
+ // EDX - XCR0 upper 32 bits
+ cpuid->eax = BX_CPU_THIS_PTR xcr0.get32();
+ cpuid->ebx = 512+64;
+ cpuid->ecx = 512+64;
+ cpuid->edx = 0;
+ }
// do not report Pentium 4 extended functions if not needed
- if ((BX_CPU_THIS_PTR cpuid_features_bitmask & BX_CPU_SSE2) == 0)
+ if (! BX_CPU_SUPPORT_FEATURE(BX_CPU_SSE2))
return;
// ------------------------------------------------------
@@ -769,6 +766,7 @@
bx_bool sep_enabled = SIM->get_param_bool(BXPN_CPUID_SEP)->get();
bx_bool aes_enabled = SIM->get_param_bool(BXPN_CPUID_AES)->get();
bx_bool movbe_enabled = SIM->get_param_bool(BXPN_CPUID_MOVBE)->get();
+ bx_bool xsave_enabled = SIM->get_param_bool(BXPN_CPUID_XSAVE)->get();
unsigned sse_enabled = SIM->get_param_enum(BXPN_CPUID_SSE)->get();
// sanity checks
@@ -802,7 +800,7 @@
}
}
else {
- if (BX_SUPPORT_XSAVE) {
+ if (xsave_enabled) {
BX_PANIC(("PANIC: XSAVE emulation requires SSE support !"));
return;
}
@@ -870,25 +868,21 @@
if (sep_enabled)
features_bitmask |= BX_CPU_SYSENTER_SYSEXIT;
-#endif
-#if BX_SUPPORT_VMX
- features_bitmask |= BX_CPU_VMX;
-#endif
-#if BX_SUPPORT_XSAVE
- features_bitmask |= BX_CPU_XSAVE;
-#endif
+ if (xsave_enabled)
+ features_bitmask |= BX_CPU_XSAVE;
-#if BX_CPU_LEVEL >= 6
- if (aes_enabled) {
- features_bitmask |= BX_CPU_AES;
- features_bitmask |= BX_CPU_PCLMULQDQ;
- }
+ if (aes_enabled)
+ features_bitmask |= BX_CPU_AES | BX_CPU_PCLMULQDQ;
if (movbe_enabled)
features_bitmask |= BX_CPU_MOVBE;
#endif
+#if BX_SUPPORT_VMX
+ features_bitmask |= BX_CPU_VMX;
+#endif
+
#if BX_SUPPORT_X86_64
features_bitmask |= BX_CPU_X86_64;
#endif
Index: crregs.h
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/crregs.h,v
retrieving revision 1.21
retrieving revision 1.22
diff -u -d -r1.21 -r1.22
--- crregs.h 25 Feb 2010 22:04:30 -0000 1.21
+++ crregs.h 26 Feb 2010 22:53:43 -0000 1.22
@@ -94,7 +94,7 @@
#if BX_SUPPORT_VMX
IMPLEMENT_CRREG_ACCESSORS(VMXE, 13);
#endif
-#if BX_SUPPORT_XSAVE
+#if BX_CPU_LEVEL >= 6
IMPLEMENT_CRREG_ACCESSORS(OSXSAVE, 18);
#endif
@@ -125,7 +125,7 @@
#endif
-#if BX_SUPPORT_XSAVE
+#if BX_CPU_LEVEL >= 6
struct xcr0_t {
Bit32u val32; // 32bit value of register
Index: init.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/init.cc,v
retrieving revision 1.227
retrieving revision 1.228
diff -u -d -r1.227 -r1.228
--- init.cc 26 Feb 2010 14:18:18 -0000 1.227
+++ init.cc 26 Feb 2010 22:53:43 -0000 1.228
@@ -362,8 +362,10 @@
#if BX_CPU_LEVEL >= 4
BXRS_HEX_PARAM_FIELD(cpu, CR4, cr4.val32);
#endif
-#if BX_SUPPORT_XSAVE
- BXRS_HEX_PARAM_FIELD(cpu, XCR0, xcr0.val32);
+#if BX_CPU_LEVEL >= 6
+ if (BX_CPU_SUPPORT_FEATURE(BX_CPU_XSAVE)) {
+ BXRS_HEX_PARAM_FIELD(cpu, XCR0, xcr0.val32);
+ }
#endif
for(n=0; n<6; n++) {
@@ -915,7 +917,7 @@
BX_CPU_THIS_PTR cr4.set32(0);
#endif
-#if BX_SUPPORT_XSAVE
+#if BX_CPU_LEVEL >= 6
BX_CPU_THIS_PTR xcr0.set32(0x1);
#endif
Index: proc_ctrl.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/proc_ctrl.cc,v
retrieving revision 1.313
retrieving revision 1.314
diff -u -d -r1.313 -r1.314
--- proc_ctrl.cc 26 Feb 2010 11:44:50 -0000 1.313
+++ proc_ctrl.cc 26 Feb 2010 22:53:43 -0000 1.314
@@ -1460,8 +1460,10 @@
allowMask |= (1<<14); /* SMX Enable */
#endif
-#if BX_SUPPORT_XSAVE
- allowMask |= (1<<18); /* OSXSAVE */
+#if BX_CPU_LEVEL >= 6
+ /* OSXSAVE */
+ if (BX_CPU_SUPPORT_FEATURE(BX_CPU_XSAVE))
+ allowMask |= (1<<18);
#endif
return allowMask;
Index: xsave.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/xsave.cc,v
retrieving revision 1.24
retrieving revision 1.25
diff -u -d -r1.24 -r1.25
--- xsave.cc 4 Dec 2009 21:27:17 -0000 1.24
+++ xsave.cc 26 Feb 2010 22:53:43 -0000 1.25
@@ -35,7 +35,7 @@
/* 0F AE /4 */
void BX_CPP_AttrRegparmN(1) BX_CPU_C::XSAVE(bxInstruction_c *i)
{
-#if BX_SUPPORT_XSAVE
+#if BX_CPU_LEVEL >= 6
unsigned index;
BxPackedXmmRegister xmm;
@@ -150,16 +150,13 @@
// always update header to 'dirty' state
write_virtual_qword(i->seg(), eaddr + 512, header1);
-#else
- BX_INFO(("XSAVE: required XSAVE support, use --enable-xsave option"));
- exception(BX_UD_EXCEPTION, 0, 0);
#endif
}
/* 0F AE /5 */
void BX_CPP_AttrRegparmN(1) BX_CPU_C::XRSTOR(bxInstruction_c *i)
{
-#if BX_SUPPORT_XSAVE
+#if BX_CPU_LEVEL >= 6
unsigned index;
BxPackedXmmRegister xmm;
@@ -301,16 +298,13 @@
}
}
}
-#else
- BX_INFO(("XRSTOR: required XSAVE support, use --enable-xsave option"));
- exception(BX_UD_EXCEPTION, 0, 0);
#endif
}
/* 0F 01 D0 */
void BX_CPP_AttrRegparmN(1) BX_CPU_C::XGETBV(bxInstruction_c *i)
{
-#if BX_SUPPORT_XSAVE
+#if BX_CPU_LEVEL >= 6
if(! BX_CPU_THIS_PTR cr4.get_OSXSAVE()) {
BX_ERROR(("XGETBV: OSXSAVE feature is not enabled in CR4!"));
exception(BX_UD_EXCEPTION, 0, 0);
@@ -325,16 +319,13 @@
RDX = 0;
RAX = BX_CPU_THIS_PTR xcr0.get32();
-#else
- BX_INFO(("XGETBV: required XSAVE support, use --enable-xsave option"));
- exception(BX_UD_EXCEPTION, 0, 0);
#endif
}
/* 0F 01 D1 */
void BX_CPP_AttrRegparmN(1) BX_CPU_C::XSETBV(bxInstruction_c *i)
{
-#if BX_SUPPORT_XSAVE
+#if BX_CPU_LEVEL >= 6
if(! BX_CPU_THIS_PTR cr4.get_OSXSAVE()) {
BX_ERROR(("XSETBV: OSXSAVE feature is not enabled in CR4!"));
exception(BX_UD_EXCEPTION, 0, 0);
@@ -358,8 +349,5 @@
}
BX_CPU_THIS_PTR xcr0.set32(EAX);
-#else
- BX_INFO(("XSETBV: required XSAVE support, use --enable-xsave option"));
- exception(BX_UD_EXCEPTION, 0, 0);
#endif
}
------------------------------------------------------------------------------
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