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List: bochs-cvs
Subject: [Bochs-cvs] CVS: bochs/fpu fpu.cc, 1.54, 1.55 fpu_arith.cc, 1.18,
From: "Stanislav Shwartsman" <sshwarts () users ! sourceforge ! net>
Date: 2009-04-27 14:00:57
Message-ID: E1LyROD-0001H7-Nr () ddv4jf1 ! ch3 ! sourceforge ! com
[Download RAW message or body]
Update of /cvsroot/bochs/bochs/fpu
In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv4724/fpu
Modified Files:
fpu.cc fpu_arith.cc fpu_compare.cc fpu_const.cc
fpu_load_store.cc fpu_misc.cc fpu_trans.cc
Log Message:
x87 fix
Index: fpu.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/fpu/fpu.cc,v
retrieving revision 1.54
retrieving revision 1.55
diff -u -d -r1.54 -r1.55
--- fpu.cc 12 Apr 2009 19:13:13 -0000 1.54
+++ fpu.cc 27 Apr 2009 14:00:55 -0000 1.55
@@ -29,31 +29,27 @@
#include "iodev/iodev.h"
-#define UPDATE_LAST_OPCODE 1
#define CHECK_PENDING_EXCEPTIONS 1
#if BX_SUPPORT_FPU
-void BX_CPU_C::prepareFPU(bxInstruction_c *i,
- bx_bool check_pending_exceptions, bx_bool update_last_instruction)
+void BX_CPU_C::prepareFPU(bxInstruction_c *i, bx_bool check_pending_exceptions)
{
if (BX_CPU_THIS_PTR cr0.get_EM() || BX_CPU_THIS_PTR cr0.get_TS())
exception(BX_NM_EXCEPTION, 0, 0);
if (check_pending_exceptions)
BX_CPU_THIS_PTR FPU_check_pending_exceptions();
+}
- if (update_last_instruction)
- {
- BX_CPU_THIS_PTR the_i387.foo = (((Bit32u)(i->b1()) << 8) | i->modrm()) & 0x7ff;
- BX_CPU_THIS_PTR the_i387.fcs = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
- BX_CPU_THIS_PTR the_i387.fip = BX_CPU_THIS_PTR prev_rip;
-
- if (! i->modC0()) {
- RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
+void BX_CPU_C::FPU_update_last_instruction(bxInstruction_c *i)
+{
+ BX_CPU_THIS_PTR the_i387.foo = (((Bit32u)(i->b1()) << 8) | i->modrm()) & 0x7ff;
+ BX_CPU_THIS_PTR the_i387.fcs = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
+ BX_CPU_THIS_PTR the_i387.fip = BX_CPU_THIS_PTR prev_rip;
- BX_CPU_THIS_PTR the_i387.fds = BX_CPU_THIS_PTR sregs[i->seg()].selector.value;
- BX_CPU_THIS_PTR the_i387.fdp = RMAddr(i);
- }
+ if (! i->modC0()) {
+ BX_CPU_THIS_PTR the_i387.fds = BX_CPU_THIS_PTR sregs[i->seg()].selector.value;
+ BX_CPU_THIS_PTR the_i387.fdp = RMAddr(i);
}
}
@@ -329,7 +325,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLDCW(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, CHECK_PENDING_EXCEPTIONS);
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
@@ -356,7 +352,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FNSTCW(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS);
Bit16u cwd = BX_CPU_THIS_PTR the_i387.get_control_word();
@@ -372,7 +368,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FNSTSW(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS);
Bit16u swd = BX_CPU_THIS_PTR the_i387.get_status_word();
@@ -388,7 +384,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FNSTSW_AX(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS);
AX = BX_CPU_THIS_PTR the_i387.get_status_word();
#else
BX_INFO(("FNSTSW_AX: required FPU, configure --enable-fpu"));
@@ -399,7 +395,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FRSTOR(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, CHECK_PENDING_EXCEPTIONS);
bx_address offset = fpu_load_environment(i);
floatx80 tmp;
@@ -423,7 +419,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FNSAVE(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS);
bx_address offset = fpu_save_environment(i);
@@ -445,7 +441,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FNCLEX(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS);
FPU_PARTIAL_STATUS &= ~(FPU_SW_Backward|FPU_SW_Summary|FPU_SW_Stack_Fault|FPU_SW_Precision|
FPU_SW_Underflow|FPU_SW_Overflow|FPU_SW_Zero_Div|FPU_SW_Denormal_Op|
@@ -461,7 +457,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FNINIT(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS);
BX_CPU_THIS_PTR the_i387.init();
#else
BX_INFO(("FNINIT: required FPU, configure --enable-fpu"));
@@ -472,7 +468,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLDENV(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, CHECK_PENDING_EXCEPTIONS);
fpu_load_environment(i);
/* read all registers in stack order and update x87 tag word */
@@ -492,7 +488,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FNSTENV(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS);
fpu_save_environment(i);
/* mask all floating point exceptions */
FPU_CONTROL_WORD |= FPU_CW_Exceptions_Mask;
@@ -507,7 +503,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FNOP(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, CHECK_PENDING_EXCEPTIONS);
// Perform no FPU operation. This instruction takes up space in the
// instruction stream but does not affect the FPU or machine
@@ -520,7 +516,7 @@
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FPLEGACY(bxInstruction_c *i)
{
#if BX_SUPPORT_FPU
- BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
+ BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS);
// FPU performs no specific operation and no internal x87 states
// are affected
Index: fpu_arith.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/fpu/fpu_arith.cc,v
retrieving revision 1.18
retrieving revision 1.19
diff -u -d -r1.18 -r1.19
--- fpu_arith.cc 23 Apr 2009 05:16:29 -0000 1.18
+++ fpu_arith.cc 27 Apr 2009 14:00:55 -0000 1.19
@@ -156,6 +156,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -184,6 +185,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->b1() & 2;
@@ -218,8 +220,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -246,8 +251,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -274,8 +282,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -303,8 +314,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -331,6 +345,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -359,6 +374,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->b1() & 2;
@@ -393,8 +409,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -421,8 +440,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -449,8 +471,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -478,8 +503,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -506,6 +534,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -534,6 +563,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -562,6 +592,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->b1() & 2;
@@ -595,6 +626,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->b1() & 2;
@@ -629,8 +661,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -657,8 +692,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -685,8 +723,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -713,8 +754,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -742,8 +786,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -771,8 +818,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -800,8 +850,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -830,8 +883,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -858,6 +914,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -886,6 +943,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -914,6 +972,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->b1() & 2;
@@ -947,6 +1006,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->b1() & 2;
@@ -981,8 +1041,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -1009,8 +1072,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -1037,8 +1103,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -1065,8 +1134,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -1093,8 +1165,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -1122,8 +1197,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -1151,8 +1229,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -1180,8 +1261,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0)) {
@@ -1208,6 +1292,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -1233,6 +1318,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
Index: fpu_compare.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/fpu/fpu_compare.cc,v
retrieving revision 1.22
retrieving revision 1.23
diff -u -d -r1.22 -r1.23
--- fpu_compare.cc 12 Apr 2009 22:07:59 -0000 1.22
+++ fpu_compare.cc 27 Apr 2009 14:00:55 -0000 1.23
@@ -81,6 +81,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->nnn() & 1;
// handle special case of FSTP opcode @ 0xDE 0xD0..D7
@@ -121,6 +122,7 @@
{
#if (BX_CPU_LEVEL >= 6) || (BX_CPU_LEVEL_HACKED >= 6)
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->b1() & 4;
@@ -159,6 +161,7 @@
{
#if (BX_CPU_LEVEL >= 6) || (BX_CPU_LEVEL_HACKED >= 6)
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->b1() & 4;
@@ -197,6 +200,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->nnn() & 1;
@@ -235,8 +239,11 @@
int pop_stack = i->nnn() & 1;
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0))
@@ -275,8 +282,11 @@
int pop_stack = i->nnn() & 1;
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0))
@@ -315,8 +325,11 @@
int pop_stack = i->nnn() & 1;
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0))
@@ -355,8 +368,11 @@
int pop_stack = i->nnn() & 1;
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (IS_TAG_EMPTY(0))
@@ -392,6 +408,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -428,6 +445,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(1))
{
@@ -461,6 +479,7 @@
{
#if (BX_CPU_LEVEL >= 6) || (BX_CPU_LEVEL_HACKED >= 6)
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
{
@@ -497,6 +516,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -524,6 +544,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
floatx80 reg = BX_READ_FPU_REG(0);
int sign = floatx80_sign(reg);
Index: fpu_const.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/fpu/fpu_const.cc,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -d -r1.16 -r1.17
--- fpu_const.cc 13 Apr 2009 08:37:49 -0000 1.16
+++ fpu_const.cc 27 Apr 2009 14:00:55 -0000 1.17
@@ -56,6 +56,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -76,6 +77,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -96,6 +98,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -116,6 +119,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -136,6 +140,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -156,6 +161,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -176,6 +182,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
Index: fpu_load_store.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/fpu/fpu_load_store.cc,v
retrieving revision 1.32
retrieving revision 1.33
diff -u -d -r1.32 -r1.33
--- fpu_load_store.cc 10 Mar 2009 21:43:11 -0000 1.32
+++ fpu_load_store.cc 27 Apr 2009 14:00:55 -0000 1.33
@@ -36,6 +36,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -70,8 +71,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (! IS_TAG_EMPTY(-1)) {
@@ -99,8 +103,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (! IS_TAG_EMPTY(-1)) {
@@ -129,9 +136,13 @@
BX_CPU_THIS_PTR prepareFPU(i);
floatx80 result;
+
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
result.fraction = read_virtual_qword(i->seg(), RMAddr(i));
result.exp = read_virtual_word (i->seg(), RMAddr(i)+8);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (! IS_TAG_EMPTY(-1)) {
@@ -152,8 +163,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (! IS_TAG_EMPTY(-1)) {
@@ -175,8 +189,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (! IS_TAG_EMPTY(-1)) {
@@ -198,8 +215,11 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64s load_reg = (Bit64s) read_virtual_qword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (! IS_TAG_EMPTY(-1)) {
@@ -221,10 +241,12 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
- // read packed bcd from memory
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16u hi2 = read_virtual_word (i->seg(), RMAddr(i) + 8);
Bit64u lo8 = read_virtual_qword(i->seg(), RMAddr(i));
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
if (! IS_TAG_EMPTY(-1))
@@ -262,6 +284,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int pop_stack = i->nnn() & 1;
// handle special case of FSTP opcode @ 0xDF 0xD0..D7
@@ -290,6 +313,10 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
+
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
float32 save_reg = float32_default_nan; /* The masked response */
@@ -328,6 +355,10 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
+
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
float64 save_reg = float64_default_nan; /* The masked response */
@@ -367,6 +398,10 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
+
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
clear_C1();
floatx80 save_reg = floatx80_default_nan; /* The masked response */
@@ -397,6 +432,10 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
+
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
Bit16s save_reg = int16_indefinite;
int pop_stack = i->nnn() & 1;
@@ -435,6 +474,10 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
+
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
Bit32s save_reg = int32_indefinite; /* The masked response */
int pop_stack = i->nnn() & 1;
@@ -473,6 +516,10 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
+
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
Bit64s save_reg = int64_indefinite; /* The masked response */
clear_C1();
@@ -507,6 +554,10 @@
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
+
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
/*
* The packed BCD integer indefinite encoding (FFFFC000000000000000H)
* is stored in response to a masked floating-point invalid-operation
@@ -579,6 +630,10 @@
#if BX_SUPPORT_SSE >= 3
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
+
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
Bit16s save_reg = int16_indefinite; /* The masked response */
clear_C1();
@@ -615,6 +670,10 @@
#if BX_SUPPORT_SSE >= 3
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
+
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
Bit32s save_reg = int32_indefinite; /* The masked response */
clear_C1();
@@ -651,6 +710,10 @@
#if BX_SUPPORT_SSE >= 3
BX_CPU_THIS_PTR prepareFPU(i);
+ RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
+
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
+
Bit64s save_reg = int64_indefinite; /* The masked response */
clear_C1();
Index: fpu_misc.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/fpu/fpu_misc.cc,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -d -r1.17 -r1.18
--- fpu_misc.cc 10 Mar 2009 21:43:11 -0000 1.17
+++ fpu_misc.cc 27 Apr 2009 14:00:55 -0000 1.18
@@ -35,6 +35,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
int st0_tag = BX_CPU_THIS_PTR the_i387.FPU_gettagi(0);
int sti_tag = BX_CPU_THIS_PTR the_i387.FPU_gettagi(i->rm());
@@ -72,6 +73,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0)) {
BX_CPU_THIS_PTR FPU_stack_underflow(0);
@@ -91,6 +93,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
if (IS_TAG_EMPTY(0)) {
BX_CPU_THIS_PTR FPU_stack_underflow(0);
@@ -110,6 +113,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -124,6 +128,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -138,6 +143,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
BX_CPU_THIS_PTR the_i387.FPU_settagi(FPU_Tag_Empty, i->rm());
#else
BX_INFO(("FFREE_STi: required FPU, configure --enable-fpu"));
@@ -154,6 +160,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
BX_CPU_THIS_PTR the_i387.FPU_settagi(FPU_Tag_Empty, i->rm());
BX_CPU_THIS_PTR the_i387.FPU_pop();
#else
Index: fpu_trans.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/fpu/fpu_trans.cc,v
retrieving revision 1.21
retrieving revision 1.22
diff -u -d -r1.21 -r1.22
--- fpu_trans.cc 10 Mar 2009 21:43:11 -0000 1.21
+++ fpu_trans.cc 27 Apr 2009 14:00:55 -0000 1.22
@@ -38,6 +38,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -63,6 +64,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -91,6 +93,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
clear_C2();
@@ -152,6 +155,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -180,6 +184,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -222,6 +227,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -262,6 +268,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -303,6 +310,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -331,6 +339,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
clear_C2();
@@ -379,6 +388,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
@@ -405,6 +415,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
clear_C2();
@@ -436,6 +447,7 @@
{
#if BX_SUPPORT_FPU
BX_CPU_THIS_PTR prepareFPU(i);
+ BX_CPU_THIS_PTR FPU_update_last_instruction(i);
clear_C1();
clear_C2();
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