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List: bochs-cvs
Subject: [Bochs-cvs] CVS: bochs/cpu access.cc, 1.86, 1.87 bit64.cc, 1.3,
From: Stanislav Shwartsman <sshwarts () users ! sourceforge ! net>
Date: 2007-12-26 23:07:48
Message-ID: E1J7fLo-0005lB-4t () sc8-pr-cvs3 ! sourceforge ! net
[Download RAW message or body]
Update of /cvsroot/bochs/bochs/cpu
In directory sc8-pr-cvs3.sourceforge.net:/tmp/cvs-serv21750
Modified Files:
access.cc bit64.cc cpu.h debugstuff.cc io.cc iret.cc mmx.cc
mult32.cc mult64.cc paging.cc smm.cc sse_move.cc stack16.cc
string.cc
Log Message:
Fixed more VCPP2008 warnings
Index: access.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/access.cc,v
retrieving revision 1.86
retrieving revision 1.87
diff -u -d -r1.86 -r1.87
--- access.cc 21 Dec 2007 10:33:39 -0000 1.86
+++ access.cc 26 Dec 2007 23:07:44 -0000 1.87
@@ -337,7 +337,7 @@
Bit8u* BX_CPP_AttrRegparmN(2)
BX_CPU_C::v2h_read_byte(bx_address laddr, unsigned curr_pl)
{
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -345,7 +345,7 @@
// from this CPL.
if (tlbEntry->accessBits & (1<<curr_pl)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
return hostAddr;
}
@@ -357,7 +357,7 @@
Bit8u* BX_CPP_AttrRegparmN(2)
BX_CPU_C::v2h_write_byte(bx_address laddr, unsigned curr_pl)
{
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf)
@@ -366,7 +366,7 @@
// from this CPL.
if (tlbEntry->accessBits & (0x10 << curr_pl)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
@@ -382,7 +382,7 @@
BX_CPU_C::v2h_read(bx_address laddr, unsigned curr_pl, unsigned len)
{
// Make sure access does not span 2 pages.
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, len);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, len);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -390,7 +390,7 @@
// from this CPL.
if (tlbEntry->accessBits & (1<<curr_pl)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
return hostAddr;
}
@@ -403,7 +403,7 @@
BX_CPU_C::v2h_write(bx_address laddr, unsigned curr_pl, unsigned len)
{
// Make sure access does not span 2 pages.
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, len);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, len);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf)
@@ -412,7 +412,7 @@
// from this CPL.
if (tlbEntry->accessBits & (0x10 << curr_pl)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
pageWriteStampTable.decWriteStamp(tlbEntry->ppf);
@@ -436,7 +436,7 @@
laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 1, BX_WRITE);
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -444,7 +444,7 @@
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 1, \
BX_WRITE); Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@@ -492,7 +492,7 @@
}
#endif
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -500,7 +500,7 @@
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 2, \
BX_WRITE); Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@@ -548,7 +548,7 @@
}
#endif
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -556,7 +556,7 @@
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 4, \
BX_WRITE); Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@@ -604,7 +604,7 @@
}
#endif
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -612,7 +612,7 @@
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 8, \
BX_WRITE); Bit64u *hostAddr = (Bit64u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@@ -653,7 +653,7 @@
laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 1, BX_READ);
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -661,7 +661,7 @@
// from this CPL.
if (tlbEntry->accessBits & (1<<CPL)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 1, \
BX_READ); Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
data = *hostAddr;
@@ -707,7 +707,7 @@
}
#endif
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -715,7 +715,7 @@
// from this CPL.
if (tlbEntry->accessBits & (1<<CPL)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 2, \
BX_READ); Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
ReadHostWordFromLittleEndian(hostAddr, data);
@@ -761,7 +761,7 @@
}
#endif
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -769,7 +769,7 @@
// from this CPL.
if (tlbEntry->accessBits & (1<<CPL)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 4, \
BX_READ); Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
ReadHostDWordFromLittleEndian(hostAddr, data);
@@ -815,7 +815,7 @@
}
#endif
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -823,7 +823,7 @@
// from this CPL.
if (tlbEntry->accessBits & (1<<CPL)) { // Read this pl OK.
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 8, \
BX_READ); Bit64u *hostAddr = (Bit64u*) (hostPageAddr | pageOffset);
ReadHostQWordFromLittleEndian(hostAddr, data);
@@ -866,7 +866,7 @@
laddr = BX_CPU_THIS_PTR get_segment_base(s) + offset;
BX_INSTR_MEM_DATA(BX_CPU_ID, laddr, 1, BX_RW);
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -874,7 +874,7 @@
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 1, BX_RW);
Bit8u *hostAddr = (Bit8u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@@ -926,7 +926,7 @@
}
#endif
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -934,7 +934,7 @@
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 2, BX_RW);
Bit16u *hostAddr = (Bit16u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@@ -984,7 +984,7 @@
}
#endif
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -992,7 +992,7 @@
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 4, BX_RW);
Bit32u *hostAddr = (Bit32u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
@@ -1042,7 +1042,7 @@
}
#endif
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
bx_address lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
if (tlbEntry->lpf == lpf) {
@@ -1050,7 +1050,7 @@
// from this CPL.
if (tlbEntry->accessBits & (0x10 << CPL)) {
bx_hostpageaddr_t hostPageAddr = tlbEntry->hostPageAddr;
- Bit32u pageOffset = laddr & 0xfff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, tlbEntry->ppf | pageOffset, 8, BX_RW);
Bit64u *hostAddr = (Bit64u*) (hostPageAddr | pageOffset);
#if BX_SUPPORT_ICACHE
Index: bit64.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/bit64.cc,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- bit64.cc 23 Dec 2007 17:21:27 -0000 1.3
+++ bit64.cc 26 Dec 2007 23:07:44 -0000 1.4
@@ -312,11 +312,9 @@
void BX_CPU_C::BTR_EqIbR(bxInstruction_c *i)
{
- Bit64u op1_64;
-
Bit8u op2_8 = i->Ib() & 0x3f;
- op1_64 = BX_READ_64BIT_REG(i->rm());
+ Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
op1_64 &= ~(((Bit64u) 1) << op2_8);
BX_WRITE_64BIT_REG(i->rm(), op1_64);
Index: cpu.h
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/cpu.h,v
retrieving revision 1.403
retrieving revision 1.404
diff -u -d -r1.403 -r1.404
--- cpu.h 22 Dec 2007 17:17:40 -0000 1.403
+++ cpu.h 26 Dec 2007 23:07:44 -0000 1.404
@@ -1262,6 +1262,8 @@
#endif // #if BX_USE_TLB
+#define PAGE_OFFSET(laddr) ((Bit32u)(laddr) & 0xfff)
+
// An instruction cache. Each entry should be exactly 32 bytes, and
// this structure should be aligned on a 32-byte boundary to be friendly
// with the host cache lines.
Index: debugstuff.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/debugstuff.cc,v
retrieving revision 1.87
retrieving revision 1.88
diff -u -d -r1.87 -r1.88
--- debugstuff.cc 25 Dec 2007 21:42:38 -0000 1.87
+++ debugstuff.cc 26 Dec 2007 23:07:44 -0000 1.88
@@ -45,7 +45,7 @@
static char letters[] = "0123456789ABCDEF";
static disassembler bx_disassemble;
- unsigned remainsInPage = 0x1000 - (offset & 0xfff);
+ unsigned remainsInPage = 0x1000 - PAGE_OFFSET(offset);
bx_bool valid = dbg_xlate_linear2phy(BX_CPU_THIS_PTR \
get_segment_base(BX_SEG_REG_CS) + offset, &phy_addr); if (valid && BX_CPU_THIS_PTR \
mem!=NULL) {
Index: io.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/io.cc,v
retrieving revision 1.48
retrieving revision 1.49
diff -u -d -r1.48 -r1.49
--- io.cc 23 Dec 2007 18:09:34 -0000 1.48
+++ io.cc 26 Dec 2007 23:07:44 -0000 1.49
@@ -88,12 +88,12 @@
// Counting downward
// Note: 1st word must not cross page boundary.
if ((laddrDst & 0xfff) > 0xffe) return 0;
- wordsFitDst = (2 + (laddrDst & 0xfff)) >> 1;
+ wordsFitDst = (2 + (PAGE_OFFSET(laddrDst))) >> 1;
pointerDelta = -2;
}
else {
// Counting upward
- wordsFitDst = (0x1000 - (laddrDst & 0xfff)) >> 1;
+ wordsFitDst = (0x1000 - PAGE_OFFSET(laddrDst)) >> 1;
pointerDelta = 2;
}
@@ -215,12 +215,12 @@
// Counting downward
// Note: 1st word must not cross page boundary.
if ((laddrSrc & 0xfff) > 0xffe) return 0;
- wordsFitSrc = (2 + (laddrSrc & 0xfff)) >> 1;
+ wordsFitSrc = (2 + (PAGE_OFFSET(laddrSrc))) >> 1;
pointerDelta = (unsigned) -2;
}
else {
// Counting upward
- wordsFitSrc = (0x1000 - (laddrSrc & 0xfff)) >> 1;
+ wordsFitSrc = (0x1000 - PAGE_OFFSET(laddrSrc)) >> 1;
pointerDelta = 2;
}
Index: iret.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/iret.cc,v
retrieving revision 1.25
retrieving revision 1.26
diff -u -d -r1.25 -r1.26
--- iret.cc 23 Dec 2007 17:21:27 -0000 1.25
+++ iret.cc 26 Dec 2007 23:07:44 -0000 1.26
@@ -451,7 +451,7 @@
/* load CS:EIP from stack */
/* load CS-cache with new code segment descriptor */
- branch_far32(&cs_selector, &cs_descriptor, new_rip, CPL);
+ branch_far32(&cs_selector, &cs_descriptor, (Bit32u) new_rip, CPL);
// ID,VIP,VIF,AC,VM,RF,x,NT,IOPL,OF,DF,IF,TF,SF,ZF,x,AF,x,PF,x,CF
Bit32u changeMask = EFlagsOSZAPCMask | EFlagsTFMask | EFlagsDFMask |
Index: mmx.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/mmx.cc,v
retrieving revision 1.69
retrieving revision 1.70
diff -u -d -r1.69 -r1.70
--- mmx.cc 23 Dec 2007 17:21:27 -0000 1.69
+++ mmx.cc 26 Dec 2007 23:07:44 -0000 1.70
@@ -2417,7 +2417,7 @@
temp += abs(MMXUB6(op1) - MMXUB6(op2));
temp += abs(MMXUB7(op1) - MMXUB7(op2));
- MMXUW0(op1) = (Bit64u) temp;
+ MMXUQ(op1) = (Bit64u) temp;
/* now write result back to destination */
BX_WRITE_MMX_REG(i->nnn(), op1);
Index: mult32.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/mult32.cc,v
retrieving revision 1.24
retrieving revision 1.25
diff -u -d -r1.24 -r1.25
--- mult32.cc 20 Dec 2007 20:58:37 -0000 1.24
+++ mult32.cc 26 Dec 2007 23:07:44 -0000 1.25
@@ -198,8 +198,8 @@
op2_32 = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
}
- Bit64s product_64 = ((Bit64s) op2_32) * ((Bit64s) op3_32);
- Bit32u product_32 = (product_64 & 0xFFFFFFFF);
+ Bit64s product_64 = ((Bit64s) op2_32) * ((Bit64s) op3_32);
+ Bit32u product_32 = (Bit32u)(product_64 & 0xFFFFFFFF);
/* now write product back to destination */
BX_WRITE_32BIT_REGZ(i->nnn(), product_32);
@@ -231,7 +231,7 @@
op1_32 = BX_READ_32BIT_REG(i->nnn());
Bit64s product_64 = ((Bit64s) op1_32) * ((Bit64s) op2_32);
- Bit32u product_32 = (product_64 & 0xFFFFFFFF);
+ Bit32u product_32 = (Bit32u)(product_64 & 0xFFFFFFFF);
/* now write product back to destination */
BX_WRITE_32BIT_REGZ(i->nnn(), product_32);
Index: mult64.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/mult64.cc,v
retrieving revision 1.23
retrieving revision 1.24
diff -u -d -r1.23 -r1.24
--- mult64.cc 23 Dec 2007 17:21:27 -0000 1.23
+++ mult64.cc 26 Dec 2007 23:07:44 -0000 1.24
@@ -48,10 +48,10 @@
int i,j,k;
- op_1[0] = op1 & 0xffffffff;
- op_1[1] = op1 >> 32;
- op_2[0] = op2 & 0xffffffff;
- op_2[1] = op2 >> 32;
+ op_1[0] = (Bit32u)(op1 & 0xffffffff);
+ op_1[1] = (Bit32u)(op1 >> 32);
+ op_2[0] = (Bit32u)(op2 & 0xffffffff);
+ op_2[1] = (Bit32u)(op2 >> 32);
for (i = 0; i < 4; i++) result[i] = 0;
@@ -59,10 +59,10 @@
for (j = 0; j < 2; j++) {
nn = (Bit64u) op_1[i] * (Bit64u) op_2[j];
k = i + j;
- c = partial_add(&result[k++],nn & 0xffffffff);
- c = partial_add(&result[k++],(nn >> 32) + c);
+ c = partial_add(&result[k++], (Bit32u)(nn & 0xffffffff));
+ c = partial_add(&result[k++], (Bit32u)(nn >> 32) + c);
while (k < 4 && c != 0) {
- c = partial_add(&result[k++],c);
+ c = partial_add(&result[k++], c);
}
}
}
Index: paging.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/paging.cc,v
retrieving revision 1.102
retrieving revision 1.103
diff -u -d -r1.102 -r1.103
--- paging.cc 23 Dec 2007 17:21:27 -0000 1.102
+++ paging.cc 26 Dec 2007 23:07:44 -0000 1.103
@@ -552,7 +552,7 @@
void BX_CPU_C::TLB_invlpg(bx_address laddr)
{
#if BX_USE_TLB
- Bit32u TLB_index = BX_TLB_INDEX_OF(laddr, 0);
+ unsigned TLB_index = BX_TLB_INDEX_OF(laddr, 0);
BX_CPU_THIS_PTR TLB.entry[TLB_index].lpf = BX_INVALID_TLB_ENTRY;
InstrTLB_Increment(tlbEntryFlushes); // A TLB entry flush occurred.
#endif
@@ -637,7 +637,7 @@
InstrTLB_Stats();
bx_address lpf = LPFOf(laddr);
- Bit32u TLB_index = BX_TLB_INDEX_OF(lpf, 0);
+ unsigned TLB_index = BX_TLB_INDEX_OF(lpf, 0);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[TLB_index];
if (tlbEntry->lpf == lpf)
@@ -1051,7 +1051,7 @@
// see if page is in the TLB first
#if BX_USE_TLB
- Bit32u TLB_index = BX_TLB_INDEX_OF(lpf, 0);
+ unsigned TLB_index = BX_TLB_INDEX_OF(lpf, 0);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[TLB_index];
if (tlbEntry->lpf == lpf) {
@@ -1118,7 +1118,7 @@
hwbreakpoint_match(laddr, len, rw);
#endif
- Bit32u pageOffset = laddr & 0x00000fff;
+ Bit32u pageOffset = PAGE_OFFSET(laddr);
unsigned xlate_rw = rw;
if (rw==BX_RW) rw = BX_READ;
@@ -1223,7 +1223,7 @@
if (rw == BX_READ) {
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, laddr, len, xlate_rw);
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
bx_address lpf = LPFOf(laddr);
@@ -1264,7 +1264,7 @@
else { // Write
BX_INSTR_LIN_ACCESS(BX_CPU_ID, laddr, laddr, len, xlate_rw);
#if BX_SupportGuest2HostTLB
- Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
+ unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
bx_address lpf = LPFOf(laddr);
Index: smm.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/smm.cc,v
retrieving revision 1.29
retrieving revision 1.30
diff -u -d -r1.29 -r1.30
--- smm.cc 24 Nov 2007 14:22:34 -0000 1.29
+++ smm.cc 26 Dec 2007 23:07:44 -0000 1.30
@@ -217,40 +217,40 @@
void BX_CPU_C::smram_save_state(Bit32u *saved_state)
{
// --- General Purpose Registers --- //
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_RAX_HI32) = RAX >> 32;
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_RAX_HI32) = (Bit32u)(RAX >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RAX_LO32) = EAX;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_RCX_HI32) = RCX >> 32;
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_RCX_HI32) = (Bit32u)(RCX >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RCX_LO32) = ECX;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDX_HI32) = RDX >> 32;
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDX_HI32) = (Bit32u)(RDX >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDX_LO32) = EDX;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBX_HI32) = RBX >> 32;
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBX_HI32) = (Bit32u)(RBX >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBX_LO32) = EBX;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSP_HI32) = RSP >> 32;
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSP_HI32) = (Bit32u)(RSP >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSP_LO32) = ESP;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBP_HI32) = RBP >> 32;
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBP_HI32) = (Bit32u)(RBP >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RBP_LO32) = EBP;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSI_HI32) = RSI >> 32;
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSI_HI32) = (Bit32u)(RSI >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RSI_LO32) = ESI;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDI_HI32) = RDI >> 32;
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDI_HI32) = (Bit32u)(RDI >> 32);
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RDI_LO32) = EDI;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R8_HI32) = R8 >> 32;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R8_LO32) = R8 & 0xffffffff;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R9_HI32) = R9 >> 32;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R9_LO32) = R9 & 0xffffffff;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R10_HI32) = R10 >> 32;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R10_LO32) = R10 & 0xffffffff;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R11_HI32) = R11 >> 32;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R11_LO32) = R11 & 0xffffffff;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R12_HI32) = R12 >> 32;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R12_LO32) = R12 & 0xffffffff;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R13_HI32) = R13 >> 32;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R13_LO32) = R13 & 0xffffffff;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R14_HI32) = R14 >> 32;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R14_LO32) = R14 & 0xffffffff;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R15_HI32) = R15 >> 32;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_R15_LO32) = R15 & 0xffffffff;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_RIP_HI32) = RIP >> 32;
- SMRAM_FIELD(saved_state, SMRAM_OFFSET_RIP_LO32) = RIP & 0xffffffff;
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R8_HI32) = (Bit32u)(R8 >> 32);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R8_LO32) = (Bit32u)(R8 & 0xffffffff);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R9_HI32) = (Bit32u)(R9 >> 32);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R9_LO32) = (Bit32u)(R9 & 0xffffffff);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R10_HI32) = (Bit32u)(R10 >> 32);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R10_LO32) = (Bit32u)(R10 & 0xffffffff);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R11_HI32) = (Bit32u)(R11 >> 32);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R11_LO32) = (Bit32u)(R11 & 0xffffffff);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R12_HI32) = (Bit32u)(R12 >> 32);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R12_LO32) = (Bit32u)(R12 & 0xffffffff);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R13_HI32) = (Bit32u)(R13 >> 32);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R13_LO32) = (Bit32u)(R13 & 0xffffffff);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R14_HI32) = (Bit32u)(R14 >> 32);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R14_LO32) = (Bit32u)(R14 & 0xffffffff);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R15_HI32) = (Bit32u)(R15 >> 32);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_R15_LO32) = (Bit32u)(R15 & 0xffffffff);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_RIP_HI32) = (Bit32u)(RIP >> 32);
+ SMRAM_FIELD(saved_state, SMRAM_OFFSET_RIP_LO32) = EIP;
SMRAM_FIELD(saved_state, SMRAM_OFFSET_RFLAGS32) = read_eflags();
// --- Debug and Control Registers --- //
@@ -271,65 +271,65 @@
/* base+0x7ebc to base+0x7ea0 is reserved */
// --- Task Register --- //
- SMRAM_FIELD(saved_state, SMRAM_TR_BASE_HI32) = BX_CPU_THIS_PTR \
tr.cache.u.system.base >> 32;
- SMRAM_FIELD(saved_state, SMRAM_TR_BASE_LO32) = BX_CPU_THIS_PTR \
tr.cache.u.system.base & 0xffffffff; + SMRAM_FIELD(saved_state, SMRAM_TR_BASE_HI32) \
= (Bit32u)(BX_CPU_THIS_PTR tr.cache.u.system.base >> 32); + SMRAM_FIELD(saved_state, \
SMRAM_TR_BASE_LO32) = (Bit32u)(BX_CPU_THIS_PTR tr.cache.u.system.base & 0xffffffff); \
SMRAM_FIELD(saved_state, SMRAM_TR_LIMIT) = BX_CPU_THIS_PTR tr.cache.u.system.limit; \
SMRAM_FIELD(saved_state, SMRAM_TR_SELECTOR_AR) = BX_CPU_THIS_PTR tr.selector.value | \
(((Bit32u) get_segment_ar_data(&BX_CPU_THIS_PTR tr.cache)) << 16);
// --- IDTR --- //
- SMRAM_FIELD(saved_state, SMRAM_IDTR_BASE_HI32) = BX_CPU_THIS_PTR idtr.base >> 32;
- SMRAM_FIELD(saved_state, SMRAM_IDTR_BASE_LO32) = BX_CPU_THIS_PTR idtr.base & \
0xffffffff; + SMRAM_FIELD(saved_state, SMRAM_IDTR_BASE_HI32) = \
(Bit32u)(BX_CPU_THIS_PTR idtr.base >> 32); + SMRAM_FIELD(saved_state, \
SMRAM_IDTR_BASE_LO32) = (Bit32u)(BX_CPU_THIS_PTR idtr.base & 0xffffffff); \
SMRAM_FIELD(saved_state, SMRAM_IDTR_LIMIT) = BX_CPU_THIS_PTR idtr.limit; // --- LDTR \
--- //
- SMRAM_FIELD(saved_state, SMRAM_LDTR_BASE_HI32) = BX_CPU_THIS_PTR \
ldtr.cache.u.system.base >> 32;
- SMRAM_FIELD(saved_state, SMRAM_LDTR_BASE_LO32) = BX_CPU_THIS_PTR \
ldtr.cache.u.system.base & 0xffffffff; + SMRAM_FIELD(saved_state, \
SMRAM_LDTR_BASE_HI32) = (Bit32u)(BX_CPU_THIS_PTR ldtr.cache.u.system.base >> 32); + \
SMRAM_FIELD(saved_state, SMRAM_LDTR_BASE_LO32) = (Bit32u)(BX_CPU_THIS_PTR \
ldtr.cache.u.system.base & 0xffffffff); SMRAM_FIELD(saved_state, SMRAM_LDTR_LIMIT) = \
BX_CPU_THIS_PTR ldtr.cache.u.system.limit; SMRAM_FIELD(saved_state, \
SMRAM_LDTR_SELECTOR_AR) = BX_CPU_THIS_PTR ldtr.selector.value | (((Bit32u) \
get_segment_ar_data(&BX_CPU_THIS_PTR ldtr.cache)) << 16); // --- GDTR --- //
- SMRAM_FIELD(saved_state, SMRAM_GDTR_BASE_HI32) = BX_CPU_THIS_PTR gdtr.base >> 32;
- SMRAM_FIELD(saved_state, SMRAM_GDTR_BASE_LO32) = BX_CPU_THIS_PTR gdtr.base & \
0xffffffff; + SMRAM_FIELD(saved_state, SMRAM_GDTR_BASE_HI32) = \
(Bit32u)(BX_CPU_THIS_PTR gdtr.base >> 32); + SMRAM_FIELD(saved_state, \
SMRAM_GDTR_BASE_LO32) = (Bit32u)(BX_CPU_THIS_PTR gdtr.base & 0xffffffff); \
SMRAM_FIELD(saved_state, SMRAM_GDTR_LIMIT) = BX_CPU_THIS_PTR gdtr.limit; // --- GS \
selector --- // bx_segment_reg_t *seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS]);
- SMRAM_FIELD(saved_state, SMRAM_GS_BASE_HI32) = seg->cache.u.segment.base >> 32;
- SMRAM_FIELD(saved_state, SMRAM_GS_BASE_LO32) = seg->cache.u.segment.base & \
0xffffffff; + SMRAM_FIELD(saved_state, SMRAM_GS_BASE_HI32) = \
(Bit32u)(seg->cache.u.segment.base >> 32); + SMRAM_FIELD(saved_state, \
SMRAM_GS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff); \
SMRAM_FIELD(saved_state, SMRAM_GS_LIMIT) = seg->cache.u.segment.limit; \
SMRAM_FIELD(saved_state, SMRAM_GS_SELECTOR_AR) = seg->selector.value | (((Bit32u) \
get_segment_ar_data(&seg->cache)) << 16); // --- FS selector --- //
seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS]);
- SMRAM_FIELD(saved_state, SMRAM_FS_BASE_HI32) = seg->cache.u.segment.base >> 32;
- SMRAM_FIELD(saved_state, SMRAM_FS_BASE_LO32) = seg->cache.u.segment.base & \
0xffffffff; + SMRAM_FIELD(saved_state, SMRAM_FS_BASE_HI32) = \
(Bit32u)(seg->cache.u.segment.base >> 32); + SMRAM_FIELD(saved_state, \
SMRAM_FS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff); \
SMRAM_FIELD(saved_state, SMRAM_FS_LIMIT) = seg->cache.u.segment.limit; \
SMRAM_FIELD(saved_state, SMRAM_FS_SELECTOR_AR) = seg->selector.value | (((Bit32u) \
get_segment_ar_data(&seg->cache)) << 16); // --- DS selector --- //
seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS]);
- SMRAM_FIELD(saved_state, SMRAM_DS_BASE_HI32) = seg->cache.u.segment.base >> 32;
- SMRAM_FIELD(saved_state, SMRAM_DS_BASE_LO32) = seg->cache.u.segment.base & \
0xffffffff; + SMRAM_FIELD(saved_state, SMRAM_DS_BASE_HI32) = \
(Bit32u)(seg->cache.u.segment.base >> 32); + SMRAM_FIELD(saved_state, \
SMRAM_DS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff); \
SMRAM_FIELD(saved_state, SMRAM_DS_LIMIT) = seg->cache.u.segment.limit; \
SMRAM_FIELD(saved_state, SMRAM_DS_SELECTOR_AR) = seg->selector.value | (((Bit32u) \
get_segment_ar_data(&seg->cache)) << 16); // --- SS selector --- //
seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS]);
- SMRAM_FIELD(saved_state, SMRAM_SS_BASE_HI32) = seg->cache.u.segment.base >> 32;
- SMRAM_FIELD(saved_state, SMRAM_SS_BASE_LO32) = seg->cache.u.segment.base & \
0xffffffff; + SMRAM_FIELD(saved_state, SMRAM_SS_BASE_HI32) = \
(Bit32u)(seg->cache.u.segment.base >> 32); + SMRAM_FIELD(saved_state, \
SMRAM_SS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff); \
SMRAM_FIELD(saved_state, SMRAM_SS_LIMIT) = seg->cache.u.segment.limit; \
SMRAM_FIELD(saved_state, SMRAM_SS_SELECTOR_AR) = seg->selector.value | (((Bit32u) \
get_segment_ar_data(&seg->cache)) << 16); // --- CS selector --- //
seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS]);
- SMRAM_FIELD(saved_state, SMRAM_CS_BASE_HI32) = seg->cache.u.segment.base >> 32;
- SMRAM_FIELD(saved_state, SMRAM_CS_BASE_LO32) = seg->cache.u.segment.base & \
0xffffffff; + SMRAM_FIELD(saved_state, SMRAM_CS_BASE_HI32) = \
(Bit32u)(seg->cache.u.segment.base >> 32); + SMRAM_FIELD(saved_state, \
SMRAM_CS_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff); \
SMRAM_FIELD(saved_state, SMRAM_CS_LIMIT) = seg->cache.u.segment.limit; \
SMRAM_FIELD(saved_state, SMRAM_CS_SELECTOR_AR) = seg->selector.value | (((Bit32u) \
get_segment_ar_data(&seg->cache)) << 16); // --- ES selector --- //
seg = &(BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES]);
- SMRAM_FIELD(saved_state, SMRAM_ES_BASE_HI32) = seg->cache.u.segment.base >> 32;
- SMRAM_FIELD(saved_state, SMRAM_ES_BASE_LO32) = seg->cache.u.segment.base & \
0xffffffff; + SMRAM_FIELD(saved_state, SMRAM_ES_BASE_HI32) = \
(Bit32u)(seg->cache.u.segment.base >> 32); + SMRAM_FIELD(saved_state, \
SMRAM_ES_BASE_LO32) = (Bit32u)(seg->cache.u.segment.base & 0xffffffff); \
SMRAM_FIELD(saved_state, SMRAM_ES_LIMIT) = seg->cache.u.segment.limit; \
SMRAM_FIELD(saved_state, SMRAM_ES_SELECTOR_AR) = seg->selector.value | (((Bit32u) \
get_segment_ar_data(&seg->cache)) << 16);
Index: sse_move.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/sse_move.cc,v
retrieving revision 1.73
retrieving revision 1.74
diff -u -d -r1.73 -r1.74
--- sse_move.cc 23 Dec 2007 17:39:10 -0000 1.73
+++ sse_move.cc 26 Dec 2007 23:07:44 -0000 1.74
@@ -146,8 +146,8 @@
else
#endif
{
- xmm.xmm32u(2) = (BX_CPU_THIS_PTR the_i387.fip) & 0xffffffff;
- xmm.xmm32u(3) = (BX_CPU_THIS_PTR the_i387.fcs);
+ xmm.xmm32u(2) = (Bit32u)(BX_CPU_THIS_PTR the_i387.fip) & 0xffffffff;
+ xmm.xmm32u(3) = (BX_CPU_THIS_PTR the_i387.fcs);
}
write_virtual_dqword_aligned(i->seg(), RMAddr(i), (Bit8u *) &xmm);
@@ -170,8 +170,8 @@
else
#endif
{
- xmm.xmm32u(0) = (BX_CPU_THIS_PTR the_i387.fdp) & 0xffffffff;
- xmm.xmm32u(1) = (BX_CPU_THIS_PTR the_i387.fds);
+ xmm.xmm32u(0) = (Bit32u)(BX_CPU_THIS_PTR the_i387.fdp) & 0xffffffff;
+ xmm.xmm32u(1) = (BX_CPU_THIS_PTR the_i387.fds);
}
#if BX_SUPPORT_SSE >= 1
Index: stack16.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/stack16.cc,v
retrieving revision 1.29
retrieving revision 1.30
diff -u -d -r1.29 -r1.30
--- stack16.cc 20 Dec 2007 20:58:37 -0000 1.29
+++ stack16.cc 26 Dec 2007 23:07:44 -0000 1.30
@@ -80,7 +80,6 @@
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds);
BX_CPU_THIS_PTR speculative_rsp = 0;
-
}
void BX_CPU_C::POP16_ES(bxInstruction_c *i)
Index: string.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/string.cc,v
retrieving revision 1.49
retrieving revision 1.50
diff -u -d -r1.49 -r1.50
--- string.cc 23 Dec 2007 18:09:34 -0000 1.49
+++ string.cc 26 Dec 2007 23:07:44 -0000 1.50
@@ -108,14 +108,14 @@
// See how many bytes can fit in the rest of this page.
if (BX_CPU_THIS_PTR get_DF()) {
// Counting downward.
- bytesFitSrc = 1 + (laddrSrc & 0xfff);
- bytesFitDst = 1 + (laddrDst & 0xfff);
+ bytesFitSrc = 1 + PAGE_OFFSET(laddrSrc);
+ bytesFitDst = 1 + PAGE_OFFSET(laddrDst);
pointerDelta = (signed int) -1;
}
else {
// Counting upward.
- bytesFitSrc = (0x1000 - (laddrSrc & 0xfff));
- bytesFitDst = (0x1000 - (laddrDst & 0xfff));
+ bytesFitSrc = 0x1000 - PAGE_OFFSET(laddrSrc);
+ bytesFitDst = 0x1000 - PAGE_OFFSET(laddrDst);
pointerDelta = (signed int) 1;
}
@@ -257,14 +257,14 @@
// Note: 1st word must not cross page boundary.
if (((laddrSrc & 0xfff) > 0xffe) || ((laddrDst & 0xfff) > 0xffe))
return 0;
- wordsFitSrc = (2 + (laddrSrc & 0xfff)) >> 1;
- wordsFitDst = (2 + (laddrDst & 0xfff)) >> 1;
+ wordsFitSrc = (2 + PAGE_OFFSET(laddrSrc)) >> 1;
+ wordsFitDst = (2 + PAGE_OFFSET(laddrDst)) >> 1;
pointerDelta = (signed int) -2;
}
else {
// Counting upward.
- wordsFitSrc = (0x1000 - (laddrSrc & 0xfff)) >> 1;
- wordsFitDst = (0x1000 - (laddrDst & 0xfff)) >> 1;
+ wordsFitSrc = (0x1000 - PAGE_OFFSET(laddrSrc)) >> 1;
+ wordsFitDst = (0x1000 - PAGE_OFFSET(laddrDst)) >> 1;
pointerDelta = (signed int) 2;
}
@@ -407,14 +407,14 @@
// Note: 1st dword must not cross page boundary.
if (((laddrSrc & 0xfff) > 0xffc) || ((laddrDst & 0xfff) > 0xffc))
return 0;
- dwordsFitSrc = (4 + (laddrSrc & 0xfff)) >> 2;
- dwordsFitDst = (4 + (laddrDst & 0xfff)) >> 2;
+ dwordsFitSrc = (4 + PAGE_OFFSET(laddrSrc)) >> 2;
+ dwordsFitDst = (4 + PAGE_OFFSET(laddrDst)) >> 2;
pointerDelta = (signed int) -4;
}
else {
// Counting upward.
- dwordsFitSrc = (0x1000 - (laddrSrc & 0xfff)) >> 2;
- dwordsFitDst = (0x1000 - (laddrDst & 0xfff)) >> 2;
+ dwordsFitSrc = (0x1000 - PAGE_OFFSET(laddrSrc)) >> 2;
+ dwordsFitDst = (0x1000 - PAGE_OFFSET(laddrDst)) >> 2;
pointerDelta = (signed int) 4;
}
@@ -525,12 +525,12 @@
// See how many bytes can fit in the rest of this page.
if (BX_CPU_THIS_PTR get_DF()) {
// Counting downward.
- bytesFitDst = 1 + (laddrDst & 0xfff);
+ bytesFitDst = 1 + PAGE_OFFSET(laddrDst);
pointerDelta = (signed int) -1;
}
else {
// Counting upward.
- bytesFitDst = (0x1000 - (laddrDst & 0xfff));
+ bytesFitDst = 0x1000 - PAGE_OFFSET(laddrDst);
pointerDelta = (signed int) 1;
}
@@ -627,12 +627,12 @@
// Counting downward.
// Note: 1st word must not cross page boundary.
if ((laddrDst & 0xfff) > 0xffe) return 0;
- wordsFitDst = (2 + (laddrDst & 0xfff)) >> 1;
+ wordsFitDst = (2 + PAGE_OFFSET(laddrDst)) >> 1;
pointerDelta = (signed int) -2;
}
else {
// Counting upward.
- wordsFitDst = (0x1000 - (laddrDst & 0xfff)) >> 1;
+ wordsFitDst = (0x1000 - PAGE_OFFSET(laddrDst)) >> 1;
pointerDelta = (signed int) 2;
}
@@ -730,12 +730,12 @@
// Counting downward.
// Note: 1st dword must not cross page boundary.
if ((laddrDst & 0xfff) > 0xffc) return 0;
- dwordsFitDst = (4 + (laddrDst & 0xfff)) >> 2;
+ dwordsFitDst = (4 + PAGE_OFFSET(laddrDst)) >> 2;
pointerDelta = (signed int) -4;
}
else {
// Counting upward.
- dwordsFitDst = (0x1000 - (laddrDst & 0xfff)) >> 2;
+ dwordsFitDst = (0x1000 - PAGE_OFFSET(laddrDst)) >> 2;
pointerDelta = (signed int) 4;
}
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