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List:       bluesmoke-devel
Subject:    Re: [patch 4/5] pci-quirks: unhide 'Overflow' device on i828{6,
From:       Bjorn Helgaas <bjorn.helgaas () hp ! com>
Date:       2009-01-13 16:54:57
Message-ID: 200901130954.57575.bjorn.helgaas () hp ! com
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On Saturday 10 January 2009 06:21:38 am Michał Mirosław wrote:
> On Fri, Jan 09, 2009 at 01:40:02PM -0800, Jesse Barnes wrote:
> > On Friday, January 9, 2009 12:26 pm akpm@linux-foundation.org wrote:
> > > From: Michal Miroslaw <mirq-linux@rere.qmqm.pl>
> > > As I found out from EDAC driver sources for i82875P some BIOSes for
> > > i82875P/PE hide 'overflow' device 6.  The same thing happens for
> > > i82865P/PE chipsets.
> > >
> > > After testing this patch for couple of days on my laptop (i82856P) it
> > > looks like something is resetting device 0 (MCH) config register 0xF4 to
> > > zero and effectively disabling the device again.  The delay looks random
> > > to me.  I can easily update the register using 'hexedit
> > > /sys/bus/pci/devices/0000\:00\:00.0/config' and see correct values in
> > > lspci output afterwards.
> > This one already got a NAK until Michal can figure out a way to prevent the 
> > SMM code on his machine from hiding this device periodically.
> 
> I looked at it again and it turns out that actually nothing is touching
> this register after bootup. The problem lies in ACPI PNP code from my BIOS
> it accesses one register from MCH overflow device (installed memory size)
> and disables it after access. There are no other references to DEV6 in
> the DSDT disassembly. The quick fix for me is to just remove accesses to
> DEV6 bit from DSDT.

Changing the DSDT doesn't work for mainline, of course.  We have to
run with the standard BIOS.

> A better workaround would be a hook after ACPI PNP 
> resource discovery phase.

In general, _CRS can be evaluated at any time, not just at boot-time
when PNP discovers things.

> Maybe EDAC guys have some more examples of what 
> happens on 875P chipsets where the DEV6 is disabled?
> 
> ---snip---
>         Device (PCI0)
>         {  
> [...]
>             OperationRegion (REGS, PCI_Config, 0x40, 0xC0)
>             Field (REGS, ByteAcc, NoLock, Preserve)
>             {
>                         Offset (0xB4),
>                     ,   1,
>                 DEV6,   1
>             }
> [...]
>             Method (_CRS, 0, Serialized)
>             {   
> [...]
>                 CreateDWordField (RSRC, \_SB.PCI0._Y00._MIN, BTMN)
>                 Store (One, DEV6)
>                 Multiply (0x04000000, DRB7, BTMN)
>                 Store (Zero, DEV6)
> [...]
> ---snip---
> 
> Best Regards,
> Michał Mirosław
> --
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> 



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