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List: binutils-cvs
Subject: [binutils-gdb] Patches for illegal ppc 500 instructions
From: Alan Modra <amodra () sourceware ! org>
Date: 2015-09-28 2:40:53
Message-ID: 20150928024053.107567.qmail () sourceware ! org
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https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=36f7a9411dcd7dbeb3483bc83a1acbb3dd235deb
commit 36f7a9411dcd7dbeb3483bc83a1acbb3dd235deb
Author: Tom Rix <tom@bumblecow.com>
Date: Mon Sep 28 12:09:32 2015 +0930
Patches for illegal ppc 500 instructions
This change marks a few opcodes as invalid for ppc e500 as well as adds
a test to verify the change.
Diff:
---
gas/testsuite/ChangeLog | 6 ++++++
gas/testsuite/gas/ppc/e500-ill.l | 8 ++++++++
gas/testsuite/gas/ppc/e500-ill.s | 11 +++++++++++
gas/testsuite/gas/ppc/ppc.exp | 1 +
opcodes/ChangeLog | 4 ++++
opcodes/ppc-opc.c | 14 +++++++-------
6 files changed, 37 insertions(+), 7 deletions(-)
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index f6f8b37..c770a29 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2015-09-28 Tom Rix <tom@bumblecow.com>
+
+ * gas/ppc/e500-ill.s: New testcase for illegal ppc e500 ops.
+ * gas/ppc/e500-ill.l: Expected results.
+ * gas/ppc/ppc.exp: Run it.
+
2015-08-25 Jose E. Marchesi <jose.marchesi@oracle.com>
* gas/sparc/wrpr.s: Test writing to the privileged %pmcdper
diff --git a/gas/testsuite/gas/ppc/e500-ill.l b/gas/testsuite/gas/ppc/e500-ill.l
new file mode 100644
index 0000000..f62f762
--- /dev/null
+++ b/gas/testsuite/gas/ppc/e500-ill.l
@@ -0,0 +1,8 @@
+.*: Assembler messages:
+.*:5: Error: unrecognized opcode: `eciwx'
+.*:6: Error: unrecognized opcode: `ecowx'
+.*:7: Error: unrecognized opcode: `mfapidi'
+.*:8: Error: unrecognized opcode: `mfdcr'
+.*:9: Error: unrecognized opcode: `mtdcr'
+.*:10: Error: unrecognized opcode: `tlbia'
+.*:11: Error: unrecognized opcode: `tlbie'
diff --git a/gas/testsuite/gas/ppc/e500-ill.s b/gas/testsuite/gas/ppc/e500-ill.s
new file mode 100644
index 0000000..890faf6
--- /dev/null
+++ b/gas/testsuite/gas/ppc/e500-ill.s
@@ -0,0 +1,11 @@
+# Motorola PowerPC e500 illegal instructions
+ .text
+ .machine e500
+start:
+ eciwx 3,4,5
+ ecowx 3,4,5
+ mfapidi 5, 6
+ mfdcr 5, 234
+ mtdcr 432, 8
+ tlbia
+ tlbie 3
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index f333c52..df91f36 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -72,6 +72,7 @@ if { [istarget powerpc*-*-*] } then {
run_dump_test "altivec_and_spe"
run_dump_test "booke"
run_dump_test "e500"
+ run_list_test "e500-ill"
run_list_test "range" "-a32"
run_dump_test "ppc750ps"
run_dump_test "e500mc"
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b098299..ed9051e 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2015-09-28 Tom Rix <tom@bumblecow.com>
+
+ * ppc-opc.c (PPC500): Mark some opcodes as invalid
+
2015-09-23 Nick Clifton <nickc@redhat.com>
* bfin-dis.c (fmtconst): Remove unnecessary call to the abs
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 2526da4..e9d24c8 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -4779,7 +4779,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"tlbiel", X(31,274), XRTLRA_MASK, POWER4, PPC476, {RB, L}},
-{"mfapidi", X(31,275), X_MASK, BOOKE, TITAN, {RT, RA}},
+{"mfapidi", X(31,275), X_MASK, BOOKE, E500|TITAN, {RT, RA}},
{"lqarx", X(31,276), XEH_MASK, POWER8, PPCNONE, {RTQ, RAX, RBX, EH}},
@@ -4808,10 +4808,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfbhrbe", X(31,302), X_MASK, POWER8, PPCNONE, {RT, BHRBE}},
{"tlbie", X(31,306), XRA_MASK, POWER7, TITAN, {RB, RS}},
-{"tlbie", X(31,306), XRTLRA_MASK, PPC, POWER7|TITAN, {RB, L}},
+{"tlbie", X(31,306), XRTLRA_MASK, PPC, E500|POWER7|TITAN, {RB, L}},
{"tlbi", X(31,306), XRT_MASK, POWER, PPCNONE, {RA0, RB}},
-{"eciwx", X(31,310), X_MASK, PPC, TITAN, {RT, RA0, RB}},
+{"eciwx", X(31,310), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}},
{"lhzux", X(31,311), X_MASK, COM|PPCVLE, PPCNONE, {RT, RAL, RB}},
@@ -4856,7 +4856,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfdmasa3", XSPR(31,323,219), XSPR_MASK, PPC403, PPCNONE, {RT}},
{"mfdmacc3", XSPR(31,323,220), XSPR_MASK, PPC403, PPCNONE, {RT}},
{"mfdmasr", XSPR(31,323,224), XSPR_MASK, PPC403, PPCNONE, {RT}},
-{"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476|PPCVLE, TITAN, {RT, SPR}},
+{"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476|PPCVLE, E500|TITAN, {RT, SPR}},
{"mfdcr.", XRC(31,323,1), X_MASK, PPCA2, PPCNONE, {RT, SPR}},
{"lvexwx", X(31,325), X_MASK, PPCVEC2, PPCNONE, {VD, RA0, RB}},
@@ -5087,7 +5087,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"divs", XO(31,363,0,0), XO_MASK, M601, PPCNONE, {RT, RA, RB}},
{"divs.", XO(31,363,0,1), XO_MASK, M601, PPCNONE, {RT, RA, RB}},
-{"tlbia", X(31,370), 0xffffffff, PPC, TITAN, {0}},
+{"tlbia", X(31,370), 0xffffffff, PPC, E500|TITAN, {0}},
{"mftbu", XSPR(31,371,269), XSPR_MASK, PPC, NO371|POWER4, {RT}},
{"mftb", X(31,371), X_MASK, PPC, NO371|POWER4, {RT, TBR}},
@@ -5145,7 +5145,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"slbie", X(31,434), XRTRA_MASK, PPC64, PPCNONE, {RB}},
-{"ecowx", X(31,438), X_MASK, PPC, TITAN, {RT, RA0, RB}},
+{"ecowx", X(31,438), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}},
{"sthux", X(31,439), X_MASK, COM|PPCVLE, PPCNONE, {RS, RAS, RB}},
@@ -5197,7 +5197,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtdmasa3", XSPR(31,451,219), XSPR_MASK, PPC403, PPCNONE, {RS}},
{"mtdmacc3", XSPR(31,451,220), XSPR_MASK, PPC403, PPCNONE, {RS}},
{"mtdmasr", XSPR(31,451,224), XSPR_MASK, PPC403, PPCNONE, {RS}},
-{"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476|PPCVLE, TITAN, {SPR, RS}},
+{"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476|PPCVLE, E500|TITAN, {SPR, RS}},
{"mtdcr.", XRC(31,451,1), X_MASK, PPCA2, PPCNONE, {SPR, RS}},
{"stvexwx", X(31,453), X_MASK, PPCVEC2, PPCNONE, {VS, RA0, RB}},
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