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List:       binutils
Subject:    [PATCH v1 7/7] LoongArch: Add gas testsuit for LA32 relocations
From:       Lulu Cai <cailulu () loongson ! cn>
Date:       2024-02-29 11:46:47
Message-ID: 20240229114647.1587477-3-cailulu () loongson ! cn
[Download RAW message or body]

Test the relocation of the LA32 instruction set.
---
 gas/testsuite/gas/loongarch/relocs_32.d | 75 +++++++++++++++++++++++++
 gas/testsuite/gas/loongarch/relocs_32.s | 61 ++++++++++++++++++++
 2 files changed, 136 insertions(+)
 create mode 100644 gas/testsuite/gas/loongarch/relocs_32.d
 create mode 100644 gas/testsuite/gas/loongarch/relocs_32.s

diff --git a/gas/testsuite/gas/loongarch/relocs_32.d b/gas/testsuite/gas/loongarch/relocs_32.d
new file mode 100644
index 00000000000..3e1bb62e263
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/relocs_32.d
@@ -0,0 +1,75 @@
+#as: -mthin-add-sub
+#objdump: -dr
+#skip: loongarch64-*-*
+
+.*:[    ]+file format .*
+
+
+Disassembly of section .text:
+
+0+ <.*>:
+   0:	4c0050a4 	jirl        	\$a0, \$a1, 80
+			0: R_LARCH_B16	.L1
+   4:	50004c00 	b           	76	# 50 <.L1>
+			4: R_LARCH_B26	.L1
+   8:	14000004 	lu12i.w     	\$a0, 0
+			8: R_LARCH_ABS_HI20	.L1
+   c:	038000a4 	ori         	\$a0, \$a1, 0x0
+			c: R_LARCH_ABS_LO12	.L1
+  10:	1a000004 	pcalau12i   	\$a0, 0
+			10: R_LARCH_PCALA_HI20	.L1
+  14:	02800085 	addi.w      	\$a1, \$a0, 0
+			14: R_LARCH_PCALA_LO12	.L1
+  18:	1a000004 	pcalau12i   	\$a0, 0
+			18: R_LARCH_GOT_PC_HI20	.L1
+  1c:	28800085 	ld.w        	\$a1, \$a0, 0
+			1c: R_LARCH_GOT_PC_LO12	.L1
+  20:	14000004 	lu12i.w     	\$a0, 0
+			20: R_LARCH_GOT_HI20	.L1
+  24:	03800084 	ori         	\$a0, \$a0, 0x0
+			24: R_LARCH_GOT_LO12	.L1
+  28:	14000004 	lu12i.w     	\$a0, 0
+			28: R_LARCH_TLS_LE_HI20	TLSL1
+  2c:	03800085 	ori         	\$a1, \$a0, 0x0
+			2c: R_LARCH_TLS_LE_LO12	TLSL1
+  30:	1a000004 	pcalau12i   	\$a0, 0
+			30: R_LARCH_TLS_IE_PC_HI20	TLSL1
+  34:	02c00005 	li.d        	\$a1, 0
+			34: R_LARCH_TLS_IE_PC_LO12	TLSL1
+  38:	14000004 	lu12i.w     	\$a0, 0
+			38: R_LARCH_TLS_IE_HI20	TLSL1
+  3c:	03800084 	ori         	\$a0, \$a0, 0x0
+			3c: R_LARCH_TLS_IE_LO12	TLSL1
+  40:	1a000004 	pcalau12i   	\$a0, 0
+			40: R_LARCH_TLS_LD_PC_HI20	TLSL1
+  44:	14000004 	lu12i.w     	\$a0, 0
+			44: R_LARCH_TLS_LD_HI20	TLSL1
+  48:	1a000004 	pcalau12i   	\$a0, 0
+			48: R_LARCH_TLS_GD_PC_HI20	TLSL1
+  4c:	14000004 	lu12i.w     	\$a0, 0
+			4c: R_LARCH_TLS_GD_HI20	TLSL1
+
+0+50 <.L1>:
+  50:	00000000 	.word		0x00000000
+			50: R_LARCH_32_PCREL	.L2
+
+0+54 <.L2>:
+  54:	03400000 	nop
+  58:	03400000 	nop
+			58: R_LARCH_ALIGN	.*
+  5c:	03400000 	nop
+  60:	03400000 	nop
+  64:	1800000c 	pcaddi      	\$t0, 0
+			64: R_LARCH_PCREL20_S2	.L1
+  68:	1a000004 	pcalau12i   	\$a0, 0
+			68: R_LARCH_TLS_DESC_PC_HI20	TLSL1
+  6c:	028000a5 	addi.w      	\$a1, \$a1, 0
+			6c: R_LARCH_TLS_DESC_PC_LO12	TLSL1
+  70:	14000004 	lu12i.w     	\$a0, 0
+			70: R_LARCH_TLS_DESC_HI20	TLSL1
+  74:	03800084 	ori         	\$a0, \$a0, 0x0
+			74: R_LARCH_TLS_DESC_LO12	TLSL1
+  78:	28800081 	ld.w        	\$ra, \$a0, 0
+			78: R_LARCH_TLS_DESC_LD	TLSL1
+  7c:	4c000021 	jirl        	\$ra, \$ra, 0
+			7c: R_LARCH_TLS_DESC_CALL	TLSL1
diff --git a/gas/testsuite/gas/loongarch/relocs_32.s b/gas/testsuite/gas/loongarch/relocs_32.s
new file mode 100644
index 00000000000..c5139a7582c
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/relocs_32.s
@@ -0,0 +1,61 @@
+/* b16.  */
+jirl	  $r4,$r5,%b16(.L1)
+
+/* b26.  */
+b	  %b26(.L1)
+
+/* lu12i.w.  */
+lu12i.w	  $r4,%abs_hi20(.L1)
+
+/* ori   */
+ori	  $r4,$r5,%abs_lo12(.L1)
+
+pcalau12i $r4,%pc_hi20(.L1)
+addi.w	  $r5,$r4,%pc_lo12(.L1)
+
+pcalau12i $r4,%got_pc_hi20(.L1)
+ld.w	  $r5,$r4,%got_pc_lo12(.L1)
+
+lu12i.w	  $r4,%got_hi20(.L1)
+ori	  $r4,$r4,%got_lo12(.L1)
+
+/* TLS LE.  */
+lu12i.w	  $r4,%le_hi20(TLSL1)
+ori	  $r5,$r4,%le_lo12(TLSL1)
+
+/* Part of IE relocs.  */
+pcalau12i $r4,%ie_pc_hi20(TLSL1)
+addi.d	  $r5,$r0,%ie_pc_lo12(TLSL1)
+
+lu12i.w	  $r4,%ie_hi20(TLSL1)
+ori	  $r4,$r4,%ie_lo12(TLSL1)
+
+/* Part of LD relocs.  */
+pcalau12i $r4,%ld_pc_hi20(TLSL1)
+lu12i.w	  $r4,%ld_hi20(TLSL1)
+
+/* Part of GD relocs.  */
+pcalau12i $r4,%gd_pc_hi20(TLSL1)
+lu12i.w	  $r4,%gd_hi20(TLSL1)
+
+/* Test insn relocs.  */
+.L1:
+/* 32-bit PC relative.  */
+.4byte	  .L2-.L1
+.L2:
+nop
+
+/* R_LARCH_ALIGN.  */
+.align	4
+
+/* R_LARCH_PCREL20_S2.  */
+pcaddi	  $r12,.L1
+
+/* Part of DESC relocs.   */
+pcalau12i $r4,%desc_pc_hi20(TLSL1)
+addi.w	  $r5,$r5,%desc_pc_lo12(TLSL1)
+
+lu12i.w	  $r4,%desc_hi20(TLSL1)
+ori	  $r4,$r4,%desc_lo12(TLSL1)
+ld.w	  $r1,$r4,%desc_ld(TLSL1)
+jirl	  $r1,$r1,%desc_call(TLSL1)
-- 
2.43.0

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