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List: binutils
Subject: RE: [PATCHv4] Add support for O32 FPXX ABI
From: Matthew Fortune <Matthew.Fortune () imgtec ! com>
Date: 2014-07-29 10:33:41
Message-ID: 6D39441BF12EF246A7ABCE6654B0235320EB5121 () LEMAIL01 ! le ! imgtec ! org
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This is now committed. Tested with mips(64)?el?-linux-gnu
and mips(64)?-mti-elf. Thanks for all the work on this Richard.
Richard Sandiford <rdsandiford@googlemail.com> writes:
> Matthew Fortune <Matthew.Fortune@imgtec.com> writes:
> > but the bigger reason is that the micromips mtc1/mfc1 instructions are
> > not INSN_COPROC_MOVE_DELAY so there is no flag to detect them. This
> > has never been a problem before as there has always been 32 single
> > precision registers for micromips but now that may be restricted to 16
> > depending on ABI. I could just attach a new flag to the micromips
> > instructions which lack any other flag but it seems clearer to attach
> > it to the others too. The only other option is to add
> > INSN_COPROC_MOVE_DELAY to the mtc1/mfc1 instructions in micromips even
> > though that is something of a lie. What do you think is cleanest?
>
> I think the last one is probably best. We could remove the _DELAY
> from the name too, since the delay is only conditional anyway.
I'll leave a rename to a separate commit.
> > I would also like to get rid of all the ctc1/cfc1/cttc1/cftc1
> instructions
> > that allow the use of floating point register names: $f0. The problem
> with
> > these is that they don't actually write floating point registers but
> they
> > will interact with the oddspreg logic as their operands have type
> > OP_REG_FP. Anything relying on ctc1 $0, $f[0-31] is probably expecting
> the
> > wrong thing to happen anyway. If that's OK I'll do a separate patch?
>
> It's always dangerous to change something long-standing like that, but
> I agree it's weird. OTOH "ctc1 $0, $31" could be seen as confusing too
> (it isn't GPR 31).
>
> Let's assume it's OK for now and see if there are any objections.
I'll do this as a separate commit as well.
Thanks,
Matthew
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